/ Drivers / STM32F4xx_HAL_Driver / Inc / stm32f4xx_hal_iwdg.h
stm32f4xx_hal_iwdg.h
  1  /**
  2    ******************************************************************************
  3    * @file    stm32f4xx_hal_iwdg.h
  4    * @author  MCD Application Team
  5    * @brief   Header file of IWDG HAL module.
  6    ******************************************************************************
  7    * @attention
  8    *
  9    * Copyright (c) 2016 STMicroelectronics.
 10    * All rights reserved.
 11    *
 12    * This software is licensed under terms that can be found in the LICENSE file
 13    * in the root directory of this software component.
 14    * If no LICENSE file comes with this software, it is provided AS-IS.
 15    *
 16    ******************************************************************************
 17    */
 18  
 19  /* Define to prevent recursive inclusion -------------------------------------*/
 20  #ifndef STM32F4xx_HAL_IWDG_H
 21  #define STM32F4xx_HAL_IWDG_H
 22  
 23  #ifdef __cplusplus
 24  extern "C" {
 25  #endif
 26  
 27  /* Includes ------------------------------------------------------------------*/
 28  #include "stm32f4xx_hal_def.h"
 29  
 30  /** @addtogroup STM32F4xx_HAL_Driver
 31    * @{
 32    */
 33  
 34  /** @defgroup IWDG IWDG
 35    * @{
 36    */
 37  
 38  /* Exported types ------------------------------------------------------------*/
 39  /** @defgroup IWDG_Exported_Types IWDG Exported Types
 40    * @{
 41    */
 42  
 43  /**
 44    * @brief  IWDG Init structure definition
 45    */
 46  typedef struct
 47  {
 48    uint32_t Prescaler;  /*!< Select the prescaler of the IWDG.
 49                              This parameter can be a value of @ref IWDG_Prescaler */
 50  
 51    uint32_t Reload;     /*!< Specifies the IWDG down-counter reload value.
 52                              This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
 53  
 54  } IWDG_InitTypeDef;
 55  
 56  /**
 57    * @brief  IWDG Handle Structure definition
 58    */
 59  typedef struct
 60  {
 61    IWDG_TypeDef                 *Instance;  /*!< Register base address    */
 62  
 63    IWDG_InitTypeDef             Init;       /*!< IWDG required parameters */
 64  } IWDG_HandleTypeDef;
 65  
 66  
 67  /**
 68    * @}
 69    */
 70  
 71  /* Exported constants --------------------------------------------------------*/
 72  /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
 73    * @{
 74    */
 75  
 76  /** @defgroup IWDG_Prescaler IWDG Prescaler
 77    * @{
 78    */
 79  #define IWDG_PRESCALER_4                0x00000000u                                     /*!< IWDG prescaler set to 4   */
 80  #define IWDG_PRESCALER_8                IWDG_PR_PR_0                                    /*!< IWDG prescaler set to 8   */
 81  #define IWDG_PRESCALER_16               IWDG_PR_PR_1                                    /*!< IWDG prescaler set to 16  */
 82  #define IWDG_PRESCALER_32               (IWDG_PR_PR_1 | IWDG_PR_PR_0)                   /*!< IWDG prescaler set to 32  */
 83  #define IWDG_PRESCALER_64               IWDG_PR_PR_2                                    /*!< IWDG prescaler set to 64  */
 84  #define IWDG_PRESCALER_128              (IWDG_PR_PR_2 | IWDG_PR_PR_0)                   /*!< IWDG prescaler set to 128 */
 85  #define IWDG_PRESCALER_256              (IWDG_PR_PR_2 | IWDG_PR_PR_1)                   /*!< IWDG prescaler set to 256 */
 86  /**
 87    * @}
 88    */
 89  
 90  /**
 91    * @}
 92    */
 93  
 94  /* Exported macros -----------------------------------------------------------*/
 95  /** @defgroup IWDG_Exported_Macros IWDG Exported Macros
 96    * @{
 97    */
 98  
 99  /**
100    * @brief  Enable the IWDG peripheral.
101    * @param  __HANDLE__  IWDG handle
102    * @retval None
103    */
104  #define __HAL_IWDG_START(__HANDLE__)                WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
105  
106  /**
107    * @brief  Reload IWDG counter with value defined in the reload register
108    *         (write access to IWDG_PR and IWDG_RLR registers disabled).
109    * @param  __HANDLE__  IWDG handle
110    * @retval None
111    */
112  #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__)       WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
113  
114  /**
115    * @}
116    */
117  
118  /* Exported functions --------------------------------------------------------*/
119  /** @defgroup IWDG_Exported_Functions  IWDG Exported Functions
120    * @{
121    */
122  
123  /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
124    * @{
125    */
126  /* Initialization/Start functions  ********************************************/
127  HAL_StatusTypeDef     HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
128  /**
129    * @}
130    */
131  
132  /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
133    * @{
134    */
135  /* I/O operation functions ****************************************************/
136  HAL_StatusTypeDef     HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
137  /**
138    * @}
139    */
140  
141  /**
142    * @}
143    */
144  
145  /* Private constants ---------------------------------------------------------*/
146  /** @defgroup IWDG_Private_Constants IWDG Private Constants
147    * @{
148    */
149  
150  /**
151    * @brief  IWDG Key Register BitMask
152    */
153  #define IWDG_KEY_RELOAD                 0x0000AAAAu  /*!< IWDG Reload Counter Enable   */
154  #define IWDG_KEY_ENABLE                 0x0000CCCCu  /*!< IWDG Peripheral Enable       */
155  #define IWDG_KEY_WRITE_ACCESS_ENABLE    0x00005555u  /*!< IWDG KR Write Access Enable  */
156  #define IWDG_KEY_WRITE_ACCESS_DISABLE   0x00000000u  /*!< IWDG KR Write Access Disable */
157  
158  /**
159    * @}
160    */
161  
162  /* Private macros ------------------------------------------------------------*/
163  /** @defgroup IWDG_Private_Macros IWDG Private Macros
164    * @{
165    */
166  
167  /**
168    * @brief  Enable write access to IWDG_PR and IWDG_RLR registers.
169    * @param  __HANDLE__  IWDG handle
170    * @retval None
171    */
172  #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__)  WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
173  
174  /**
175    * @brief  Disable write access to IWDG_PR and IWDG_RLR registers.
176    * @param  __HANDLE__  IWDG handle
177    * @retval None
178    */
179  #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
180  
181  /**
182    * @brief  Check IWDG prescaler value.
183    * @param  __PRESCALER__  IWDG prescaler value
184    * @retval None
185    */
186  #define IS_IWDG_PRESCALER(__PRESCALER__)      (((__PRESCALER__) == IWDG_PRESCALER_4)  || \
187                                                 ((__PRESCALER__) == IWDG_PRESCALER_8)  || \
188                                                 ((__PRESCALER__) == IWDG_PRESCALER_16) || \
189                                                 ((__PRESCALER__) == IWDG_PRESCALER_32) || \
190                                                 ((__PRESCALER__) == IWDG_PRESCALER_64) || \
191                                                 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
192                                                 ((__PRESCALER__) == IWDG_PRESCALER_256))
193  
194  /**
195    * @brief  Check IWDG reload value.
196    * @param  __RELOAD__  IWDG reload value
197    * @retval None
198    */
199  #define IS_IWDG_RELOAD(__RELOAD__)            ((__RELOAD__) <= IWDG_RLR_RL)
200  
201  
202  
203  /**
204    * @}
205    */
206  
207  /**
208    * @}
209    */
210  
211  /**
212    * @}
213    */
214  
215  
216  #ifdef __cplusplus
217  }
218  #endif
219  
220  #endif /* STM32F4xx_HAL_IWDG_H */