mem.h
1 2 #ifndef __MEM_H__ 3 #define __MEM_H__ 4 5 6 #include "defs.h" 7 8 9 10 #define MBC_NONE 0 11 #define MBC_MBC1 1 12 #define MBC_MBC2 2 13 #define MBC_MBC3 3 14 #define MBC_MBC5 5 15 #define MBC_RUMBLE 15 16 #define MBC_HUC1 0xC1 17 #define MBC_HUC3 0xC3 18 19 struct mbc 20 { 21 int type; 22 int model; 23 int rombank; 24 int rambank; 25 int romsize; 26 int ramsize; 27 int enableram; 28 int batt; 29 byte *rmap[0x10], *wmap[0x10]; 30 }; 31 32 33 struct ram 34 { 35 byte hi[256]; 36 byte ibank[8][4096]; 37 byte (*sbank)[8192]; 38 int loaded; 39 }; 40 41 42 extern struct mbc mbc; 43 extern struct rom rom; 44 extern struct ram ram; 45 46 47 48 49 50 void mem_updatemap(void); //gp32 51 void ioreg_write(byte r, byte b); 52 void mbc_write(int a, byte b); 53 void mem_write(int a, byte b); 54 byte mem_read(int a); 55 56 57 static byte readb(int a) 58 { 59 return mem_read(a); 60 } 61 62 static void writeb(int a, byte b) 63 { 64 byte *p = mbc.wmap[a>>12]; 65 if (p) p[a] = b; 66 else mem_write(a, b); 67 } 68 69 static int readw(int a) 70 { 71 return mem_read(a) | (mem_read(a+1)<<8); 72 } 73 74 static void writew(int a, int w) 75 { 76 if ((a+1) & 0xfff) 77 { 78 byte *p = mbc.wmap[a>>12]; 79 if (p) 80 { 81 #ifdef IS_LITTLE_ENDIAN 82 #ifndef ALLOW_UNALIGNED_IO 83 if (a&1) 84 { 85 p[a] = w; 86 p[a+1] = w >> 8; 87 return; 88 } 89 #endif 90 *(uint16 *)(p+a) = w; 91 return; 92 #else 93 p[a] = w; 94 p[a+1] = w >> 8; 95 return; 96 #endif 97 } 98 } 99 mem_write(a, w); 100 mem_write(a+1, w>>8); 101 } 102 103 static byte readhi(int a) 104 { 105 return readb(a | 0xff00); 106 } 107 108 static void writehi(int a, byte b) 109 { 110 writeb(a | 0xff00, b); 111 } 112 113 114 115 extern void mbc_reset(); 116 117 118 #endif 119 120 121