cpu.h
1 /***************************************************************************** 2 3 This file is part of x2600, the Atari 2600 Emulator 4 =================================================== 5 6 Copyright 1996 Alex Hornby. For contributions see the file CREDITS. 7 8 This software is distributed under the terms of the GNU General Public 9 License. This is free software with ABSOLUTELY NO WARRANTY. 10 11 See the file COPYING for details. 12 13 $Id: cpu.h,v 1.6 1997/11/22 14:29:54 ahornby Exp $ 14 ******************************************************************************/ 15 /* 16 * 17 * This file was part of x64. 18 * 19 * This file contains useful stuff when you are creating 20 * virtual machine like MCS6510 based microcomputer. 21 * 22 * Included are: 23 * o registers 24 * o flags in PSW 25 * o addressing modes 26 * 27 * Written by 28 * Vesa-Matti Puro (vmp@lut.fi) 29 * Jarkko Sonninen (sonninen@lut.fi) 30 * Jouko Valta (jopi@stekt.oulu.fi) 31 * 32 * 33 */ 34 35 #ifndef X2600_CPU_H 36 #define X2600_CPU_H 37 38 #include "types.h" 39 40 /* 6507 Registers. */ 41 #define AC accumulator 42 #define XR x_register 43 #define YR y_register 44 #define SP stack_pointer 45 #define pc6507 program_counter 46 #define PCH ((pc6507>>8)&0xff) 47 #define PCL (pc6507&0xff) 48 49 #define ZF zero_flag 50 #define SF sign_flag 51 #define OF overflow_flag 52 #define BF break_flag 53 #define DF decimal_flag 54 #define IF interrupt_flag 55 #define CF carry_flag 56 57 58 /* Masks which indicate location of status flags in PSW. */ 59 #define S_SIGN 0x80 60 #define S_OVERFLOW 0x40 61 #define S_NOTUSED 0x20 62 #define S_BREAK 0x10 63 #define S_DECIMAL 0x08 64 #define S_INTERRUPT 0x04 65 #define S_ZERO 0x02 66 #define S_CARRY 0x01 67 68 69 /* ADDRESSING MODES */ 70 71 #define IMPLIED 0 72 #define ACCUMULATOR 1 73 #define IMMEDIATE 2 74 75 #define ZERO_PAGE 3 76 #define ZERO_PAGE_X 4 77 #define ZERO_PAGE_Y 5 78 79 #define ABSOLUTE 6 80 #define ABSOLUTE_X 7 81 #define ABSOLUTE_Y 8 82 83 #define ABS_INDIRECT 9 84 #define INDIRECT_X 10 85 #define INDIRECT_Y 11 86 87 #define RELATIVE 12 88 89 #define ASS_CODE 13 90 91 92 /* 93 * Declaration for lookup-table which is used to translate MOS6502 94 * machine instructions. Machine code is used as index to array called 95 * lookup. Pointer to function is then fetched from array and function 96 * is called. 97 */ 98 99 extern struct lookup_tag { 100 char *mnemonic; /* Selfdocumenting? */ 101 short addr_mode; 102 unsigned char source; 103 unsigned char destination; 104 unsigned char cycles; 105 unsigned char pbc_fix; /* Cycle for Page Boundary Crossing */ 106 } lookup[]; 107 108 109 /* Addressing mode (addr_mode) is used when instruction is diassembled 110 * or assembled by diassembler or assembler. This is used i.e. 111 * in function char *sprint_opcode() in the file misc.c. 112 * 113 * MOS6502 addressing modes are #defined in the file "vmachine.h". 114 * 115 * Mnemonic is character string telling the name of the instruction. 116 */ 117 118 #define M_NONE 0 119 #define M_AC 1 120 #define M_XR 2 121 #define M_YR 3 122 #define M_SP 4 123 #define M_SR 5 124 #define M_PC 6 125 #define M_IMM 7 126 #define M_ZERO 8 127 #define M_ZERX 9 128 #define M_ZERY 10 129 #define M_ABS 11 130 #define M_ABSX 12 131 #define M_ABSY 13 132 #define M_AIND 14 133 #define M_INDX 15 134 #define M_INDY 16 135 #define M_REL 17 136 #define M_FC 18 137 #define M_FD 19 138 #define M_FI 20 139 #define M_FV 21 140 #define M_ADDR 22 141 #define M_ 23 142 143 #ifndef NO_UNDOC_CMDS 144 #define M_ACIM 24 /* Source: AC & IMMED (bus collision) */ 145 #define M_ANXR 25 /* Source: AC & XR (bus collision) */ 146 #define M_AXIM 26 /* Source: (AC | #EE) & XR & IMMED (bus collision) */ 147 #define M_ACNC 27 /* Dest: M_AC and Carry = Negative */ 148 #define M_ACXR 28 /* Dest: M_AC, M_XR */ 149 150 #define M_SABY 29 /* Source: (ABS_Y & SP) (bus collision) */ 151 #define M_ACXS 30 /* Dest: M_AC, M_XR, M_SP */ 152 #define M_STH0 31 /* Dest: Store (src & Addr_Hi+1) to (Addr +0x100) */ 153 #define M_STH1 32 154 #define M_STH2 33 155 #define M_STH3 34 156 157 #else 158 #define M_ACIM M_NONE 159 #define M_ANXR M_NONE 160 #define M_AXIM M_NONE 161 #define M_ACNC M_NONE 162 #define M_ACXR M_NONE 163 164 #define M_SABY M_NONE 165 #define M_ACXS M_NONE 166 #define M_STH0 M_NONE 167 #define M_STH1 M_NONE 168 #define M_STH2 M_NONE 169 #define M_STH3 M_NONE 170 #endif 171 172 173 174 #endif /* X2600_CPU_H */ 175 176 177 178 179 180 181 182