/ PIN_SVTW4_24_24_48.vhd
PIN_SVTW4_24_24_48.vhd
1 library IEEE; 2 use IEEE.std_logic_1164.all; -- defines std_logic types 3 use IEEE.STD_LOGIC_ARITH.ALL; 4 use IEEE.STD_LOGIC_UNSIGNED.ALL; 5 6 -- Copyright (C) 2007, Peter C. Wallace, Mesa Electronics 7 -- http://www.mesanet.com 8 -- 9 -- This program is is licensed under a disjunctive dual license giving you 10 -- the choice of one of the two following sets of free software/open source 11 -- licensing terms: 12 -- 13 -- * GNU General Public License (GPL), version 2.0 or later 14 -- * 3-clause BSD License 15 -- 16 -- 17 -- The GNU GPL License: 18 -- 19 -- This program is free software; you can redistribute it and/or modify 20 -- it under the terms of the GNU General Public License as published by 21 -- the Free Software Foundation; either version 2 of the License, or 22 -- (at your option) any later version. 23 -- 24 -- This program is distributed in the hope that it will be useful, 25 -- but WITHOUT ANY WARRANTY; without even the implied warranty of 26 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 27 -- GNU General Public License for more details. 28 -- 29 -- You should have received a copy of the GNU General Public License 30 -- along with this program; if not, write to the Free Software 31 -- Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 32 -- 33 -- 34 -- The 3-clause BSD License: 35 -- 36 -- Redistribution and use in source and binary forms, with or without 37 -- modification, are permitted provided that the following conditions 38 -- are met: 39 -- 40 -- * Redistributions of source code must retain the above copyright 41 -- notice, this list of conditions and the following disclaimer. 42 -- 43 -- * Redistributions in binary form must reproduce the above 44 -- copyright notice, this list of conditions and the following 45 -- disclaimer in the documentation and/or other materials 46 -- provided with the distribution. 47 -- 48 -- * Neither the name of Mesa Electronics nor the names of its 49 -- contributors may be used to endorse or promote products 50 -- derived from this software without specific prior written 51 -- permission. 52 -- 53 -- 54 -- Disclaimer: 55 -- 56 -- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 57 -- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 58 -- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 59 -- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 60 -- COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 61 -- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 62 -- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 63 -- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 64 -- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 65 -- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 66 -- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 -- POSSIBILITY OF SUCH DAMAGE. 68 -- 69 70 use work.IDROMConst.all; 71 72 package PIN_SVTW4_24_24_48 is 73 constant ModuleID : ModuleIDType :=( 74 (WatchDogTag, x"00", ClockLowTag, x"01", WatchDogTimeAddr&PadT, WatchDogNumRegs, x"00", WatchDogMPBitMask), 75 (IOPortTag, x"00", ClockLowTag, x"02", PortAddr&PadT, IOPortNumRegs, x"00", IOPortMPBitMask), 76 (QcountTag, x"02", ClockLowTag, x"04", QcounterAddr&PadT, QCounterNumRegs, x"00", QCounterMPBitMask), 77 (PWMTag, x"00", ClockHighTag, x"04", PWMValAddr&PadT, PWMNumRegs, x"00", PWMMPBitMask), 78 (TwiddlerTag, x"00", ClockLowTag, x"01", TwiddlerDataAddr&PadT, TwiddlerNumRegs, x"00", TwiddlerMPBitMask), 79 (LEDTag, x"00", ClockLowTag, x"01", LEDAddr&PadT, LEDNumRegs, x"00", LEDMPBitMask), 80 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 81 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 82 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 83 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 84 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 85 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 86 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 87 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 88 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 89 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 90 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 91 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 92 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 93 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 94 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 95 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 96 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 97 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 98 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 99 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 100 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 101 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 102 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 103 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 104 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), 105 (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000") 106 ); 107 108 109 constant PinDesc : PinDescType :=( 110 -- Base func sec unit sec func sec pin 111 IOPortTag & x"01" & QCountTag & x"02", -- I/O 00 112 IOPortTag & x"01" & QCountTag & x"01", -- I/O 01 113 IOPortTag & x"00" & QCountTag & x"02", -- I/O 02 114 IOPortTag & x"00" & QCountTag & x"01", -- I/O 03 115 IOPortTag & x"01" & QCountTag & x"03", -- I/O 04 116 IOPortTag & x"00" & QCountTag & x"03", -- I/O 05 117 IOPortTag & x"01" & PWMTag & x"81", -- I/O 06 118 IOPortTag & x"00" & PWMTag & x"81", -- I/O 07 119 IOPortTag & x"01" & PWMTag & x"82", -- I/O 08 120 IOPortTag & x"00" & PWMTag & x"82", -- I/O 09 121 IOPortTag & x"01" & PWMTag & x"83", -- I/O 10 122 IOPortTag & x"00" & PWMTag & x"83", -- I/O 11 123 IOPortTag & x"03" & QCountTag & x"02", -- I/O 12 124 IOPortTag & x"03" & QCountTag & x"01", -- I/O 13 125 IOPortTag & x"02" & QCountTag & x"02", -- I/O 14 126 IOPortTag & x"02" & QCountTag & x"01", -- I/O 15 127 IOPortTag & x"03" & QCountTag & x"03", -- I/O 16 128 IOPortTag & x"02" & QCountTag & x"03", -- I/O 17 129 IOPortTag & x"03" & PWMTag & x"81", -- I/O 18 130 IOPortTag & x"02" & PWMTag & x"81", -- I/O 19 131 IOPortTag & x"03" & PWMTag & x"82", -- I/O 20 132 IOPortTag & x"02" & PWMTag & x"82", -- I/O 21 133 IOPortTag & x"03" & PWMTag & x"83", -- I/O 22 134 IOPortTag & x"02" & PWMTag & x"83", -- I/O 23 135 136 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO0Pin, -- I/O 24 137 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO1Pin, -- I/O 25 138 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO2Pin, -- I/O 26 139 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO3Pin, -- I/O 27 140 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO4Pin, -- I/O 28 141 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO5Pin, -- I/O 29 142 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO6Pin, -- I/O 30 143 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO7Pin, -- I/O 31 144 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO8Pin, -- I/O 32 145 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO9Pin, -- I/O 33 146 IOPortTag & x"00" & TwiddlerTag & TwiddlerIOAPin, -- I/O 34 147 IOPortTag & x"00" & TwiddlerTag & TwiddlerIOBPin, -- I/O 35 148 IOPortTag & x"00" & TwiddlerTag & TwiddlerIOCPin, -- I/O 36 149 IOPortTag & x"00" & TwiddlerTag & TwiddlerIODPin, -- I/O 37 150 IOPortTag & x"00" & TwiddlerTag & TwiddlerIOEPin, -- I/O 38 151 IOPortTag & x"00" & TwiddlerTag & TwiddlerIOFPin, -- I/O 39 152 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO10Pin, -- I/O 40 153 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO11Pin, -- I/O 41 154 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO12Pin, -- I/O 42 155 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO13Pin, -- I/O 43 156 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO14Pin, -- I/O 44 157 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO15Pin, -- I/O 45 158 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO16Pin, -- I/O 46 159 IOPortTag & x"00" & TwiddlerTag & TwiddlerIO17Pin, -- I/O 47 160 161 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, -- added for IDROM v3 162 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, 163 164 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, 165 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, 166 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, 167 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, 168 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, 169 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, 170 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, 171 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, 172 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, 173 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin); 174 175 end package PIN_SVTW4_24_24_48;