esp32s2.project.ld.in
1 /* Default entry point: */ 2 ENTRY(call_start_cpu0); 3 4 SECTIONS 5 { 6 /* RTC fast memory holds RTC wake stub code, 7 including from any source file named rtc_wake_stub*.c 8 */ 9 .rtc.text : 10 { 11 _rtc_text_start = ABSOLUTE(.); 12 . = ALIGN(4); 13 14 _rtc_code_start = .; 15 16 mapping[rtc_text] 17 18 *rtc_wake_stub*.*(.literal .text .literal.* .text.*) 19 _rtc_code_end = .; 20 21 /* possibly align + add 16B for CPU dummy speculative instr. fetch */ 22 . = ((_rtc_code_end - _rtc_code_start) == 0) ? ALIGN(0) : ALIGN(4) + 16; 23 24 _rtc_text_end = ABSOLUTE(.); 25 } > rtc_iram_seg 26 27 /* 28 This section is required to skip rtc.text area because rtc_iram_seg and 29 rtc_data_seg are reflect the same address space on different buses. 30 */ 31 .rtc.dummy : 32 { 33 _rtc_dummy_start = ABSOLUTE(.); 34 _rtc_fast_start = ABSOLUTE(.); 35 . = SIZEOF(.rtc.text); 36 _rtc_dummy_end = ABSOLUTE(.); 37 } > rtc_data_seg 38 39 /* This section located in RTC FAST Memory area. 40 It holds data marked with RTC_FAST_ATTR attribute. 41 See the file "esp_attr.h" for more information. 42 */ 43 .rtc.force_fast : 44 { 45 . = ALIGN(4); 46 _rtc_force_fast_start = ABSOLUTE(.); 47 48 _coredump_rtc_fast_start = ABSOLUTE(.); 49 mapping[rtc_fast_coredump] 50 _coredump_rtc_fast_end = ABSOLUTE(.); 51 52 *(.rtc.force_fast .rtc.force_fast.*) 53 . = ALIGN(4) ; 54 _rtc_force_fast_end = ABSOLUTE(.); 55 } > rtc_data_seg 56 57 /* RTC data section holds RTC wake stub 58 data/rodata, including from any source file 59 named rtc_wake_stub*.c and the data marked with 60 RTC_DATA_ATTR, RTC_RODATA_ATTR attributes. 61 The memory location of the data is dependent on 62 CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option. 63 */ 64 .rtc.data : 65 { 66 _rtc_data_start = ABSOLUTE(.); 67 68 /* coredump mapping */ 69 _coredump_rtc_start = ABSOLUTE(.); 70 mapping[rtc_coredump] 71 _coredump_rtc_end = ABSOLUTE(.); 72 73 /* should be placed after coredump mapping */ 74 mapping[rtc_data] 75 76 *rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*) 77 _rtc_data_end = ABSOLUTE(.); 78 } > rtc_data_location 79 80 /* RTC bss, from any source file named rtc_wake_stub*.c */ 81 .rtc.bss (NOLOAD) : 82 { 83 _rtc_bss_start = ABSOLUTE(.); 84 *rtc_wake_stub*.*(.bss .bss.*) 85 *rtc_wake_stub*.*(COMMON) 86 87 mapping[rtc_bss] 88 89 _rtc_bss_end = ABSOLUTE(.); 90 } > rtc_data_location 91 92 /* This section holds data that should not be initialized at power up 93 and will be retained during deep sleep. 94 User data marked with RTC_NOINIT_ATTR will be placed 95 into this section. See the file "esp_attr.h" for more information. 96 The memory location of the data is dependent on 97 CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option. 98 */ 99 .rtc_noinit (NOLOAD): 100 { 101 . = ALIGN(4); 102 _rtc_noinit_start = ABSOLUTE(.); 103 *(.rtc_noinit .rtc_noinit.*) 104 . = ALIGN(4) ; 105 _rtc_noinit_end = ABSOLUTE(.); 106 } > rtc_data_location 107 108 /* This section located in RTC SLOW Memory area. 109 It holds data marked with RTC_SLOW_ATTR attribute. 110 See the file "esp_attr.h" for more information. 111 */ 112 .rtc.force_slow : 113 { 114 . = ALIGN(4); 115 _rtc_force_slow_start = ABSOLUTE(.); 116 *(.rtc.force_slow .rtc.force_slow.*) 117 . = ALIGN(4) ; 118 _rtc_force_slow_end = ABSOLUTE(.); 119 } > rtc_slow_seg 120 121 /* Get size of rtc slow data based on rtc_data_location alias */ 122 _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) 123 ? (_rtc_force_slow_end - _rtc_data_start) 124 : (_rtc_force_slow_end - _rtc_force_slow_start); 125 126 _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) 127 ? (_rtc_force_fast_end - _rtc_fast_start) 128 : (_rtc_noinit_end - _rtc_fast_start); 129 130 ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)), 131 "RTC_SLOW segment data does not fit.") 132 133 ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)), 134 "RTC_FAST segment data does not fit.") 135 136 /* Send .iram0 code to iram */ 137 .iram0.vectors : 138 { 139 _iram_start = ABSOLUTE(.); 140 /* Vectors go to IRAM */ 141 _init_start = ABSOLUTE(.); 142 /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */ 143 . = 0x0; 144 KEEP(*(.WindowVectors.text)); 145 . = 0x180; 146 KEEP(*(.Level2InterruptVector.text)); 147 . = 0x1c0; 148 KEEP(*(.Level3InterruptVector.text)); 149 . = 0x200; 150 KEEP(*(.Level4InterruptVector.text)); 151 . = 0x240; 152 KEEP(*(.Level5InterruptVector.text)); 153 . = 0x280; 154 KEEP(*(.DebugExceptionVector.text)); 155 . = 0x2c0; 156 KEEP(*(.NMIExceptionVector.text)); 157 . = 0x300; 158 KEEP(*(.KernelExceptionVector.text)); 159 . = 0x340; 160 KEEP(*(.UserExceptionVector.text)); 161 . = 0x3C0; 162 KEEP(*(.DoubleExceptionVector.text)); 163 . = 0x400; 164 _invalid_pc_placeholder = ABSOLUTE(.); 165 *(.*Vector.literal) 166 167 *(.UserEnter.literal); 168 *(.UserEnter.text); 169 . = ALIGN (16); 170 *(.entry.text) 171 *(.init.literal) 172 *(.init) 173 _init_end = ABSOLUTE(.); 174 } > iram0_0_seg 175 176 .iram0.text : 177 { 178 /* Code marked as runnning out of IRAM */ 179 _iram_text_start = ABSOLUTE(.); 180 181 mapping[iram0_text] 182 183 /* added to maintain compability */ 184 _coredump_iram_start = 0; 185 _coredump_iram_end = 0; 186 187 /* align + add 16B for CPU dummy speculative instr. fetch */ 188 . = ALIGN(4) + 16; 189 _iram_text_end = ABSOLUTE(.); 190 _iram_end = ABSOLUTE(.); 191 } > iram0_0_seg 192 193 .dram0_reserved_for_iram (NOLOAD): 194 { 195 . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start; 196 } > dram0_0_seg 197 198 .dram0.data : 199 { 200 _data_start = ABSOLUTE(.); 201 *(.gnu.linkonce.d.*) 202 *(.data1) 203 *(.sdata) 204 *(.sdata.*) 205 *(.gnu.linkonce.s.*) 206 *(.sdata2) 207 *(.sdata2.*) 208 *(.gnu.linkonce.s2.*) 209 *(.jcr) 210 211 /* coredump mapping */ 212 _coredump_dram_start = ABSOLUTE(.); 213 mapping[dram_coredump] 214 _coredump_dram_end = ABSOLUTE(.); 215 216 /* should be placed after coredump mapping */ 217 _esp_system_init_fn_array_start = ABSOLUTE(.); 218 KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*))) 219 _esp_system_init_fn_array_end = ABSOLUTE(.); 220 221 mapping[dram0_data] 222 223 _data_end = ABSOLUTE(.); 224 . = ALIGN(4); 225 } > dram0_0_seg 226 227 /*This section holds data that should not be initialized at power up. 228 The section located in Internal SRAM memory region. The macro _NOINIT 229 can be used as attribute to place data into this section. 230 See the esp_attr.h file for more information. 231 */ 232 .noinit (NOLOAD): 233 { 234 . = ALIGN(4); 235 _noinit_start = ABSOLUTE(.); 236 *(.noinit .noinit.*) 237 . = ALIGN(4) ; 238 _noinit_end = ABSOLUTE(.); 239 } > dram0_0_seg 240 241 /* Shared RAM */ 242 .dram0.bss (NOLOAD) : 243 { 244 . = ALIGN (8); 245 _bss_start = ABSOLUTE(.); 246 *(.ext_ram.bss*) 247 248 mapping[dram0_bss] 249 250 *(.dynsbss) 251 *(.sbss) 252 *(.sbss.*) 253 *(.gnu.linkonce.sb.*) 254 *(.scommon) 255 *(.sbss2) 256 *(.sbss2.*) 257 *(.gnu.linkonce.sb2.*) 258 *(.dynbss) 259 *(.share.mem) 260 *(.gnu.linkonce.b.*) 261 262 . = ALIGN (8); 263 _bss_end = ABSOLUTE(.); 264 } > dram0_0_seg 265 266 /* When modifying the alignment, update tls_section_alignment in pxPortInitialiseStack */ 267 .flash.rodata : ALIGN(0x10) 268 { 269 _rodata_reserved_start = ABSOLUTE(.); 270 _rodata_start = ABSOLUTE(.); 271 272 *(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */ 273 *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */ 274 275 mapping[flash_rodata] 276 277 *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ 278 *(.gnu.linkonce.r.*) 279 *(.rodata1) 280 __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); 281 *(.xt_except_table) 282 *(.gcc_except_table .gcc_except_table.*) 283 *(.gnu.linkonce.e.*) 284 *(.gnu.version_r) 285 . = (. + 3) & ~ 3; 286 __eh_frame = ABSOLUTE(.); 287 KEEP(*(.eh_frame)) 288 . = (. + 7) & ~ 3; 289 /* C++ constructor and destructor tables 290 291 Make a point of not including anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt 292 */ 293 __init_array_start = ABSOLUTE(.); 294 KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*))) 295 __init_array_end = ABSOLUTE(.); 296 KEEP (*crtbegin.*(.dtors)) 297 KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) 298 KEEP (*(SORT(.dtors.*))) 299 KEEP (*(.dtors)) 300 /* C++ exception handlers table: */ 301 __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); 302 *(.xt_except_desc) 303 *(.gnu.linkonce.h.*) 304 __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); 305 *(.xt_except_desc_end) 306 *(.dynamic) 307 *(.gnu.version_d) 308 /* Addresses of memory regions reserved via 309 SOC_RESERVE_MEMORY_REGION() */ 310 soc_reserved_memory_region_start = ABSOLUTE(.); 311 KEEP (*(.reserved_memory_address)) 312 soc_reserved_memory_region_end = ABSOLUTE(.); 313 _rodata_end = ABSOLUTE(.); 314 /* Literals are also RO data. */ 315 _lit4_start = ABSOLUTE(.); 316 *(*.lit4) 317 *(.lit4.*) 318 *(.gnu.linkonce.lit4.*) 319 _lit4_end = ABSOLUTE(.); 320 . = ALIGN(4); 321 _thread_local_start = ABSOLUTE(.); 322 *(.tdata) 323 *(.tdata.*) 324 *(.tbss) 325 *(.tbss.*) 326 _thread_local_end = ABSOLUTE(.); 327 _rodata_reserved_end = ABSOLUTE(.); 328 . = ALIGN(4); 329 } >default_rodata_seg 330 331 .flash.text : 332 { 333 _stext = .; 334 _instruction_reserved_start = ABSOLUTE(.); 335 _text_start = ABSOLUTE(.); 336 337 mapping[flash_text] 338 339 *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) 340 *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ 341 *(.fini.literal) 342 *(.fini) 343 *(.gnu.version) 344 _text_end = ABSOLUTE(.); 345 _instruction_reserved_end = ABSOLUTE(.); 346 _etext = .; 347 348 /* Similar to _iram_start, this symbol goes here so it is 349 resolved by addr2line in preference to the first symbol in 350 the flash.text segment. 351 */ 352 _flash_cache_start = ABSOLUTE(0); 353 } >default_code_seg 354 355 /* Marks the end of IRAM code segment */ 356 .iram0.text_end (NOLOAD) : 357 { 358 . = ALIGN (4); 359 _iram_end = ABSOLUTE(.); 360 } > iram0_0_seg 361 362 /* Marks the end of data, bss and possibly rodata */ 363 .dram0.heap_start (NOLOAD) : 364 { 365 . = ALIGN (8); 366 _heap_start = ABSOLUTE(.); 367 } > dram0_0_seg 368 } 369 370 ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), 371 "IRAM0 segment data does not fit.") 372 373 ASSERT(((_heap_start - _data_start) <= LENGTH(dram0_0_seg)), 374 "DRAM segment data does not fit.")