1  menu "Ethernet"
  2  
  3      # Invisible item that is enabled if any Ethernet selection is made
  4      config ETH_ENABLED
  5          bool
  6  
  7      menuconfig ETH_USE_ESP32_EMAC
  8          depends on IDF_TARGET_ESP32
  9          bool "Support ESP32 internal EMAC controller"
 10          default y
 11          select ETH_ENABLED
 12          help
 13              ESP32 integrates a 10/100M Ethernet MAC controller.
 14  
 15      if ETH_USE_ESP32_EMAC
 16          choice ETH_PHY_INTERFACE
 17              prompt "PHY interface"
 18              default ETH_PHY_INTERFACE_RMII
 19              help
 20                  Select the communication interface between MAC and PHY chip.
 21  
 22              config ETH_PHY_INTERFACE_RMII
 23                  bool "Reduced Media Independent Interface (RMII)"
 24  
 25              config ETH_PHY_INTERFACE_MII
 26                  bool "Media Independent Interface (MII)"
 27          endchoice
 28  
 29          if ETH_PHY_INTERFACE_RMII
 30              choice ETH_RMII_CLK_MODE
 31                  prompt "RMII clock mode"
 32                  default ETH_RMII_CLK_INPUT
 33                  help
 34                      Select external or internal RMII clock.
 35  
 36                  config ETH_RMII_CLK_INPUT
 37                      bool "Input RMII clock from external"
 38                      help
 39                          MAC will get RMII clock from outside.
 40                          Note that ESP32 only supports GPIO0 to input the RMII clock.
 41  
 42                  config ETH_RMII_CLK_OUTPUT
 43                      bool "Output RMII clock from internal"
 44                      help
 45                          ESP32 can generate RMII clock by internal APLL.
 46                          This clock can be routed to the external PHY device.
 47                          ESP32 supports to route the RMII clock to GPIO0/16/17.
 48              endchoice
 49          endif
 50  
 51          if ETH_RMII_CLK_INPUT
 52              config ETH_RMII_CLK_IN_GPIO
 53                  int
 54                  range 0 0
 55                  default 0
 56                  help
 57                      ESP32 only supports GPIO0 to input the RMII clock.
 58          endif
 59  
 60          if ETH_RMII_CLK_OUTPUT
 61              config ETH_RMII_CLK_OUTPUT_GPIO0
 62                  bool "Output RMII clock from GPIO0 (Experimental!)"
 63                  default n
 64                  help
 65                      GPIO0 can be set to output a pre-divided PLL clock (test only!).
 66                      Enabling this option will configure GPIO0 to output a 50MHz clock.
 67                      In fact this clock doesn't have directly relationship with EMAC peripheral.
 68                      Sometimes this clock won't work well with your PHY chip. You might need to
 69                      add some extra devices after GPIO0 (e.g. inverter).
 70                      Note that outputting RMII clock on GPIO0 is an experimental practice.
 71                      If you want the Ethernet to work with WiFi, don't select GPIO0 output mode for stability.
 72  
 73              if !ETH_RMII_CLK_OUTPUT_GPIO0
 74                  config ETH_RMII_CLK_OUT_GPIO
 75                      int "RMII clock GPIO number"
 76                      range 16 17
 77                      default 17
 78                      help
 79                          Set the GPIO number to output RMII Clock.
 80              endif
 81          endif
 82  
 83          config ETH_DMA_BUFFER_SIZE
 84              int "Ethernet DMA buffer size (Byte)"
 85              range 256 1600
 86              default 512
 87              help
 88                  Set the size of each buffer used by Ethernet MAC DMA.
 89  
 90          config ETH_DMA_RX_BUFFER_NUM
 91              int "Amount of Ethernet DMA Rx buffers"
 92              range 3 30
 93              default 10
 94              help
 95                  Number of DMA receive buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE.
 96                  Larger number of buffers could increase throughput somehow.
 97  
 98          config ETH_DMA_TX_BUFFER_NUM
 99              int "Amount of Ethernet DMA Tx buffers"
100              range 3 30
101              default 10
102              help
103                  Number of DMA transmit buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE.
104                  Larger number of buffers could increase throughput somehow.
105      endif
106  
107      menuconfig ETH_USE_SPI_ETHERNET
108          bool "Support SPI to Ethernet Module"
109          default y
110          select ETH_ENABLED
111          help
112              ESP-IDF can also support some SPI-Ethernet modules.
113  
114      if ETH_USE_SPI_ETHERNET
115          config ETH_SPI_ETHERNET_DM9051
116              bool "Use DM9051"
117              help
118                  DM9051 is a fast Ethernet controller with an SPI interface.
119                  It's also integrated with a 10/100M PHY and MAC.
120                  Select to enable DM9051 driver.
121      endif
122  
123      menuconfig ETH_USE_OPENETH
124          bool "Support OpenCores Ethernet MAC (for use with QEMU)"
125          default n
126          select ETH_ENABLED
127          help
128              OpenCores Ethernet MAC driver can be used when an ESP-IDF application
129              is executed in QEMU. This driver is not supported when running on a
130              real chip.
131  
132      if ETH_USE_OPENETH
133          config ETH_OPENETH_DMA_RX_BUFFER_NUM
134              int "Number of Ethernet DMA Rx buffers"
135              range 1 64
136              default 4
137              help
138                  Number of DMA receive buffers, each buffer is 1600 bytes.
139  
140          config ETH_OPENETH_DMA_TX_BUFFER_NUM
141              int "Number of Ethernet DMA Tx buffers"
142              range 1 64
143              default 1
144              help
145                  Number of DMA transmit buffers, each buffer is 1600 bytes.
146      endif
147  endmenu