board-day-worksheet.html
1 <!doctype html> 2 <html lang="en"> 3 <head> 4 <meta charset="utf-8"> 5 <meta name="viewport" content="width=device-width, initial-scale=1"> 6 <title>AERIS-10 Docs | Board-Day Worksheet</title> 7 <link rel="stylesheet" href="assets/style.css"> 8 </head> 9 <body> 10 <header class="topbar"> 11 <div class="container nav"> 12 <a class="brand" href="index.html">AERIS-10 Docs</a> 13 <nav> 14 <a href="architecture.html">Architecture</a> 15 <a href="implementation-log.html">Implementation Log</a> 16 <a href="bring-up.html">Bring-Up</a> 17 <a href="reports.html">Reports</a> 18 <a href="release-notes.html">Release Notes</a> 19 </nav> 20 </div> 21 </header> 22 23 <main class="container page"> 24 <section class="hero"> 25 <p class="eyebrow">Board-Day Execution</p> 26 <h1>Board-Day Worksheet</h1> 27 <p>Printable operator worksheet for the first FPGA module and carrier-board sessions. Use this alongside the bring-up plan and artifact inventory to capture evidence, pass/fail state, and blockers in real time.</p> 28 <div class="cta-row"> 29 <a class="button" href="bring-up.html">Open Bring-Up Plan</a> 30 <a class="button ghost" href="reports.html">Open Artifact Inventory</a> 31 </div> 32 </section> 33 34 <section class="card" style="margin-top:0.8rem;"> 35 <h2>Session metadata</h2> 36 <div class="table-wrap"> 37 <table> 38 <tbody> 39 <tr><td>Date / Time</td><td></td><td>Operator</td><td></td></tr> 40 <tr><td>Carrier board revision</td><td></td><td>FPGA module revision</td><td></td></tr> 41 <tr><td>MCU firmware commit</td><td></td><td>FPGA bitstream / probes tag</td><td></td></tr> 42 <tr><td>Power supply setup</td><td></td><td>Ambient temperature</td><td></td></tr> 43 </tbody> 44 </table> 45 </div> 46 </section> 47 48 <section class="card" style="margin-top:0.8rem;"> 49 <h2>Pre-power checks</h2> 50 <div class="table-wrap"> 51 <table> 52 <thead> 53 <tr> 54 <th>Check</th> 55 <th>Expected evidence</th> 56 <th>Status</th> 57 <th>Notes</th> 58 </tr> 59 </thead> 60 <tbody> 61 <tr><td>Carrier jumpers / default straps reviewed</td><td>Documented against board notes</td><td></td><td></td></tr> 62 <tr><td>Module seating and connectors inspected</td><td>No bent pins, no obvious shorts, no cable strain</td><td></td><td></td></tr> 63 <tr><td>RF transmit path kept disabled for initial power-up</td><td>Safe GPIO / supply state confirmed</td><td></td><td></td></tr> 64 <tr><td>Chosen image set identified</td><td>Heartbeat, debug, or baseline image selected intentionally</td><td></td><td></td></tr> 65 </tbody> 66 </table> 67 </div> 68 </section> 69 70 <section class="card" style="margin-top:0.8rem;"> 71 <h2>Power and configuration checks</h2> 72 <div class="table-wrap"> 73 <table> 74 <thead> 75 <tr> 76 <th>Step</th> 77 <th>Expected evidence</th> 78 <th>Status</th> 79 <th>Notes</th> 80 </tr> 81 </thead> 82 <tbody> 83 <tr><td>Initial power applied</td><td>Idle current within planned envelope, no thermal surprise</td><td></td><td></td></tr> 84 <tr><td>JTAG enumeration</td><td>Target device visible in hardware manager</td><td></td><td></td></tr> 85 <tr><td>Bitstream programming</td><td>DONE = HIGH, INIT_COMPLETE = asserted</td><td></td><td></td></tr> 86 <tr><td>Optional probes load</td><td>Expected ILA cores enumerate</td><td></td><td></td></tr> 87 <tr><td>Reset / heartbeat sanity</td><td>Deterministic reset release and status activity</td><td></td><td></td></tr> 88 </tbody> 89 </table> 90 </div> 91 </section> 92 93 <section class="card" style="margin-top:0.8rem;"> 94 <h2>Firmware and control-path checks</h2> 95 <div class="table-wrap"> 96 <table> 97 <thead> 98 <tr> 99 <th>Check</th> 100 <th>Expected evidence</th> 101 <th>Status</th> 102 <th>Notes</th> 103 </tr> 104 </thead> 105 <tbody> 106 <tr><td>USART3 bring-up log</td><td>Boot messages present with timestamps</td><td></td><td></td></tr> 107 <tr><td>AD9523 status</td><td>Status pins/logs indicate healthy clocking</td><td></td><td></td></tr> 108 <tr><td>ADF4382A TX/RX init</td><td>Initialization returns OK, lock states sensible</td><td></td><td></td></tr> 109 <tr><td>ADAR1000 communication</td><td>Scratchpad/readback passes on all devices</td><td></td><td></td></tr> 110 <tr><td>Temperature / health checks</td><td>No early overtemp, fault, or emergency shutdown</td><td></td><td></td></tr> 111 </tbody> 112 </table> 113 </div> 114 </section> 115 116 <section class="card" style="margin-top:0.8rem;"> 117 <h2>FPGA data-path and USB checks</h2> 118 <div class="table-wrap"> 119 <table> 120 <thead> 121 <tr> 122 <th>Stage</th> 123 <th>Expected evidence</th> 124 <th>Status</th> 125 <th>Notes</th> 126 </tr> 127 </thead> 128 <tbody> 129 <tr><td>Raw ADC visibility</td><td>ILA or status evidence shows activity on expected clock</td><td></td><td></td></tr> 130 <tr><td>DDC / matched-filter activity</td><td>Valid strobes and non-flat outputs observed</td><td></td><td></td></tr> 131 <tr><td>USB framing sanity</td><td>Headers, payload length, and footer remain consistent</td><td></td><td></td></tr> 132 <tr><td>FT601 behavior</td><td>No obvious backpressure or bus-direction anomalies</td><td></td><td></td></tr> 133 <tr><td>Sustained streaming trial</td><td>No immediate lockup, framing drift, or reset event</td><td></td><td></td></tr> 134 </tbody> 135 </table> 136 </div> 137 </section> 138 139 <section class="grid-2" style="margin-top:0.8rem;"> 140 <article class="card"> 141 <h2>Measurements to record</h2> 142 <div class="table-wrap"> 143 <table> 144 <thead> 145 <tr> 146 <th>Measurement</th> 147 <th>Observed value</th> 148 <th>Notes</th> 149 </tr> 150 </thead> 151 <tbody> 152 <tr><td>Carrier/module idle current</td><td></td><td></td></tr> 153 <tr><td>5V / 3V3 rails</td><td></td><td></td></tr> 154 <tr><td>LO lock indicators</td><td></td><td></td></tr> 155 <tr><td>ADAR temperatures</td><td></td><td></td></tr> 156 <tr><td>PA IDQ spot checks</td><td></td><td></td></tr> 157 <tr><td>USB enumeration / throughput notes</td><td></td><td></td></tr> 158 </tbody> 159 </table> 160 </div> 161 </article> 162 <article class="card"> 163 <h2>Stop conditions encountered?</h2> 164 <div class="table-wrap"> 165 <table> 166 <thead> 167 <tr> 168 <th>Condition</th> 169 <th>Triggered</th> 170 <th>Notes</th> 171 </tr> 172 </thead> 173 <tbody> 174 <tr><td>Unexpected current or thermal rise</td><td></td><td></td></tr> 175 <tr><td>LO lock/readback disagreement</td><td></td><td></td></tr> 176 <tr><td>ADAR comm failure</td><td></td><td></td></tr> 177 <tr><td>USB framing or bus-direction anomaly</td><td></td><td></td></tr> 178 <tr><td>Reset / clock ambiguity</td><td></td><td></td></tr> 179 <tr><td>Other blocker</td><td></td><td></td></tr> 180 </tbody> 181 </table> 182 </div> 183 </article> 184 </section> 185 186 <section class="card" style="margin-top:0.8rem;"> 187 <h2>Outcome</h2> 188 <div class="table-wrap"> 189 <table> 190 <tbody> 191 <tr><td>Session result</td><td></td><td>Next image to use</td><td></td></tr> 192 <tr><td>Main blocker</td><td colspan="3"></td></tr> 193 <tr><td>Next action owner</td><td></td><td>Target completion</td><td></td></tr> 194 </tbody> 195 </table> 196 </div> 197 </section> 198 </main> 199 200 <footer class="footer"> 201 <div class="container"><p>Use this worksheet together with the bring-up plan and artifact inventory so observations are captured consistently.</p></div> 202 </footer> 203 </body> 204 </html>