1  \# Author Boris Skegin
  2  \# Issued under the terms of the GPL v2 License or any later version
  3  .TH hm2_pktuart_setup "3hm2" "2016-02-29" "LinuxCNC Documentation" "Hostmot2"
  4  .SH NAME
  5  
  6  hm2_pktuart_setup \- setup a Hostmot2 PktUART instance
  7  .SH SYNTAX
  8  .nf
  9  .B #include <hostmot2-serial.h>
 10  .HP
 11  int hm2_pktuart_setup(char *name, int bitrate, rtapi_s32 tx_mode, rtapi_s32 rx_mode, int txclear, int rxclear)
 12  
 13  .SH DESCRIPTION
 14  \fBhm2_pktuart_setup\fR Setup the bitrate for the PktUART named "name".
 15  "name" is a unique string given to each PktUART during hostmot2 
 16  setup. The names of the available UARTs are printed to standard output during 
 17  the driver loading process and take the form:
 18  hm2_<board name>.<board index>.pktuart.<index> For example hm2_5i25.0.pktuart.0 .
 19  
 20  Hostmot2 UARTs are good to about 10 Mb/sec, but higher data rates (with any UART)
 21  trade speed for susceptibility to impulse noise.
 22  
 23    
 24  The PktUART function allows different RX and TX bitrates, but that is not currently
 25  supported by this driver.
 26  
 27  
 28  tx_mode is bit mask defined in the Hostmot2 regmap:
 29  .TP
 30  .B Bit  21	       FrameBuffer Has Data
 31  .TP
 32  .B Bits 20..16     Frames to send
 33  .TP
 34  .B Bits 15..8      InterFrame delay in bit times
 35  .TP
 36  .B Bit  7	       Send busy, Transmit Logic active
 37  .TP
 38  .B Bit  6	       Drive Enable bit (enables external RS-422/485 Driver when set)
 39  .TP
 40  .B Bit  5	       Drive enable Auto (Automatic external drive enable)
 41  .TP
 42  .B Bit  4	       SCFIFO Error
 43  .TP
 44  .B Bits 3..0       Drive enable delay (delay from asserting drive enable 
 45       	           to start of data transmit. In CLock Low periods 
 46  				   
 47  				   
 48  
 49  				   
 50  .TP       
 51  rx_mode is bit mask defined in the Hostmot2 regmap:
 52  .TP
 53  .B Bit  21	       FrameBuffer has data                                                        	
 54  .TP
 55  .B Bits 20..16     Frames received                                                               
 56  .TP
 57  .B Bits 15..8      InterFrame delay in bit times                                    
 58  .TP
 59  .B Bit  7	       Rx Logic active
 60  .TP
 61  .B Bit  6	       RXMask
 62  .TP
 63  .B Bit  5          Unused
 64  .TP
 65  .B Bit  4	       RCFIFO Error
 66  .TP
 67  .B Bit  3	       RXEnable (must be set to receive packets) 
 68  .TP
 69  .B Bit  2	       RXMask Enable (enables input data masking when transmitting)
 70  .TP
 71  .B Bit  1	       Overrun error (no stop bit when expected) (sticky)
 72  .TP
 73  .B Bit  0	       False Start bit error (sticky)
 74  
 75  .PP
 76  rx_mode and tx_mode registers are currently write-only.
 77  One can get the instance number of a PktUART instance
 78  with the help of hm2_get_pktuart function in order
 79  to read and write to Rx and Tx registers.
 80  
 81  .PP
 82  To write only to the tx_mode DriveEnable bit call this function with the bitrate
 83  unchanged and -1 as the rx_mode
 84  To change bitrate without altering mode settings send -1 to both modes. 
 85  .PP
 86  txclear==1 aborts any sends in process, clears the data FIFO and 
 87  clears the send count FIFO.
 88  .PP
 89  rxclear==1  aborts any receives in process, clears the data FIFO and 
 90  clears the receive count FIFO.
 91  .PP
 92  txclear!=1 or rxclear!=1 lets the corresponding registers unchanged.
 93          
 94  .SH RETURN VALUE
 95  Returns 0 on success and -1 or -EINVAL on failure. 
 96  
 97  .SH SEE ALSO
 98  .B man hm2_pktuart_send, man hm2_pktuart_read
 99  .TP
100  See src/hal/drivers/mesa_pktgyro_test.comp for an example usage. 
101  
102  .SH FUTURE DEVELOPMENT
103  This function is subject to change as digital filters will be added on the Rx UART,
104  and bit rate register will gain a 12 bit field for the input filter constant.