pluto_p_fr.txt
1 = Pluto-P 2 3 == General Info 4 5 The Pluto-P is an inexpensive ($60) FPGA board featuring the 6 ACEX1K(((ACEX1K))) chip from Altera. 7 8 === Requirements 9 10 . A Pluto-P board 11 . An EPP-compatible parallel port, configured for EPP mode in the system BIOS 12 13 === Connectors 14 15 - The Pluto-P board is shipped with the left connector presoldered, with 16 the key in the indicated position. The other connectors are 17 unpopulated. There does not seem to be a standard 12-pin IDC connector, 18 but some of the pins of a 16P connector can hang off the board next to 19 QA3/QZ3. 20 - The bottom and right connectors are on the same .1" grid, but the left 21 connector is not. If OUT2…OUT9 are not required, a single IDC connector 22 can span the bottom connector and the bottom two rows of the right 23 connector. 24 25 === Physical Pins 26 27 - Read the ACEX1K datasheet for information about input and output 28 voltage thresholds. The pins are all configured in "LVTTL/LVCMOS" mode 29 and are generally compatible with 5V TTL logic. 30 - Before configuration and after properly exiting LinuxCNC, all Pluto-P pins 31 are tristated with weak pull-ups (20k-ohms min, 50k-ohms max). If the 32 watchdog timer is enabled (the default), 33 these pins are also tristated after an interruption of communication 34 between LinuxCNC and the board. The watchdog timer takes approximately 35 6.5ms to activate. However, software bugs in the pluto_servo firmware 36 or LinuxCNC can leave the Pluto-P pins in an undefined state. 37 - In pwm+dir mode, by default dir is HIGH for negative values and LOW 38 for positive values. To select HIGH for positive values and LOW for 39 negative values, set the corresponding dout-NN-invert parameter TRUE to 40 invert the signal. 41 - The index input is triggered on the rising edge. Initial testing has 42 shown that the QZx inputs are particularly noise sensitive, due to 43 being polled every 25ns. Digital filtering has been added to filter 44 pulses shorter than 175ns (seven polling times). Additional external 45 filtering on all input pins, such as a Schmitt buffer or inverter, RC 46 filter, or differential receiver (if applicable) is recommended. 47 - The IN1…IN7 pins have 22-ohm series resistors to their associated FPGA 48 pins. No other pins have any sort of protection for out-of-spec 49 voltages or currents. It is up to the integrator to add appropriate 50 isolation and protection. Traditional parallel port optoisolator boards 51 do not work with pluto_servo due to the bidirectional nature of the EPP 52 protocol. 53 54 === LED 55 56 - When the device is unprogrammed, the LED glows faintly. When the 57 device is programmed, the LED glows according to the duty cycle of PWM0 58 (*LED* = *UP0* 'xor' *DOWN0*) or STEPGEN0 (*LED* = *STEP0* 'xor' *DIR0*). 59 60 === Power 61 62 - A small amount of current may be drawn from VCC. The available current 63 depends on the unregulated DC input to the board. Alternately, 64 regulated +3.3VDC may be supplied to the FPGA through these VCC pins. 65 The required current is not yet known, but is probably around 50mA plus 66 I/O current. 67 - The regulator on the Pluto-P board is a low-dropout type. Supplying 5V 68 at the power jack will allow the regulator to work properly. 69 70 === PC interface 71 72 - Only a single pluto_servo or pluto_step board is supported. 73 74 === Rebuilding the FPGA firmware 75 76 The `src/hal/drivers/pluto_servo_firmware/` and 77 `src/hal/drivers/pluto_step_firmware/` subdirectories contain the 78 Verilog source code plus additional files 79 used by Quartus for the FPGA firmwares. Altera's Quartus II software is 80 required to rebuild the FPGA firmware. To rebuild the firmware from the 81 .hdl and other source files, open the `.qpf` file and press CTRL-L. 82 Then, recompile LinuxCNC. 83 84 Like the HAL hardware driver, the FPGA firmware is licensed under the 85 terms of the GNU General Public License. 86 87 The gratis version of Quartus II runs only on Microsoft Windows, 88 although there is apparently a paid version that runs on Linux. 89 90 === For more information 91 92 Some additional information about it is available from 93 http://www.fpga4fun.com/board_pluto-P.html[http://www.fpga4fun.com/board_pluto-P.html] 94 and from http://emergent.unpy.net/01165081407[the developer's blog]. 95 96 == pluto-servo: Hardware PWM and quadrature counting[[sec:pluto-servo]](((pluto-servo))) 97 98 The pluto_servo system is suitable for control of a 4-axis CNC mill 99 with servo motors, a 3-axis mill with PWM spindle control, a lathe with 100 spindle encoder, etc. The large number of inputs allows a full set of 101 limit switches. 102 103 This driver features: 104 105 - 4 quadrature channels with 40MHz sample rate. The counters operate in 106 "4x" mode. The maximum useful quadrature rate is 8191 counts per LinuxCNC 107 servo cycle, or about 8MHz for LinuxCNC's default 1ms servo rate. 108 - 4 PWM channels, "up/down" or "pwm+dir" style. 4095 duty cycles from 109 -100% to +100%, including 0%. The PWM period is approximately 19.5kHz 110 (40MHz / 2047). A PDM-like mode is also available. 111 - 18 digital outputs: 10 dedicated, 8 shared with PWM functions. 112 (Example: A lathe with unidirectional PWM spindle control may use 13 113 total digital outputs) 114 - 20 digital inputs: 8 dedicated, 12 shared with Quadrature functions. 115 (Example: A lathe with index pulse only on the spindle may use 13 total 116 digital inputs) 117 - EPP communication with the PC. The EPP communication typically takes 118 around 100 us on machines tested so far, enabling servo rates above 119 1kHz. 120 121 === Pinout 122 123 UPx:: 124 The "up" (up/down mode) or “pwm” (pwm+direction mode) signal from PWM 125 generator X. May be used as a digital output if the corresponding PWM 126 channel is unused, or the output on the channel is always negative. The 127 corresponding digital output invert may be set to TRUE to make UPx 128 active low rather than active high. 129 130 DNx:: 131 The "down" (up/down mode) or “direction” (pwm+direction mode) signal 132 from PWM generator X. May be used as a digital output if the 133 corresponding PWM channel is unused, or the output on the channel is 134 never negative. The corresponding digital ouput invert may be set to 135 TRUE to make DNx active low rather than active high. 136 137 QAx, QBx:: 138 The A and B signals for Quadrature counter X. May be used as a digital 139 input if the corresponding quadrature channel is unused. 140 141 QZx:: 142 The Z (index) signal for quadrature counter X. May be used as a 143 digital input if the index feature of the corresponding quadrature 144 channel is unused. 145 146 INx:: 147 Dedicated digital input #x 148 149 OUTx:: 150 Dedicated digital output #x 151 152 GND:: 153 Ground 154 155 VCC:: 156 +3.3V regulated DC 157 158 .Pluto-Servo Pinout[[fig:Pluto-Servo-Pinout]](((pluto-servo pinout))) 159 160 image::images/pluto-pinout.png[alt="Pluto-Servo Pinout"] 161 162 .Pluto-Servo Alternate Pin Functions[[table:Pluto-Servo-Alternate-Pin]](((pluto-servo alternate pin functions))) 163 164 [width="90%", options="header"] 165 |======================================== 166 |Primary function | Alternate Function | Behavior if both functions used 167 |*UP0* | PWM0 | When pwm-0-pwmdir is TRUE, this pin is the PWM output 168 | | OUT10 | XOR'd with UP0 or PWM0 169 |*UP1* | PWM1 | When pwm-1-pwmdir is TRUE, this pin is the PWM output 170 | | OUT12 | XOR'd with UP1 or PWM1 171 |*UP2* | PWM2 | When pwm-2-pwmdir is TRUE, this pin is the PWM output 172 | | OUT14 | XOR'd with UP2 or PWM2 173 |*UP3* | PWM3 | When pwm-3-pwmdir is TRUE, this pin is the PWM output 174 | | OUT16 | XOR'd with UP3 or PWM3 175 |*DN0* | DIR0 | When pwm-0-pwmdir is TRUE, this pin is the DIR output 176 | | OUT11 | XOR'd with DN0 or DIR0 177 |*DN1* | DIR1 | When pwm-1-pwmdir is TRUE, this pin is the DIR output 178 | | OUT13 | XOR'd with DN1 or DIR1 179 |*DN2* | DIR2 | When pwm-2-pwmdir is TRUE, this pin is the DIR output 180 | | OUT15 | XOR'd with DN2 or DIR2 181 |*DN3* | DIR3 | When pwm-3-pwmdir is TRUE, this pin is the DIR output 182 | | OUT17 | XOR'd with DN3 or DIR3 183 |*QZ0* | IN8 | Read same value 184 |*QZ1* | IN9 | Read same value 185 |*QZ2* | IN10 | Read same value 186 |*QZ3* | IN11 | Read same value 187 |*QA0* | IN12 | Read same value 188 |*QA1* | IN13 | Read same value 189 |*QA2* | IN14 | Read same value 190 |*QA3* | IN15 | Read same value 191 |*QB0* | IN16 | Read same value 192 |*QB1* | IN17 | Read same value 193 |*QB2* | IN18 | Read same value 194 |*QB3* | IN19 | Read same value 195 |======================================== 196 197 === Input latching and output updating 198 199 - PWM duty cycles for each channel are updated at different times. 200 - Digital outputs OUT0 through OUT9 are all updated at the same time. 201 Digital outputs OUT10 through OUT17 are updated at the same time as the 202 PWM function they are shared with. 203 - Digital inputs IN0 through IN19 are all latched at the same time. 204 - Quadrature positions for each channel are latched at different times. 205 206 === HAL Functions, Pins and Parameters 207 208 A list of all 'loadrt' arguments, HAL function names, pin names and 209 parameter names is in the manual page, 'pluto_servo.9'. 210 211 === Compatible driver hardware 212 213 A schematic for a 2A, 2-axis PWM servo amplifier board is available 214 (http://emergent.unpy.net/projects/01148303608[http://emergent.unpy.net/projects/01148303608]). 215 The L298 H-Bridge is inexpensive and can easily be used for motors up to 216 4A (one motor per L298) or up to 2A (two motors per L298) with the supply 217 voltage up to 46V. However, the L298 does not have built-in current limiting, a 218 problem for motors with high stall currents. For higher currents and 219 voltages, some users have reported success with International 220 Rectifier's integrated high-side/low-side drivers. 221 222 == Pluto-step: 300kHz Hardware Step Generator[[sec:Pluto-step:-Hardware-step]](((pluto-step))) 223 224 Pluto-step is suitable for control of a 3- or 4-axis CNC mill with 225 stepper motors. The large number of inputs allows for a full set of 226 limit switches. 227 228 The board features: 229 230 - 4 “step+direction” channels with 312.5kHz maximum step rate, 231 programmable step length, space, and direction change times 232 - 14 dedicated digital outputs 233 - 16 dedicated digital inputs 234 - EPP communication with the PC 235 236 === Pinout 237 238 STEPx:: 239 The “step” (clock) output of stepgen channel *x* 240 241 DIRx:: 242 The “direction” output of stepgen channel *x* 243 244 INx:: 245 Dedicated digital input #x 246 247 OUTx:: 248 Dedicated digital output #x 249 250 GND:: 251 Ground 252 253 VCC:: 254 +3.3V regulated DC 255 256 While the “extended main connector” has a superset of signals usually 257 found on a Step & Direction DB25 connector--4 step generators, 9 258 inputs, and 6 general-purpose outputs--the layout on this header is 259 different than the layout of a standard 26-pin ribbon cable to DB25 260 connector. 261 262 .Pluto-Step Pinout[[fig:Pluto-Step-Pinout]](((pluto-step pinout))) 263 264 image::images/pluto-step-pinout.png[alt="Pluto-Step Pinout"] 265 266 === Input latching and output updating 267 268 - Step frequencies for each channel are updated at different times. 269 - Digital outputs are all updated at the same time. 270 - Digital inputs are all latched at the same time. 271 - Feedback positions for each channel are latched at different times. 272 273 === Step Waveform Timings 274 275 The firmware and driver enforce step length, space, and direction 276 change times. Timings are rounded up to the next multiple of 277 *_1.6μs_*, with a maximum of *_49.6μs_*. The timings 278 are the same as for the software stepgen component, except that 279 “dirhold” and “dirsetup” have been merged into a single parameter 280 “dirtime” which should be the maximum of the two, and that the same 281 step timings are always applied to all channels. 282 283 .Pluto-Step Timings[[fig:Pluto-Step-Timings]](((pluto-step timings))) 284 285 image::images/pluto_step_waveform.png[alt="Pluto-Step Timings"] 286 287 === HAL Functions, Pins and Parameters 288 289 A list of all 'loadrt' arguments, HAL function names, pin names and 290 parameter names is in the manual page, 'pluto_step.9'. 291 292