/ dpram.vhd
dpram.vhd
1 library IEEE; 2 use IEEE.STD_LOGIC_1164.all; 3 use IEEE.STD_LOGIC_ARITH.all; 4 use IEEE.STD_LOGIC_UNSIGNED.all; 5 -- 6 -- Copyright (C) 2007, Peter C. Wallace, Mesa Electronics 7 -- http://www.mesanet.com 8 -- 9 -- This program is is licensed under a disjunctive dual license giving you 10 -- the choice of one of the two following sets of free software/open source 11 -- licensing terms: 12 -- 13 -- * GNU General Public License (GPL), version 2.0 or later 14 -- * 3-clause BSD License 15 -- 16 -- 17 -- The GNU GPL License: 18 -- 19 -- This program is free software; you can redistribute it and/or modify 20 -- it under the terms of the GNU General Public License as published by 21 -- the Free Software Foundation; either version 2 of the License, or 22 -- (at your option) any later version. 23 -- 24 -- This program is distributed in the hope that it will be useful, 25 -- but WITHOUT ANY WARRANTY; without even the implied warranty of 26 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 27 -- GNU General Public License for more details. 28 -- 29 -- You should have received a copy of the GNU General Public License 30 -- along with this program; if not, write to the Free Software 31 -- Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 32 -- 33 -- 34 -- The 3-clause BSD License: 35 -- 36 -- Redistribution and use in source and binary forms, with or without 37 -- modification, are permitted provided that the following conditions 38 -- are met: 39 -- 40 -- * Redistributions of source code must retain the above copyright 41 -- notice, this list of conditions and the following disclaimer. 42 -- 43 -- * Redistributions in binary form must reproduce the above 44 -- copyright notice, this list of conditions and the following 45 -- disclaimer in the documentation and/or other materials 46 -- provided with the distribution. 47 -- 48 -- * Neither the name of Mesa Electronics nor the names of its 49 -- contributors may be used to endorse or promote products 50 -- derived from this software without specific prior written 51 -- permission. 52 -- 53 -- 54 -- Disclaimer: 55 -- 56 -- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 57 -- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 58 -- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 59 -- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 60 -- COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 61 -- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 62 -- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 63 -- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 64 -- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 65 -- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 66 -- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 -- POSSIBILITY OF SUCH DAMAGE. 68 -- 69 use work.log2.all; 70 71 entity dpram is 72 generic ( 73 width : integer; 74 depth : integer 75 ); 76 port ( 77 addra: in std_logic_vector((log2(depth) -1) downto 0); 78 addrb: in std_logic_vector((log2(depth) -1) downto 0); 79 clk: in std_logic; 80 dina: in std_logic_vector(width-1 downto 0); 81 douta: out std_logic_vector(width-1 downto 0); 82 doutb: out std_logic_vector(width-1 downto 0); 83 wea: in std_logic); 84 end ; 85 86 architecture syn of dpram is 87 type ram_type is array (0 to depth-1) of std_logic_vector(width-1 downto 0); 88 signal RAM : ram_type; 89 90 signal daddra: std_logic_vector((log2(depth) -1) downto 0); 91 signal daddrb: std_logic_vector((log2(depth) -1) downto 0); 92 93 begin 94 adpram: process (clk) 95 begin 96 if (clk'event and clk = '1') then 97 if (wea = '1') then 98 RAM(conv_integer(addra)) <= dina; 99 end if; 100 daddra <= addra; 101 daddrb <= addrb; 102 end if; -- clk 103 end process; 104 douta <= RAM(conv_integer(daddra)); 105 doutb <= RAM(conv_integer(daddrb)); 106 end;