/ dragonmint_t1.c
dragonmint_t1.c
1 /* 2 * Copyright 2018 Con Kolivas <kernel@kolivas.org> 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the Free 6 * Software Foundation; either version 3 of the License, or (at your option) 7 * any later version. See COPYING for more details. 8 */ 9 10 #include <stdlib.h> 11 #include <assert.h> 12 #include <fcntl.h> 13 #include <limits.h> 14 #include <unistd.h> 15 #include <stdbool.h> 16 17 #include "logging.h" 18 #include "miner.h" 19 #include "util.h" 20 21 #include "dragonmint_t1.h" 22 #include "dm_temp_ctrl.h" 23 24 #define MUL_COEF 1.248 25 26 int opt_diff=0; 27 28 static const uint32_t difficult_Tbl[24] = { 29 0x1d00ffff,// 1 30 0x1d007fff,// 2 31 0x1d005fff,// 3 32 0x1d003fff,// 4 33 0x1d001fff,// 8 34 0x1d000fff,// 16 35 0x1d0007ff,// 32 36 0x1d0006ff,// 37 37 0x1d0005ff,// 43 38 0x1d0004ff,// 52 39 0x1d0003ff,// 65 40 0x1d0002ff,// 86 41 0x1d00027f,// 103 42 0x1d0001ff,// 129 43 0x1c00ffff,// 256 44 0x1c007fff,// 512 45 0x1b3fffff,// 1024 46 0x1b1fffff,// 2048 47 0x1b0fffff,// 4096 48 0x1b07ffff,// 8192 49 0x1b03ffff,// 16384 50 0x1b01ffff,// 32768 51 0x1b00ffff,// 65536 52 0x1b007fff,// 131072 53 }; 54 55 const struct PLL_Clock PLL_Clk_12Mhz[T1_PLL_LV_NUM] = { 56 { 0, 120 , T1_PLL(1, 80 , 3)}, 57 { 1, 121 , T1_PLL(1, 81 , 3)}, 58 { 2, 123 , T1_PLL(1, 82 , 3)}, 59 { 3, 124 , T1_PLL(1, 83 , 3)}, 60 { 4, 126 , T1_PLL(1, 84 , 3)}, 61 { 5, 127 , T1_PLL(1, 85 , 3)}, 62 { 6, 129 , T1_PLL(1, 86 , 3)}, 63 { 7, 130 , T1_PLL(1, 87 , 3)}, 64 { 8, 132 , T1_PLL(1, 88 , 3)}, 65 { 9, 133 , T1_PLL(1, 89 , 3)}, 66 { 10, 135 , T1_PLL(1, 90 , 3)}, 67 { 11, 136 , T1_PLL(1, 91 , 3)}, 68 { 12, 138 , T1_PLL(1, 92 , 3)}, 69 { 13, 139 , T1_PLL(1, 93 , 3)}, 70 { 14, 141 , T1_PLL(1, 94 , 3)}, 71 { 15, 142 , T1_PLL(1, 95 , 3)}, 72 { 16, 144 , T1_PLL(1, 96 , 3)}, 73 { 17, 145 , T1_PLL(1, 97 , 3)}, 74 { 18, 147 , T1_PLL(1, 98 , 3)}, 75 { 19, 148 , T1_PLL(1, 99 , 3)}, 76 { 20, 150 , T1_PLL(1, 50 , 2)}, 77 { 21, 153 , T1_PLL(1, 51 , 2)}, 78 { 22, 156 , T1_PLL(1, 52 , 2)}, 79 { 23, 159 , T1_PLL(1, 53 , 2)}, 80 { 24, 162 , T1_PLL(1, 54 , 2)}, 81 { 25, 165 , T1_PLL(1, 55 , 2)}, 82 { 26, 168 , T1_PLL(1, 56 , 2)}, 83 { 27, 171 , T1_PLL(1, 57 , 2)}, 84 { 28, 174 , T1_PLL(1, 58 , 2)}, 85 { 29, 177 , T1_PLL(1, 59 , 2)}, 86 { 30, 180 , T1_PLL(1, 60 , 2)}, 87 { 31, 183 , T1_PLL(1, 61 , 2)}, 88 { 32, 186 , T1_PLL(1, 62 , 2)}, 89 { 33, 189 , T1_PLL(1, 63 , 2)}, 90 { 34, 192 , T1_PLL(1, 64 , 2)}, 91 { 35, 195 , T1_PLL(1, 65 , 2)}, 92 { 36, 198 , T1_PLL(1, 66 , 2)}, 93 { 37, 201 , T1_PLL(1, 67 , 2)}, 94 { 38, 204 , T1_PLL(1, 68 , 2)}, 95 { 39, 207 , T1_PLL(1, 69 , 2)}, 96 { 40, 210 , T1_PLL(1, 70 , 2)}, 97 { 41, 213 , T1_PLL(1, 71 , 2)}, 98 { 42, 216 , T1_PLL(1, 72 , 2)}, 99 { 43, 219 , T1_PLL(1, 73 , 2)}, 100 { 44, 222 , T1_PLL(1, 74 , 2)}, 101 { 45, 225 , T1_PLL(1, 75 , 2)}, 102 { 46, 228 , T1_PLL(1, 76 , 2)}, 103 { 47, 231 , T1_PLL(1, 77 , 2)}, 104 { 48, 234 , T1_PLL(1, 78 , 2)}, 105 { 49, 237 , T1_PLL(1, 79 , 2)}, 106 { 50, 240 , T1_PLL(2, 160, 2)}, 107 { 51, 241 , T1_PLL(2, 161, 2)}, 108 { 52, 243 , T1_PLL(2, 162, 2)}, 109 { 53, 244 , T1_PLL(2, 163, 2)}, 110 { 54, 246 , T1_PLL(2, 164, 2)}, 111 { 55, 247 , T1_PLL(2, 165, 2)}, 112 { 56, 249 , T1_PLL(2, 166, 2)}, 113 { 57, 250 , T1_PLL(2, 167, 2)}, 114 { 58, 252 , T1_PLL(2, 168, 2)}, 115 { 59, 253 , T1_PLL(2, 169, 2)}, 116 { 60, 255 , T1_PLL(2, 170, 2)}, 117 { 61, 256 , T1_PLL(2, 171, 2)}, 118 { 62, 258 , T1_PLL(2, 172, 2)}, 119 { 63, 259 , T1_PLL(2, 173, 2)}, 120 { 64, 261 , T1_PLL(2, 174, 2)}, 121 { 65, 262 , T1_PLL(2, 175, 2)}, 122 { 66, 264 , T1_PLL(2, 176, 2)}, 123 { 67, 265 , T1_PLL(2, 177, 2)}, 124 { 68, 267 , T1_PLL(2, 178, 2)}, 125 { 69, 268 , T1_PLL(2, 179, 2)}, 126 { 70, 270 , T1_PLL(2, 180, 2)}, 127 { 71, 271 , T1_PLL(2, 181, 2)}, 128 { 72, 273 , T1_PLL(2, 182, 2)}, 129 { 73, 274 , T1_PLL(2, 183, 2)}, 130 { 74, 276 , T1_PLL(2, 184, 2)}, 131 { 75, 277 , T1_PLL(2, 185, 2)}, 132 { 76, 279 , T1_PLL(2, 186, 2)}, 133 { 77, 280 , T1_PLL(2, 187, 2)}, 134 { 78, 282 , T1_PLL(2, 188, 2)}, 135 { 79, 283 , T1_PLL(2, 189, 2)}, 136 { 80, 285 , T1_PLL(2, 190, 2)}, 137 { 81, 286 , T1_PLL(2, 191, 2)}, 138 { 82, 288 , T1_PLL(2, 192, 2)}, 139 { 83, 289 , T1_PLL(2, 193, 2)}, 140 { 84, 291 , T1_PLL(2, 194, 2)}, 141 { 85, 292 , T1_PLL(2, 195, 2)}, 142 { 86, 294 , T1_PLL(2, 196, 2)}, 143 { 87, 295 , T1_PLL(2, 197, 2)}, 144 { 88, 297 , T1_PLL(2, 198, 2)}, 145 { 89, 298 , T1_PLL(2, 199, 2)}, 146 { 90, 300 , T1_PLL(2, 100, 1)}, 147 { 91, 303 , T1_PLL(2, 101, 1)}, 148 { 92, 306 , T1_PLL(2, 102, 1)}, 149 { 93, 309 , T1_PLL(2, 103, 1)}, 150 { 94, 312 , T1_PLL(2, 104, 1)}, 151 { 95, 315 , T1_PLL(2, 105, 1)}, 152 { 96, 318 , T1_PLL(2, 106, 1)}, 153 { 97, 321 , T1_PLL(2, 107, 1)}, 154 { 98, 324 , T1_PLL(2, 108, 1)}, 155 { 99, 327 , T1_PLL(2, 109, 1)}, 156 {100, 330 , T1_PLL(2, 110, 1)}, 157 {101, 333 , T1_PLL(2, 111, 1)}, 158 {102, 336 , T1_PLL(2, 112, 1)}, 159 {103, 339 , T1_PLL(2, 113, 1)}, 160 {104, 342 , T1_PLL(2, 114, 1)}, 161 {105, 345 , T1_PLL(2, 115, 1)}, 162 {106, 348 , T1_PLL(2, 116, 1)}, 163 {107, 351 , T1_PLL(2, 117, 1)}, 164 {108, 354 , T1_PLL(2, 118, 1)}, 165 {109, 357 , T1_PLL(2, 119, 1)}, 166 {110, 360 , T1_PLL(2, 120, 1)}, 167 {111, 363 , T1_PLL(2, 121, 1)}, 168 {112, 366 , T1_PLL(2, 122, 1)}, 169 {113, 369 , T1_PLL(2, 123, 1)}, 170 {114, 372 , T1_PLL(2, 124, 1)}, 171 {115, 375 , T1_PLL(2, 125, 1)}, 172 {116, 378 , T1_PLL(2, 126, 1)}, 173 {117, 381 , T1_PLL(2, 127, 1)}, 174 {118, 384 , T1_PLL(2, 128, 1)}, 175 {119, 387 , T1_PLL(2, 129, 1)}, 176 {120, 390 , T1_PLL(2, 130, 1)}, 177 {121, 393 , T1_PLL(2, 131, 1)}, 178 {122, 396 , T1_PLL(2, 132, 1)}, 179 {123, 399 , T1_PLL(2, 133, 1)}, 180 {124, 402 , T1_PLL(2, 134, 1)}, 181 {125, 405 , T1_PLL(2, 135, 1)}, 182 {126, 408 , T1_PLL(2, 136, 1)}, 183 {127, 411 , T1_PLL(2, 137, 1)}, 184 {128, 414 , T1_PLL(2, 138, 1)}, 185 {129, 417 , T1_PLL(2, 139, 1)}, 186 {130, 420 , T1_PLL(2, 140, 1)}, 187 {131, 423 , T1_PLL(2, 141, 1)}, 188 {132, 426 , T1_PLL(2, 142, 1)}, 189 {133, 429 , T1_PLL(2, 143, 1)}, 190 {134, 432 , T1_PLL(2, 144, 1)}, 191 {135, 435 , T1_PLL(2, 145, 1)}, 192 {136, 438 , T1_PLL(2, 146, 1)}, 193 {137, 441 , T1_PLL(2, 147, 1)}, 194 {138, 444 , T1_PLL(2, 148, 1)}, 195 {139, 447 , T1_PLL(2, 149, 1)}, 196 {140, 450 , T1_PLL(2, 150, 1)}, 197 {141, 453 , T1_PLL(2, 151, 1)}, 198 {142, 456 , T1_PLL(2, 152, 1)}, 199 {143, 459 , T1_PLL(2, 153, 1)}, 200 {144, 462 , T1_PLL(2, 154, 1)}, 201 {145, 465 , T1_PLL(2, 155, 1)}, 202 {146, 468 , T1_PLL(2, 156, 1)}, 203 {147, 471 , T1_PLL(2, 157, 1)}, 204 {148, 474 , T1_PLL(2, 158, 1)}, 205 {149, 477 , T1_PLL(2, 159, 1)}, 206 {150, 480 , T1_PLL(2, 160, 1)}, 207 {151, 483 , T1_PLL(2, 161, 1)}, 208 {152, 486 , T1_PLL(2, 162, 1)}, 209 {153, 489 , T1_PLL(2, 163, 1)}, 210 {154, 492 , T1_PLL(2, 164, 1)}, 211 {155, 495 , T1_PLL(2, 165, 1)}, 212 {156, 498 , T1_PLL(2, 166, 1)}, 213 {157, 501 , T1_PLL(2, 167, 1)}, 214 {158, 504 , T1_PLL(2, 168, 1)}, 215 {159, 507 , T1_PLL(2, 169, 1)}, 216 {160, 510 , T1_PLL(2, 170, 1)}, 217 {161, 513 , T1_PLL(2, 171, 1)}, 218 {162, 516 , T1_PLL(2, 172, 1)}, 219 {163, 519 , T1_PLL(2, 173, 1)}, 220 {164, 522 , T1_PLL(2, 174, 1)}, 221 {165, 525 , T1_PLL(2, 175, 1)}, 222 {166, 528 , T1_PLL(2, 176, 1)}, 223 {167, 531 , T1_PLL(2, 177, 1)}, 224 {168, 534 , T1_PLL(2, 178, 1)}, 225 {169, 537 , T1_PLL(2, 179, 1)}, 226 {170, 540 , T1_PLL(2, 180, 1)}, 227 {171, 543 , T1_PLL(2, 181, 1)}, 228 {172, 546 , T1_PLL(2, 182, 1)}, 229 {173, 549 , T1_PLL(2, 183, 1)}, 230 {174, 552 , T1_PLL(2, 184, 1)}, 231 {175, 555 , T1_PLL(2, 185, 1)}, 232 {176, 558 , T1_PLL(2, 186, 1)}, 233 {177, 561 , T1_PLL(2, 187, 1)}, 234 {178, 564 , T1_PLL(2, 188, 1)}, 235 {179, 567 , T1_PLL(2, 189, 1)}, 236 {180, 570 , T1_PLL(2, 190, 1)}, 237 {181, 573 , T1_PLL(2, 191, 1)}, 238 {182, 576 , T1_PLL(2, 192, 1)}, 239 {183, 579 , T1_PLL(2, 193, 1)}, 240 {184, 582 , T1_PLL(2, 194, 1)}, 241 {185, 585 , T1_PLL(2, 195, 1)}, 242 {186, 588 , T1_PLL(2, 196, 1)}, 243 {187, 591 , T1_PLL(2, 197, 1)}, 244 {188, 594 , T1_PLL(2, 198, 1)}, 245 {189, 597 , T1_PLL(2, 199, 1)}, 246 {190, 600 , T1_PLL(2, 100, 0)}, 247 {191, 606 , T1_PLL(2, 101, 0)}, 248 {192, 612 , T1_PLL(2, 102, 0)}, 249 {193, 618 , T1_PLL(2, 103, 0)}, 250 {194, 624 , T1_PLL(2, 104, 0)}, 251 {195, 630 , T1_PLL(2, 105, 0)}, 252 {196, 636 , T1_PLL(2, 106, 0)}, 253 {197, 642 , T1_PLL(2, 107, 0)}, 254 {198, 648 , T1_PLL(2, 108, 0)}, 255 {199, 654 , T1_PLL(2, 109, 0)}, 256 {200, 660 , T1_PLL(2, 110, 0)}, 257 {201, 666 , T1_PLL(2, 111, 0)}, 258 {202, 672 , T1_PLL(2, 112, 0)}, 259 {203, 678 , T1_PLL(2, 113, 0)}, 260 {204, 684 , T1_PLL(2, 114, 0)}, 261 {205, 690 , T1_PLL(2, 115, 0)}, 262 {206, 696 , T1_PLL(2, 116, 0)}, 263 {207, 702 , T1_PLL(2, 117, 0)}, 264 {208, 708 , T1_PLL(2, 118, 0)}, 265 {209, 714 , T1_PLL(2, 119, 0)}, 266 {210, 720 , T1_PLL(2, 120, 0)}, 267 {211, 726 , T1_PLL(2, 121, 0)}, 268 {212, 732 , T1_PLL(2, 122, 0)}, 269 {213, 738 , T1_PLL(2, 123, 0)}, 270 {214, 744 , T1_PLL(2, 124, 0)}, 271 {215, 750 , T1_PLL(2, 125, 0)}, 272 {216, 756 , T1_PLL(2, 126, 0)}, 273 {217, 762 , T1_PLL(2, 127, 0)}, 274 {218, 768 , T1_PLL(2, 128, 0)}, 275 {219, 774 , T1_PLL(2, 129, 0)}, 276 {220, 780 , T1_PLL(2, 130, 0)}, 277 {221, 786 , T1_PLL(2, 131, 0)}, 278 {222, 792 , T1_PLL(2, 132, 0)}, 279 {223, 798 , T1_PLL(2, 133, 0)}, 280 {224, 804 , T1_PLL(2, 134, 0)}, 281 {225, 810 , T1_PLL(2, 135, 0)}, 282 {226, 816 , T1_PLL(2, 136, 0)}, 283 {227, 822 , T1_PLL(2, 137, 0)}, 284 {228, 828 , T1_PLL(2, 138, 0)}, 285 {229, 834 , T1_PLL(2, 139, 0)}, 286 {230, 840 , T1_PLL(2, 140, 0)}, 287 {231, 846 , T1_PLL(2, 141, 0)}, 288 {232, 852 , T1_PLL(2, 142, 0)}, 289 {233, 858 , T1_PLL(2, 143, 0)}, 290 {234, 864 , T1_PLL(2, 144, 0)}, 291 {235, 870 , T1_PLL(2, 145, 0)}, 292 {236, 876 , T1_PLL(2, 146, 0)}, 293 {237, 882 , T1_PLL(2, 147, 0)}, 294 {238, 888 , T1_PLL(2, 148, 0)}, 295 {239, 894 , T1_PLL(2, 149, 0)}, 296 {240, 900 , T1_PLL(2, 150, 0)}, 297 {241, 906 , T1_PLL(2, 151, 0)}, 298 {242, 912 , T1_PLL(2, 152, 0)}, 299 {243, 918 , T1_PLL(2, 153, 0)}, 300 {244, 924 , T1_PLL(2, 154, 0)}, 301 {245, 930 , T1_PLL(2, 155, 0)}, 302 {246, 936 , T1_PLL(2, 156, 0)}, 303 {247, 942 , T1_PLL(2, 157, 0)}, 304 {248, 948 , T1_PLL(2, 158, 0)}, 305 {249, 954 , T1_PLL(2, 159, 0)}, 306 {250, 960 , T1_PLL(2, 160, 0)}, 307 {251, 966 , T1_PLL(2, 161, 0)}, 308 {252, 972 , T1_PLL(2, 162, 0)}, 309 {253, 978 , T1_PLL(2, 163, 0)}, 310 {254, 984 , T1_PLL(2, 164, 0)}, 311 {255, 990 , T1_PLL(2, 165, 0)}, 312 {256, 996 , T1_PLL(2, 166, 0)}, 313 {257, 1002, T1_PLL(2, 167, 0)}, 314 {258, 1008, T1_PLL(2, 168, 0)}, 315 {259, 1014, T1_PLL(2, 169, 0)}, 316 {260, 1020, T1_PLL(2, 170, 0)}, 317 {261, 1026, T1_PLL(2, 171, 0)}, 318 {262, 1032, T1_PLL(2, 172, 0)}, 319 {263, 1038, T1_PLL(2, 173, 0)}, 320 {264, 1044, T1_PLL(2, 174, 0)}, 321 {265, 1050, T1_PLL(2, 175, 0)}, 322 {266, 1056, T1_PLL(2, 176, 0)}, 323 {267, 1062, T1_PLL(2, 177, 0)}, 324 {268, 1068, T1_PLL(2, 178, 0)}, 325 {269, 1074, T1_PLL(2, 179, 0)}, 326 {270, 1080, T1_PLL(2, 180, 0)}, 327 {271, 1086, T1_PLL(2, 181, 0)}, 328 {272, 1092, T1_PLL(2, 182, 0)}, 329 {273, 1098, T1_PLL(2, 183, 0)}, 330 {274, 1104, T1_PLL(2, 184, 0)}, 331 {275, 1110, T1_PLL(2, 185, 0)}, 332 {276, 1116, T1_PLL(2, 186, 0)}, 333 {277, 1122, T1_PLL(2, 187, 0)}, 334 {278, 1128, T1_PLL(2, 188, 0)}, 335 {279, 1134, T1_PLL(2, 189, 0)}, 336 {280, 1140, T1_PLL(2, 190, 0)}, 337 {281, 1146, T1_PLL(2, 191, 0)}, 338 {282, 1152, T1_PLL(2, 192, 0)}, 339 {283, 1158, T1_PLL(2, 193, 0)}, 340 {284, 1164, T1_PLL(2, 194, 0)}, 341 {285, 1170, T1_PLL(2, 195, 0)}, 342 {286, 1176, T1_PLL(2, 196, 0)}, 343 {287, 1182, T1_PLL(2, 197, 0)}, 344 {288, 1188, T1_PLL(2, 198, 0)}, 345 {289, 1194, T1_PLL(2, 199, 0)}, 346 {290, 1200, T1_PLL(1, 100, 0)}, 347 {291, 1212, T1_PLL(1, 101, 0)}, 348 {292, 1224, T1_PLL(1, 102, 0)}, 349 {293, 1236, T1_PLL(1, 103, 0)}, 350 {294, 1248, T1_PLL(1, 104, 0)}, 351 {295, 1260, T1_PLL(1, 105, 0)}, 352 {296, 1272, T1_PLL(1, 106, 0)}, 353 {297, 1284, T1_PLL(1, 107, 0)}, 354 {298, 1296, T1_PLL(1, 108, 0)}, 355 {299, 1308, T1_PLL(1, 109, 0)}, 356 {300, 1320, T1_PLL(1, 110, 0)}, 357 {301, 1332, T1_PLL(1, 111, 0)}, 358 {302, 1344, T1_PLL(1, 112, 0)}, 359 {303, 1356, T1_PLL(1, 113, 0)}, 360 {304, 1368, T1_PLL(1, 114, 0)}, 361 {305, 1380, T1_PLL(1, 115, 0)}, 362 {306, 1392, T1_PLL(1, 116, 0)}, 363 {307, 1404, T1_PLL(1, 117, 0)}, 364 {308, 1416, T1_PLL(1, 118, 0)}, 365 {309, 1428, T1_PLL(1, 119, 0)}, 366 {310, 1440, T1_PLL(1, 120, 0)}, 367 {311, 1452, T1_PLL(1, 121, 0)}, 368 {312, 1464, T1_PLL(1, 122, 0)}, 369 {313, 1476, T1_PLL(1, 123, 0)}, 370 {314, 1488, T1_PLL(1, 124, 0)}, 371 {315, 1500, T1_PLL(1, 125, 0)}, 372 {316, 1512, T1_PLL(1, 126, 0)}, 373 {317, 1524, T1_PLL(1, 127, 0)}, 374 {318, 1536, T1_PLL(1, 128, 0)}, 375 {319, 1548, T1_PLL(1, 129, 0)}, 376 {320, 1560, T1_PLL(1, 130, 0)}, 377 {321, 1572, T1_PLL(1, 131, 0)}, 378 {322, 1584, T1_PLL(1, 132, 0)}, 379 {323, 1596, T1_PLL(1, 133, 0)}, 380 }; 381 382 const uint8_t default_reg[T1_PLL_LV_NUM][REG_LENGTH] = 383 { 384 {0x02, 0x50, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 120MHz 385 {0x02, 0x51, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 121MHz 386 {0x02, 0x52, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 123MHz 387 {0x02, 0x53, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 124MHz 388 {0x02, 0x54, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 126MHz 389 {0x02, 0x55, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 127MHz 390 {0x02, 0x56, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 129MHz 391 {0x02, 0x57, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 130MHz 392 {0x02, 0x58, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 132MHz 393 {0x02, 0x59, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 133MHz 394 {0x02, 0x5a, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 135MHz 395 {0x02, 0x5b, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 136MHz 396 {0x02, 0x5c, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 138MHz 397 {0x02, 0x5d, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 139MHz 398 {0x02, 0x5e, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 141MHz 399 {0x02, 0x5f, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 142MHz 400 {0x02, 0x60, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 144MHz 401 {0x02, 0x61, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 145MHz 402 {0x02, 0x62, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 147MHz 403 {0x02, 0x63, 0x40, 0xc2, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 148MHz 404 {0x02, 0x32, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 150MHz 405 {0x02, 0x33, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 153MHz 406 {0x02, 0x34, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 156MHz 407 {0x02, 0x35, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 159MHz 408 {0x02, 0x36, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 162MHz 409 {0x02, 0x37, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 165MHz 410 {0x02, 0x38, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 168MHz 411 {0x02, 0x39, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 171MHz 412 {0x02, 0x3a, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 174MHz 413 {0x02, 0x3b, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 177MHz 414 {0x02, 0x3c, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 180MHz 415 {0x02, 0x3d, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 183MHz 416 {0x02, 0x3e, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 186MHz 417 {0x02, 0x3f, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 189MHz 418 {0x02, 0x40, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 192MHz 419 {0x02, 0x41, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 195MHz 420 {0x02, 0x42, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 198MHz 421 {0x02, 0x43, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 201MHz 422 {0x02, 0x44, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 204MHz 423 {0x02, 0x45, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 207MHz 424 {0x02, 0x46, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 210MHz 425 {0x02, 0x47, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 213MHz 426 {0x02, 0x48, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 216MHz 427 {0x02, 0x49, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 219MHz 428 {0x02, 0x4a, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 222MHz 429 {0x02, 0x4b, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 225MHz 430 {0x02, 0x4c, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 228MHz 431 {0x02, 0x4d, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 231MHz 432 {0x02, 0x4e, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 234MHz 433 {0x02, 0x4f, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 237MHz 434 {0x04, 0xa0, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 240MHz 435 {0x04, 0xa1, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 241MHz 436 {0x04, 0xa2, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 243MHz 437 {0x04, 0xa3, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 244MHz 438 {0x04, 0xa4, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 246MHz 439 {0x04, 0xa5, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 247MHz 440 {0x04, 0xa6, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 249MHz 441 {0x04, 0xa7, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 250MHz 442 {0x04, 0xa8, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 252MHz 443 {0x04, 0xa9, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 253MHz 444 {0x04, 0xaa, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 255MHz 445 {0x04, 0xab, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 256MHz 446 {0x04, 0xac, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 258MHz 447 {0x04, 0xad, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 259MHz 448 {0x04, 0xae, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 261MHz 449 {0x04, 0xaf, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 262MHz 450 {0x04, 0xb0, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 264MHz 451 {0x04, 0xb1, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 265MHz 452 {0x04, 0xb2, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 267MHz 453 {0x04, 0xb3, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 268MHz 454 {0x04, 0xb4, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 270MHz 455 {0x04, 0xb5, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 271MHz 456 {0x04, 0xb6, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 273MHz 457 {0x04, 0xb7, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 274MHz 458 {0x04, 0xb8, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 276MHz 459 {0x04, 0xb9, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 277MHz 460 {0x04, 0xba, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 279MHz 461 {0x04, 0xbb, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 280MHz 462 {0x04, 0xbc, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 282MHz 463 {0x04, 0xbd, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 283MHz 464 {0x04, 0xbe, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 285MHz 465 {0x04, 0xbf, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 286MHz 466 {0x04, 0xc0, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 288MHz 467 {0x04, 0xc1, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 289MHz 468 {0x04, 0xc2, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 291MHz 469 {0x04, 0xc3, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 292MHz 470 {0x04, 0xc4, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 294MHz 471 {0x04, 0xc5, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 295MHz 472 {0x04, 0xc6, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 297MHz 473 {0x04, 0xc7, 0x40, 0x82, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 298MHz 474 {0x04, 0x64, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 300MHz 475 {0x04, 0x65, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 303MHz 476 {0x04, 0x66, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 306MHz 477 {0x04, 0x67, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 309MHz 478 {0x04, 0x68, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 312MHz 479 {0x04, 0x69, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 315MHz 480 {0x04, 0x6a, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 318MHz 481 {0x04, 0x6b, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 321MHz 482 {0x04, 0x6c, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 324MHz 483 {0x04, 0x6d, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 327MHz 484 {0x04, 0x6e, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 330MHz 485 {0x04, 0x6f, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 333MHz 486 {0x04, 0x70, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 336MHz 487 {0x04, 0x71, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 339MHz 488 {0x04, 0x72, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 342MHz 489 {0x04, 0x73, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 345MHz 490 {0x04, 0x74, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 348MHz 491 {0x04, 0x75, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 351MHz 492 {0x04, 0x76, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 354MHz 493 {0x04, 0x77, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 357MHz 494 {0x04, 0x78, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 360MHz 495 {0x04, 0x79, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 363MHz 496 {0x04, 0x7a, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 366MHz 497 {0x04, 0x7b, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 369MHz 498 {0x04, 0x7c, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 372MHz 499 {0x04, 0x7d, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 375MHz 500 {0x04, 0x7e, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 378MHz 501 {0x04, 0x7f, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 381MHz 502 {0x04, 0x80, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 384MHz 503 {0x04, 0x81, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 387MHz 504 {0x04, 0x82, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 390MHz 505 {0x04, 0x83, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 393MHz 506 {0x04, 0x84, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 396MHz 507 {0x04, 0x85, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 399MHz 508 {0x04, 0x86, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 402MHz 509 {0x04, 0x87, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 405MHz 510 {0x04, 0x88, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 408MHz 511 {0x04, 0x89, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 411MHz 512 {0x04, 0x8a, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 414MHz 513 {0x04, 0x8b, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 417MHz 514 {0x04, 0x8c, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 420MHz 515 {0x04, 0x8d, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 423MHz 516 {0x04, 0x8e, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 426MHz 517 {0x04, 0x8f, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 429MHz 518 {0x04, 0x90, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 432MHz 519 {0x04, 0x91, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 435MHz 520 {0x04, 0x92, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 438MHz 521 {0x04, 0x93, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 441MHz 522 {0x04, 0x94, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 444MHz 523 {0x04, 0x95, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 447MHz 524 {0x04, 0x96, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 450MHz 525 {0x04, 0x97, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 453MHz 526 {0x04, 0x98, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 456MHz 527 {0x04, 0x99, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 459MHz 528 {0x04, 0x9a, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 462MHz 529 {0x04, 0x9b, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 465MHz 530 {0x04, 0x9c, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 468MHz 531 {0x04, 0x9d, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 471MHz 532 {0x04, 0x9e, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 474MHz 533 {0x04, 0x9f, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 477MHz 534 {0x04, 0xa0, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 480MHz 535 {0x04, 0xa1, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 483MHz 536 {0x04, 0xa2, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 486MHz 537 {0x04, 0xa3, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 489MHz 538 {0x04, 0xa4, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 492MHz 539 {0x04, 0xa5, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 495MHz 540 {0x04, 0xa6, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 498MHz 541 {0x04, 0xa7, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 501MHz 542 {0x04, 0xa8, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 504MHz 543 {0x04, 0xa9, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 507MHz 544 {0x04, 0xaa, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 510MHz 545 {0x04, 0xab, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 513MHz 546 {0x04, 0xac, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 516MHz 547 {0x04, 0xad, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 519MHz 548 {0x04, 0xae, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 522MHz 549 {0x04, 0xaf, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 525MHz 550 {0x04, 0xb0, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 528MHz 551 {0x04, 0xb1, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 531MHz 552 {0x04, 0xb2, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 534MHz 553 {0x04, 0xb3, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 537MHz 554 {0x04, 0xb4, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 540MHz 555 {0x04, 0xb5, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 543MHz 556 {0x04, 0xb6, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 546MHz 557 {0x04, 0xb7, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x24, 0x00, 0x00}, // 549MHz 558 {0x04, 0xb8, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 552MHz 559 {0x04, 0xb9, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 555MHz 560 {0x04, 0xba, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 558MHz 561 {0x04, 0xbb, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 561MHz 562 {0x04, 0xbc, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 564MHz 563 {0x04, 0xbd, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 567MHz 564 {0x04, 0xbe, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 570MHz 565 {0x04, 0xbf, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 573MHz 566 {0x04, 0xc0, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 576MHz 567 {0x04, 0xc1, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 579MHz 568 {0x04, 0xc2, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 582MHz 569 {0x04, 0xc3, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 585MHz 570 {0x04, 0xc4, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 588MHz 571 {0x04, 0xc5, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 591MHz 572 {0x04, 0xc6, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 594MHz 573 {0x04, 0xc7, 0x40, 0x42, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 597MHz 574 {0x04, 0x64, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 600MHz 575 {0x04, 0x65, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 606MHz 576 {0x04, 0x66, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 612MHz 577 {0x04, 0x67, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 618MHz 578 {0x04, 0x68, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 624MHz 579 {0x04, 0x69, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 630MHz 580 {0x04, 0x6a, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 636MHz 581 {0x04, 0x6b, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 642MHz 582 {0x04, 0x6c, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 648MHz 583 {0x04, 0x6d, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 654MHz 584 {0x04, 0x6e, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 660MHz 585 {0x04, 0x6f, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 666MHz 586 {0x04, 0x70, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 672MHz 587 {0x04, 0x71, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 678MHz 588 {0x04, 0x72, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 684MHz 589 {0x04, 0x73, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 690MHz 590 {0x04, 0x74, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 696MHz 591 {0x04, 0x75, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 702MHz 592 {0x04, 0x76, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 708MHz 593 {0x04, 0x77, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 714MHz 594 {0x04, 0x78, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 720MHz 595 {0x04, 0x79, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 726MHz 596 {0x04, 0x7a, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 732MHz 597 {0x04, 0x7b, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 738MHz 598 {0x04, 0x7c, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 744MHz 599 {0x04, 0x7d, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 750MHz 600 {0x04, 0x7e, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 756MHz 601 {0x04, 0x7f, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 762MHz 602 {0x04, 0x80, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 768MHz 603 {0x04, 0x81, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 774MHz 604 {0x04, 0x82, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 780MHz 605 {0x04, 0x83, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 786MHz 606 {0x04, 0x84, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 792MHz 607 {0x04, 0x85, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 798MHz 608 {0x04, 0x86, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 804MHz 609 {0x04, 0x87, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 810MHz 610 {0x04, 0x88, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 816MHz 611 {0x04, 0x89, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 822MHz 612 {0x04, 0x8a, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 828MHz 613 {0x04, 0x8b, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 834MHz 614 {0x04, 0x8c, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 840MHz 615 {0x04, 0x8d, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 846MHz 616 {0x04, 0x8e, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 852MHz 617 {0x04, 0x8f, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 858MHz 618 {0x04, 0x90, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 864MHz 619 {0x04, 0x91, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 870MHz 620 {0x04, 0x92, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 876MHz 621 {0x04, 0x93, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 882MHz 622 {0x04, 0x94, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 888MHz 623 {0x04, 0x95, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 894MHz 624 {0x04, 0x96, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 900MHz 625 {0x04, 0x97, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 906MHz 626 {0x04, 0x98, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 912MHz 627 {0x04, 0x99, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 918MHz 628 {0x04, 0x9a, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 924MHz 629 {0x04, 0x9b, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 930MHz 630 {0x04, 0x9c, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 936MHz 631 {0x04, 0x9d, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 942MHz 632 {0x04, 0x9e, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 948MHz 633 {0x04, 0x9f, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 954MHz 634 {0x04, 0xa0, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 960MHz 635 {0x04, 0xa1, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 966MHz 636 {0x04, 0xa2, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 972MHz 637 {0x04, 0xa3, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 978MHz 638 {0x04, 0xa4, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 984MHz 639 {0x04, 0xa5, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 990MHz 640 {0x04, 0xa6, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 996MHz 641 {0x04, 0xa7, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1002MHz 642 {0x04, 0xa8, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1008MHz 643 {0x04, 0xa9, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1014MHz 644 {0x04, 0xaa, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1020MHz 645 {0x04, 0xab, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1026MHz 646 {0x04, 0xac, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1032MHz 647 {0x04, 0xad, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1038MHz 648 {0x04, 0xae, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1044MHz 649 {0x04, 0xaf, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1050MHz 650 {0x04, 0xb0, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1056MHz 651 {0x04, 0xb1, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1062MHz 652 {0x04, 0xb2, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1068MHz 653 {0x04, 0xb3, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1074MHz 654 {0x04, 0xb4, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1080MHz 655 {0x04, 0xb5, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1086MHz 656 {0x04, 0xb6, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1092MHz 657 {0x04, 0xb7, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1098MHz 658 {0x04, 0xb8, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1104MHz 659 {0x04, 0xb9, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1110MHz 660 {0x04, 0xba, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1116MHz 661 {0x04, 0xbb, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1122MHz 662 {0x04, 0xbc, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1128MHz 663 {0x04, 0xbd, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1134MHz 664 {0x04, 0xbe, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1140MHz 665 {0x04, 0xbf, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1146MHz 666 {0x04, 0xc0, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1152MHz 667 {0x04, 0xc1, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1158MHz 668 {0x04, 0xc2, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1164MHz 669 {0x04, 0xc3, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1170MHz 670 {0x04, 0xc4, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1176MHz 671 {0x04, 0xc5, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1182MHz 672 {0x04, 0xc6, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1188MHz 673 {0x04, 0xc7, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1194MHz 674 {0x02, 0x64, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1200MHz 675 {0x02, 0x65, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1212MHz 676 {0x02, 0x66, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1224MHz 677 {0x02, 0x67, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1236MHz 678 {0x02, 0x68, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1248MHz 679 {0x02, 0x69, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1260MHz 680 {0x02, 0x6a, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1272MHz 681 {0x02, 0x6b, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1284MHz 682 {0x02, 0x6c, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1296MHz 683 {0x02, 0x6d, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1308MHz 684 {0x02, 0x6e, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1320MHz 685 {0x02, 0x6f, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1332MHz 686 {0x02, 0x70, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1344MHz 687 {0x02, 0x71, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1356MHz 688 {0x02, 0x72, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1368MHz 689 {0x02, 0x73, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1380MHz 690 {0x02, 0x74, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1392MHz 691 {0x02, 0x75, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1404MHz 692 {0x02, 0x76, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1416MHz 693 {0x02, 0x77, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1428MHz 694 {0x02, 0x78, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1440MHz 695 {0x02, 0x79, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1452MHz 696 {0x02, 0x7a, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1464MHz 697 {0x02, 0x7b, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1476MHz 698 {0x02, 0x7c, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1488MHz 699 {0x02, 0x7d, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1500MHz 700 {0x02, 0x7e, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1512MHz 701 {0x02, 0x7f, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1524MHz 702 {0x02, 0x80, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1536MHz 703 {0x02, 0x81, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1548MHz 704 {0x02, 0x82, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1560MHz 705 {0x02, 0x83, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1572MHz 706 {0x02, 0x84, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1584MHz 707 {0x02, 0x85, 0x40, 0x02, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x20, 0x00, 0x00}, // 1596MHz 708 }; 709 710 extern struct T1_chain *chain[MAX_CHAIN_NUM]; 711 extern uint8_t chain_mask; 712 extern hardware_version_e g_hwver; 713 //int chain_voltage_flag[MAX_CHAIN_NUM]; 714 715 #if 0 716 const unsigned short wCRCTalbeAbs[] = 717 { 718 0x0000, 0xCC01, 0xD801, 0x1400, 719 0xF001, 0x3C00, 0x2800, 0xE401, 720 0xA001, 0x6C00, 0x7800, 0xB401, 721 0x5000, 0x9C01, 0x8801, 0x4400, 722 }; 723 724 unsigned short CRC16_2(unsigned char* pchMsg, unsigned short wDataLen) 725 { 726 volatile unsigned short wCRC = 0xFFFF; 727 unsigned short i; 728 unsigned char chChar; 729 730 for (i = 0; i < wDataLen; i++) 731 { 732 chChar = *pchMsg++; 733 wCRC = wCRCTalbeAbs[(chChar ^ wCRC) & 15] ^ (wCRC >> 4); 734 wCRC = wCRCTalbeAbs[((chChar >> 4) ^ wCRC) & 15] ^ (wCRC >> 4); 735 } 736 737 return wCRC; 738 } 739 #endif 740 741 static void applog_hexdump(char *prefix, uint8_t *buff, int len, int level) 742 { 743 static char line[512]; 744 char *pos = line; 745 int i; 746 if (len < 1) 747 { 748 return; 749 } 750 751 pos += sprintf(pos, "%s: %d bytes:", prefix, len); 752 for (i = 0; i < len; i++) 753 { 754 if (i > 0 && (i % 32) == 0) 755 { 756 applog(LOG_INFO, "%s", line); 757 pos = line; 758 pos += sprintf(pos, "\t"); 759 } 760 pos += sprintf(pos, "%.2X ", buff[i]); 761 } 762 applog(level, "%s", line); 763 } 764 765 void hexdump(char *prefix, uint8_t *buff, int len) 766 { 767 applog_hexdump(prefix, buff, len, LOG_WARNING); 768 } 769 770 void hexdump_error(char *prefix, uint8_t *buff, int len) 771 { 772 applog_hexdump(prefix, buff, len, LOG_ERR); 773 } 774 775 bool dm_cmd_resetall(uint8_t chain_id, uint8_t chip_id, uint8_t *result) 776 { 777 uint8_t cmd[2] = {0x0, 0x0}; 778 779 return mcompat_cmd_reset(chain_id, chip_id, cmd, result); 780 } 781 782 bool dm_cmd_resetjob(uint8_t chain_id, uint8_t chip_id, uint8_t *result) 783 { 784 uint8_t cmd[2] = {0xed, 0xed}; 785 786 return mcompat_cmd_reset(chain_id, chip_id, cmd, result); 787 } 788 789 bool dm_cmd_resetbist(uint8_t chain_id, uint8_t chip_id, uint8_t *result) 790 { 791 uint8_t cmd[2] = {0x20, 0x20}; 792 793 return mcompat_cmd_reset(chain_id, chip_id, cmd, result); 794 } 795 796 int T1_ConfigT1PLLClock(uint32_t optPll) 797 { 798 int i; 799 int T1Pll = 0; 800 801 if (optPll > 0) { 802 if (optPll <= PLL_Clk_12Mhz[0].speedMHz) { 803 T1Pll = 0; //found 804 } else { 805 for (i = 1; i < T1_PLL_LV_NUM; i++) { 806 if (optPll < PLL_Clk_12Mhz[i].speedMHz 807 && optPll >= PLL_Clk_12Mhz[i-1].speedMHz) { 808 T1Pll = i - 1; //found 809 break; 810 } 811 } 812 } 813 } 814 815 return T1Pll; 816 } 817 818 bool T1_SetT1PLLClock(struct T1_chain *t1, int pllClkIdx, int chip_id) 819 { 820 uint8_t temp_reg[REG_LENGTH]; 821 int cid = t1->chain_id; 822 823 memcpy(temp_reg, default_reg[pllClkIdx], REG_LENGTH); 824 825 if (!mcompat_cmd_write_register(cid, chip_id, temp_reg, REG_LENGTH)) { 826 applog(LOG_WARNING, "Failed to set PLL Lv.%d on T1 %d in T1_SetT1PLLClock", pllClkIdx, cid); 827 return false; 828 } 829 if (chip_id) { 830 applog(LOG_NOTICE, "T1 %d chip %d PLL set to %d %d MHz", cid, chip_id, 831 pllClkIdx, PLL_Clk_12Mhz[pllClkIdx].speedMHz); 832 } else { 833 applog(LOG_NOTICE, "T1 %d PLL set to %d %d MHz", cid, 834 pllClkIdx, PLL_Clk_12Mhz[pllClkIdx].speedMHz); 835 t1->pll = pllClkIdx; 836 } 837 838 return true; 839 } 840 841 uint8_t *create_job(uint8_t chip_id, uint8_t job_id, struct work *work) 842 { 843 double sdiff = work->device_diff; 844 uint8_t tmp_buf[JOB_LENGTH]; 845 uint16_t crc; 846 uint8_t i; 847 848 static uint8_t job[JOB_LENGTH] = { 849 /* command */ 850 0x00, 0x00, 851 /* midstate3 */ 852 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 853 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 854 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 855 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 856 /* midstate2 */ 857 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 858 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 859 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 860 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 861 /* midstate1 */ 862 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 863 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 864 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 865 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 866 /* midstate0 */ 867 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 868 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 869 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 870 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 871 /* wdata */ 872 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 873 0x00, 0x00, 0x00, 0x00, 874 /* start nonce */ 875 0x00, 0x00, 0x00, 0x00, 876 /* difficulty 1 */ 877 0xff, 0xff, 0x00, 0x1d, 878 /* end nonce */ 879 0xff, 0xff, 0xff, 0xff, 880 0x00, 0x00, 0x00, 0x00, 881 /* crc data */ 882 0x00, 0x00, 0x00, 0x00 883 }; 884 885 uint32_t *p1 = (uint32_t *) &job[130]; 886 uint32_t *p2 = (uint32_t *) (work->data + 64); 887 uint32_t diffIdx; 888 //uint32_t diffIdx,*diff=(uint32_t*)&job[50]; //difficulty pointer 889 890 job[0] = (job_id << 4) | CMD_WRITE_JOB_T1; // fixed by duanhao 891 job[1] = chip_id; 892 893 swab256(job + 2, work->midstate3); 894 swab256(job + 34, work->midstate2); 895 swab256(job + 66, work->midstate1); 896 swab256(job + 98, work->midstate); 897 p1 = (uint32_t *) &job[130]; 898 p2 = (uint32_t *) (work->data + 64); 899 p1[0] = bswap_32(p2[0]); 900 p1[1] = bswap_32(p2[1]); 901 p1[2] = bswap_32(p2[2]); 902 903 uint8_t diff[4] = {0x1e, 0x03, 0xff, 0xff}; 904 905 if (sdiff>131072) 906 memcpy(diff, &(difficult_Tbl[23]), 4); 907 else if (sdiff>65536) 908 memcpy(diff, &(difficult_Tbl[22]), 4); 909 else if (sdiff>32767) 910 memcpy(diff, &(difficult_Tbl[21]), 4); 911 else if (sdiff>16383) 912 memcpy(diff, &(difficult_Tbl[20]), 4); 913 else if (sdiff>8191) 914 memcpy(diff, &(difficult_Tbl[19]), 4); 915 else if (sdiff>4095) 916 memcpy(diff, &(difficult_Tbl[18]), 4); 917 else if (sdiff>2047) 918 memcpy(diff, &(difficult_Tbl[17]), 4); 919 else if (sdiff>1023) 920 memcpy(diff, &(difficult_Tbl[16]), 4); 921 else if (sdiff > 511) 922 memcpy(diff, &(difficult_Tbl[15]), 4); 923 else if (sdiff > 255) 924 memcpy(diff, &(difficult_Tbl[14]), 4); 925 else { 926 if (opt_diff>=1&&opt_diff<=17) 927 { 928 diffIdx=opt_diff-1; 929 memcpy(diff, &(difficult_Tbl[diffIdx]), 4); 930 } 931 else 932 memcpy(diff, &(difficult_Tbl[13]), 4); 933 } 934 935 memcpy(job+146, diff, 4); 936 937 memset(tmp_buf, 0, sizeof(tmp_buf)); 938 for(i = 0; i < 79; i++) 939 { 940 tmp_buf[(2 * i) + 1] = job[(2 * i) + 0]; 941 tmp_buf[(2 * i) + 0] = job[(2 * i) + 1]; 942 } 943 crc = CRC16_2(tmp_buf, 158); 944 job[158] = (uint8_t)((crc >> 8) & 0xff); 945 job[159] = (uint8_t)((crc >> 0) & 0xff); 946 947 //applog(LOG_NOTICE, "[create job] %d \r", sdiff); 948 //hexdump("job:", job, JOB_LENGTH); 949 950 return job; 951 } 952 953 954 955 956 #define COOLDOWN_MS (30 * 1000) 957 #define DISABLE_CHIP_FAIL_THRESHOLD 3 958 #define LEAST_CORE_ONE_CHAIN 603 959 #define RESET_CHAIN_CNT 2 960 961 962 963 /********** disable / re-enable related section (temporary for testing) */ 964 int get_current_ms(void) 965 { 966 cgtimer_t ct; 967 cgtimer_time(&ct); 968 return cgtimer_to_ms(&ct); 969 } 970 971 bool is_chip_disabled(struct T1_chain *t1, uint8_t chip_id) 972 { 973 struct T1_chip *chip = &t1->chips[chip_id - 1]; 974 return chip->disabled || chip->cooldown_begin != 0; 975 } 976 977 /* check and disable chip, remember time */ 978 void disable_chip(struct T1_chain *t1, uint8_t chip_id) 979 { 980 // flush_spi(t1); 981 struct T1_chip *chip = &t1->chips[chip_id - 1]; 982 int cid = t1->chain_id; 983 if (is_chip_disabled(t1, chip_id)) { 984 applog(LOG_WARNING, "%d: chip %d already disabled", 985 cid, chip_id); 986 return; 987 } 988 applog(LOG_WARNING, "%d: temporary disabling chip %d", cid, chip_id); 989 chip->cooldown_begin = get_current_ms(); 990 } 991 992 bool set_work(struct T1_chain *t1, uint8_t chip_id, struct work *work, uint8_t queue_states) 993 { 994 int cid = t1->chain_id; 995 struct T1_chip *chip = &t1->chips[chip_id - 1]; 996 bool retval = false; 997 998 int job_id = chip->last_queued_id + 1; 999 1000 //if (chip_id==1) applog(LOG_INFO, "%d: queuing chip %d with job_id %d, state=0x%02x", cid, chip_id, job_id, queue_states); 1001 //applog(LOG_INFO, "%d: queuing chip %d with job_id %d, state=0x%02x", cid, chip_id, job_id, queue_states); 1002 if (job_id == (queue_states & 0x0f) || job_id == (queue_states >> 4)) 1003 { 1004 applog(LOG_WARNING, "%d: job overlap: %d, 0x%02x", cid, job_id, queue_states); 1005 } 1006 1007 if (chip->work[chip->last_queued_id] != NULL) 1008 { 1009 free_work(chip->work[chip->last_queued_id]); 1010 retval = true; 1011 } 1012 uint8_t *jobdata = create_job(chip_id, job_id, work); 1013 if (!mcompat_cmd_write_job(cid, chip_id, jobdata, JOB_LENGTH)) 1014 { 1015 /* give back work */ 1016 free_work(work); 1017 applog(LOG_ERR, "%d: failed to set work for chip %d.%d", cid, chip_id, job_id); 1018 disable_chip(t1, chip_id); 1019 } 1020 else 1021 { 1022 chip->work[chip->last_queued_id] = work; 1023 chip->last_queued_id++; 1024 chip->last_queued_id &= 3; 1025 } 1026 /* 1027 * if (chip_id == 10) 1028 * { 1029 * cgtime(&tvCurr); 1030 * timersub(&tvCurr, &tvLast, &tvDiff); 1031 * applog(LOG_NOTICE, "CCCCCCCTime.tv_sec:%d,tv_usec:%d.", tvDiff.tv_sec,tvDiff.tv_usec); 1032 * cgtime(&tvLast); 1033 } 1034 */ 1035 return retval; 1036 } 1037 1038 bool get_nonce(struct T1_chain *t1, uint8_t *nonce, uint8_t *chip_id, uint8_t *job_id, uint8_t *micro_job_id) 1039 { 1040 uint8_t buffer[10]; 1041 1042 memset(buffer, 0, sizeof(buffer)); 1043 1044 #ifdef USE_AUTONONCE 1045 if (mcompat_cmd_read_nonce(t1->chain_id, buffer, NONCE_LEN)) 1046 #else 1047 if (mcompat_cmd_read_result(t1->chain_id, CMD_ADDR_BROADCAST, buffer, NONCE_LEN)) 1048 #endif 1049 { 1050 *job_id = buffer[0] >> 4; 1051 *chip_id = buffer[1]; 1052 *(uint16_t *)micro_job_id = buffer[3]; 1053 memcpy(nonce, buffer + 4, 4); 1054 1055 applog(LOG_INFO, "Got nonce for chain%d / chip%d / nonce 0x%08x", 1056 t1->chain_id, *chip_id, *(uint32_t*)nonce); 1057 1058 return true; 1059 } 1060 1061 return false; 1062 } 1063 1064 bool check_chip(struct T1_chain *t1, int i) 1065 { 1066 uint8_t buffer[REG_LENGTH] = {0}; 1067 int cid = t1->chain_id; 1068 int chip_id = i + 1; 1069 1070 if (!mcompat_cmd_read_register(cid, chip_id, buffer, REG_LENGTH)) { 1071 applog(LOG_WARNING, "%d: Failed to read register for " 1072 "chip %d -> disabling", cid, chip_id); 1073 t1->chips[i].num_cores = 0; 1074 t1->chips[i].disabled = true; 1075 return false; 1076 } else { 1077 //hexdump("check chip:", buffer, REG_LENGTH); 1078 } 1079 1080 t1->chips[i].num_cores = buffer[11]; 1081 t1->num_cores += t1->chips[i].num_cores; 1082 //applog(LOG_WARNING, "%d: Found chip %d with %d active cores", 1083 // cid, chip_id, t1->chips[i].num_cores); 1084 1085 memcpy(t1->chips[i].reg, buffer, REG_LENGTH); 1086 t1->chips[i].temp= mcompat_temp_to_centigrade(0x000003ff & ((buffer[7] << 8) | buffer[8])); 1087 1088 if (t1->chips[i].num_cores < BROKEN_CHIP_THRESHOLD) { 1089 applog(LOG_WARNING, "%d: broken chip %d with %d active " 1090 "cores (threshold = %d)", cid, chip_id, 1091 t1->chips[i].num_cores, BROKEN_CHIP_THRESHOLD); 1092 1093 t1->chips[i].disabled = true; 1094 t1->num_cores -= t1->chips[i].num_cores; 1095 1096 return false; 1097 } 1098 1099 if (t1->chips[i].num_cores < WEAK_CHIP_THRESHOLD) { 1100 applog(LOG_WARNING, "%d: weak chip %d with %d active " 1101 "cores (threshold = %d)", cid, 1102 chip_id, t1->chips[i].num_cores, WEAK_CHIP_THRESHOLD); 1103 1104 return false; 1105 } 1106 1107 /* Reenable this in case we have cycled through this function more than 1108 * once. */ 1109 t1->chips[i].disabled = false; 1110 return true; 1111 } 1112 1113 int dragonmint_get_voltage_stats(struct T1_chain *t1, dragonmint_reg_ctrl_t *s_reg_ctrl) 1114 { 1115 int i = 0; 1116 int cid = t1->chain_id; 1117 s_reg_ctrl->highest_vol[cid] = s_reg_ctrl->stat_val[cid][0]; 1118 s_reg_ctrl->lowest_vol[cid] = s_reg_ctrl->stat_val[cid][0]; 1119 int total_vol = 0; 1120 int cnt = 0; 1121 1122 if ((t1->num_active_chips < 1) || (t1 == NULL)) 1123 return -1; 1124 1125 for (i = 0; i < t1->num_active_chips; i++) { 1126 if (s_reg_ctrl->highest_vol[cid] < s_reg_ctrl->stat_val[cid][i]) 1127 s_reg_ctrl->highest_vol[cid] = s_reg_ctrl->stat_val[cid][i]; 1128 1129 if (s_reg_ctrl->lowest_vol[cid] > s_reg_ctrl->stat_val[cid][i]) 1130 s_reg_ctrl->lowest_vol[cid] = s_reg_ctrl->stat_val[cid][i]; 1131 1132 // Ignore voltage value 0 1133 if (s_reg_ctrl->stat_val[cid][i] > 0) { 1134 total_vol += s_reg_ctrl->stat_val[cid][i]; 1135 cnt++; 1136 } 1137 } 1138 1139 // Ignore max and min voltages 1140 if (cnt > 2) { 1141 s_reg_ctrl->average_vol[cid] = 1142 (total_vol - s_reg_ctrl->highest_vol[cid] - s_reg_ctrl->lowest_vol[cid]) / (cnt - 2); 1143 } else 1144 s_reg_ctrl->average_vol[cid] = 0; 1145 1146 return 0; 1147 } 1148 1149 bool dragonmint_check_voltage(struct T1_chain *t1, int chip_id, dragonmint_reg_ctrl_t *s_reg_ctrl) 1150 { 1151 uint32_t rd[3], rd_min = 0xFFFFFFFF, rd_max = 0, rd_v = 0; 1152 int cid = t1->chain_id, i; 1153 float tmp_v; 1154 uint8_t reg[REG_LENGTH] = {0}; 1155 1156 /* Oversample by reading voltage 3 times and choosing middle value */ 1157 for (i = 0; i < 3; i++) { 1158 if (unlikely(!mcompat_cmd_read_register(cid, chip_id, reg, REG_LENGTH))) { 1159 applog(LOG_NOTICE, "%d: Failed to read register for ""chip %d -> disabling", 1160 cid, chip_id); 1161 t1->chips[chip_id - 1].num_cores = 0; 1162 t1->chips[chip_id - 1].disabled = 1; 1163 return false; 1164 } 1165 rd[i] = 0x000003ff & ((reg[7] << 8) | reg[8]); 1166 if (rd[i] < rd_min) 1167 rd_min = rd[i]; 1168 if (rd[i] > rd_max) 1169 rd_max = rd[i]; 1170 } 1171 rd_v = rd_min; 1172 for (i = 0; i < 3; i++) { 1173 if (rd[i] > rd_v && rd[i] < rd_max) 1174 rd_v = rd[i]; 1175 } 1176 1177 /* update temp database */ 1178 tmp_v = (float)(rd_v * MUL_COEF) / 1024; 1179 t1->chips[chip_id - 1].nVol = tmp_v * 1000; 1180 s_reg_ctrl->stat_val[t1->chain_id][chip_id-1] = t1->chips[chip_id-1].nVol; 1181 //applog(LOG_NOTICE, "[Read VOL %s:%d]rd_v = %d, tmp_v = %f",__FUNCTION__,__LINE__,rd_v,tmp_v); 1182 1183 return true; 1184 } 1185 1186 hardware_version_e dragonmint_get_hwver(void) 1187 { 1188 FILE* fd; 1189 char buffer[8] = {0}; 1190 hardware_version_e version; 1191 1192 fd = fopen(DRAGONMINT_HARDWARE_VERSION_FILE, "r"); 1193 if (fd == NULL) { 1194 applog(LOG_ERR, "Open hwver file failed, assuming hardware version G19 !"); 1195 return HARDWARE_VERSION_G19; 1196 } 1197 1198 FREAD(buffer, 8, 1, fd); 1199 fclose(fd); 1200 1201 if (strstr(buffer, "G9") != NULL) { 1202 version = HARDWARE_VERSION_G9; 1203 applog(LOG_INFO, "hardware version is G9"); 1204 }else if (strstr(buffer, "G19") != 0) { 1205 version = HARDWARE_VERSION_G19; 1206 applog(LOG_INFO, "hardware version is G19"); 1207 }else { 1208 version = 0; 1209 applog(LOG_ERR, "unknown hardware version !!!"); 1210 } 1211 1212 return version; 1213 } 1214 1215 uint32_t dragonmint_get_chipnum(void) 1216 { 1217 FILE* fd; 1218 char buffer[8] = {0}; 1219 1220 fd = fopen(DRAGONMINT_CHIP_NUM_FILE, "r"); 1221 if (fd == NULL) { 1222 applog(LOG_ERR, "Failed to read chip number from %s, assuming chip number %d!", 1223 DRAGONMINT_CHIP_NUM_FILE, MAX_CHIP_NUM); 1224 return MAX_CHIP_NUM; 1225 } 1226 1227 FREAD(buffer, 8, 1, fd); 1228 fclose(fd); 1229 1230 uint32_t chipnum = atoi(buffer); 1231 if (chipnum > 0 && chipnum <= MAX_CHIP_NUM) 1232 return chipnum; 1233 else 1234 return MAX_CHIP_NUM; 1235 } 1236 1237 #if 0 1238 dragonmint_type_e dragonmint_get_miner_type(void) 1239 { 1240 FILE* fd; 1241 char buffer[64] = {0}; 1242 dragonmint_type_e miner_type; 1243 1244 fd = fopen(DRAGONMINT_MINER_TYPE_FILE, "r"); 1245 if (fd == NULL) { 1246 applog(LOG_ERR, "Open type file failed, assuming miner type T1 !"); 1247 return DRAGONMINT_TYPE_T1; 1248 } 1249 1250 FREAD(buffer, 8, 1, fd); 1251 fclose(fd); 1252 1253 if (strstr(buffer, "T1") != NULL) { 1254 miner_type = DRAGONMINT_TYPE_T1; 1255 applog(LOG_INFO, "miner type is T1"); 1256 }else if (strstr(buffer, "T2") != NULL) { 1257 miner_type = DRAGONMINT_TYPE_A6; 1258 applog(LOG_INFO, "miner type is T2"); 1259 }else if (strstr(buffer, "T3") != NULL) { 1260 miner_type = DRAGONMINT_TYPE_A7; 1261 applog(LOG_INFO, "miner type is T3"); 1262 }else if (strstr(buffer, "T4") != NULL) { 1263 miner_type = DRAGONMINT_TYPE_A8; 1264 applog(LOG_INFO, "miner type is T4"); 1265 }else { 1266 miner_type = 0; 1267 applog(LOG_INFO, "unknown miner type !!!"); 1268 } 1269 1270 return miner_type; 1271 } 1272 #endif 1273 1274 extern struct T1_chain *chain[MAX_CHAIN_NUM]; 1275 void chain_all_exit(void) 1276 { 1277 int i; 1278 applog(LOG_NOTICE, "All chain power off and spi exit!"); 1279 1280 for(i = 0; i < MAX_CHAIN_NUM; i++) 1281 { 1282 if (chain[i] == NULL) 1283 continue; 1284 free(chain[i]->chips); 1285 mcompat_set_led(i, LED_ON); 1286 mcompat_set_power_en(i, 0); 1287 //asic_gpio_write(chain[i]->spi_ctx->led, 1); 1288 //asic_gpio_write(chain[i]->spi_ctx->power_en, 0); 1289 chain[i]->chips = NULL; 1290 //chain[i]->spi_ctx = NULL; 1291 free(chain[i]); 1292 } 1293 } 1294 1295 int dragonmint_chain_power_down(struct T1_chain *t1) 1296 { 1297 mcompat_set_power_en(t1->chain_id, 0); 1298 mcompat_set_start_en(t1->chain_id, 0); 1299 mcompat_set_led(t1->chain_id, LED_OFF); 1300 return 0; 1301 } 1302 1303 extern int chain_flag[MAX_CHAIN_NUM]; 1304 extern int chain_plug[MAX_CHAIN_NUM]; 1305 void power_down_all_chain(void) 1306 { 1307 int i; 1308 1309 for(i = 0; i < MAX_CHAIN_NUM; i++) 1310 { 1311 if (chain_flag[i] != 1){ 1312 continue; 1313 } 1314 dragonmint_chain_power_down(chain[i]); 1315 } 1316 } 1317 1318 void write_miner_ageing_status(uint32_t statusCode) 1319 { 1320 FILE* fd; 1321 1322 fd = fopen(MINER_AGEING_STATUS_FILE, "w+"); 1323 if (fd == NULL) { 1324 applog(LOG_ERR, "Create miner ageing status file failed!"); 1325 return; 1326 } 1327 rewind(fd); 1328 fprintf(fd, "%d", statusCode); 1329 applog(LOG_INFO, "Miner ageing status is %d!", statusCode); 1330 fclose(fd); 1331 1332 return; 1333 } 1334 1335 bool t1_set_pll(struct T1_chain *t1, int chip_id, int target_pll) 1336 { 1337 int i, start_pll = t1->pll; 1338 uint8_t reg[REG_LENGTH] = {0}; 1339 1340 if (target_pll > start_pll) { 1341 // increase pll step by step 1342 for (i = start_pll; i <= target_pll; i++) { 1343 memcpy(reg, default_reg[i], REG_LENGTH); 1344 if (!T1_SetT1PLLClock(t1, i, chip_id)) { 1345 applog(LOG_WARNING, "set default PLL fail"); 1346 write_miner_ageing_status(AGEING_CONFIG_PLL_FAILED); 1347 return false; 1348 } 1349 if (chip_id == CMD_ADDR_BROADCAST) 1350 t1->pll = i; 1351 // update temperature for all chains once every second 1352 dm_tempctrl_update_temp(chain_mask); 1353 } 1354 } else if (target_pll < start_pll) { 1355 // decrease pll step by step 1356 for (i = start_pll; i >= target_pll; i--) { 1357 memcpy(reg, default_reg[i], REG_LENGTH); 1358 if (!T1_SetT1PLLClock(t1, i, chip_id)) { 1359 applog(LOG_WARNING, "set default PLL fail"); 1360 write_miner_ageing_status(AGEING_CONFIG_PLL_FAILED); 1361 return false; 1362 } 1363 if (chip_id == CMD_ADDR_BROADCAST) 1364 t1->pll = i; 1365 // update temperature for all chains once every second 1366 dm_tempctrl_update_temp(chain_mask); 1367 } 1368 } 1369 1370 /* re-config adc div cause the pll is changed */ 1371 mcompat_cfg_tsadc_divider(t1->chain_id, PLL_Clk_12Mhz[t1->pll].speedMHz); 1372 1373 return true; 1374 }