/ driver-avalon8.h
driver-avalon8.h
  1  /*
  2   * Copyright 2017 xuzhenxing <xuzhenxing@canaan-creative.com>
  3   * Copyright 2016-2017 Mikeqin <Fengling.Qin@gmail.com>
  4   * Copyright 2016 Con Kolivas <kernel@kolivas.org>
  5   *
  6   * This program is free software; you can redistribute it and/or modify it
  7   * under the terms of the GNU General Public License as published by the Free
  8   * Software Foundation; either version 3 of the License, or (at your option)
  9   * any later version.  See COPYING for more details.
 10   */
 11  
 12  #ifndef _AVALON8_H_
 13  #define _AVALON8_H_
 14  
 15  #include "util.h"
 16  #include "i2c-context.h"
 17  
 18  #ifdef USE_AVALON8
 19  
 20  #define AVA8_FREQUENCY_MAX	1404
 21  
 22  #define AVA8_DEFAULT_FAN_MIN		5 /* % */
 23  #define AVA8_DEFAULT_FAN_MAX		100
 24  
 25  #define AVA8_DEFAULT_TEMP_TARGET	90
 26  #define AVA8_DEFAULT_TEMP_OVERHEAT	105
 27  
 28  #define AVA8_DEFAULT_VOLTAGE_LEVEL_MIN	-15
 29  #define AVA8_DEFAULT_VOLTAGE_LEVEL_MAX	15
 30  #define AVA8_INVALID_VOLTAGE_LEVEL	-16
 31  
 32  #define AVA8_DEFAULT_VOLTAGE_LEVEL_OFFSET_MIN	-2
 33  #define AVA8_DEFAULT_VOLTAGE_LEVEL_OFFSET	0
 34  #define AVA8_DEFAULT_VOLTAGE_LEVEL_OFFSET_MAX	1
 35  
 36  #define AVA8_INVALID_ASIC_OTP	-1
 37  
 38  #define AVA8_DEFAULT_FACTORY_INFO_0_MIN		-15
 39  #define AVA8_DEFAULT_FACTORY_INFO_0		0
 40  #define AVA8_DEFAULT_FACTORY_INFO_0_MAX		15
 41  #define AVA8_DEFAULT_FACTORY_INFO_0_CNT		1
 42  #define AVA8_DEFAULT_FACTORY_INFO_0_IGNORE	16
 43  
 44  #define AVA8_DEFAULT_FACTORY_INFO_1_CNT		3
 45  
 46  #define AVA8_DEFAULT_OVERCLOCKING_OFF 0
 47  #define AVA8_DEFAULT_OVERCLOCKING_ON  1
 48  
 49  #define AVA8_DEFAULT_FREQUENCY_0M	0
 50  #define AVA8_DEFAULT_FREQUENCY_650M	650
 51  #define AVA8_DEFAULT_FREQUENCY_725M	725
 52  #define AVA8_DEFAULT_FREQUENCY_775M	775
 53  #define AVA8_DEFAULT_FREQUENCY_850M	850
 54  #define AVA8_DEFAULT_FREQUENCY_MAX	1200
 55  #define AVA8_DEFAULT_FREQUENCY		(AVA8_DEFAULT_FREQUENCY_MAX)
 56  #define AVA8_DEFAULT_FREQUENCY_SEL	3
 57  
 58  #define AVA8_DEFAULT_MODULARS	7	/* Only support 6 modules maximum with one AUC */
 59  #define AVA8_DEFAULT_MINER_CNT	4
 60  #define AVA8_DEFAULT_ASIC_MAX	26
 61  #define AVA8_DEFAULT_PLL_CNT	4
 62  #define AVA8_DEFAULT_PMU_CNT	2
 63  #define AVA8_DEFAULT_CORE_VOLT_CNT	8
 64  
 65  #define AVA8_DEFAULT_POLLING_DELAY	20 /* ms */
 66  #define AVA8_DEFAULT_NTIME_OFFSET	2
 67  
 68  #define AVA8_DEFAULT_SMARTSPEED_OFF 0
 69  #define AVA8_DEFAULT_SMARTSPEED_MODE1 1
 70  #define AVA8_DEFAULT_SMART_SPEED	(AVA8_DEFAULT_SMARTSPEED_MODE1)
 71  
 72  #define AVA8_DEFAULT_TH_PASS	160
 73  #define AVA8_DEFAULT_TH_FAIL	8000
 74  #define AVA8_DEFAULT_TH_INIT	32767
 75  #define AVA8_DEFAULT_TH_ADD	1
 76  #define AVA8_DEFAULT_TH_MS	5
 77  #define AVA8_DEFAULT_TH_TIMEOUT	20000
 78  #define AVA8_DEFAULT_NONCE_MASK 24
 79  #define AVA8_DEFAULT_NONCE_CHECK	1
 80  #define AVA8_DEFAULT_MUX_L2H	0
 81  #define AVA8_DEFAULT_MUX_H2L	1
 82  #define AVA8_DEFAULT_H2LTIME0_SPD	3
 83  #define AVA8_DEFAULT_ROLL_ENABLE	1
 84  #define AVA8_DEFAULT_SPDLOW            0
 85  #define AVA8_DEFAULT_SPDHIGH           3
 86  #define AVA8_INVALID_TH_PASS		-1
 87  #define AVA8_INVALID_TH_FAIL		-1
 88  #define AVA8_INVALID_TH_TIMEOUT		-1
 89  #define AVA8_INVALID_NONCE_MASK		-1
 90  #define AVA8_INVALID_SPDLOW		-1
 91  
 92  #define AVA851_DEFAULT_TH_PASS		200
 93  #define AVA851_DEFAULT_TH_FAIL		7000
 94  #define AVA851_DEFAULT_TH_TIMEOUT	16000
 95  #define AVA851_DEFAULT_SPDLOW		2
 96  #define AVA851_DEFAULT_NONCE_MASK	27
 97  
 98  #define AVA831_DEFAULT_TH_PASS		200
 99  #define AVA831_DEFAULT_TH_FAIL		7000
100  #define AVA831_DEFAULT_TH_TIMEOUT	16000
101  #define AVA831_DEFAULT_SPDLOW		2
102  #define AVA831_DEFAULT_NONCE_MASK	27
103  
104  /* PID CONTROLLER*/
105  #define AVA8_DEFAULT_PID_P		2
106  #define AVA8_DEFAULT_PID_I		5
107  #define AVA8_DEFAULT_PID_D		0
108  #define AVA8_DEFAULT_PID_TEMP_MIN	50
109  #define AVA8_DEFAULT_PID_TEMP_MAX	100
110  
111  #define AVA8_DEFAULT_IIC_DETECT	false
112  
113  #define AVA8_PWM_MAX	0x3FF
114  #define AVA8_DRV_DIFFMAX	2700
115  #define AVA8_ASIC_TIMEOUT_CONST	419430400 /* (2^32 * 1000) / (256 * 40) */
116  
117  #define AVA8_MODULE_DETECT_INTERVAL	30 /* 30 s */
118  
119  #define AVA8_AUC_VER_LEN	12	/* Version length: 12 (AUC-YYYYMMDD) */
120  #define AVA8_AUC_SPEED		400000
121  #define AVA8_AUC_XDELAY  	19200	/* 4800 = 1ms in AUC (11U14)  */
122  #define AVA8_AUC_P_SIZE		64
123  
124  #define AVA8_CONNECTER_AUC	1
125  #define AVA8_CONNECTER_IIC	2
126  
127  /* avalon8 protocol package type from MM protocol.h */
128  #define AVA8_MM_VER_LEN	15
129  #define AVA8_MM_DNA_LEN	8
130  #define AVA8_H1	'C'
131  #define AVA8_H2	'N'
132  
133  #define AVA8_P_COINBASE_SIZE	(6 * 1024 + 64)
134  #define AVA8_P_MERKLES_COUNT	30
135  
136  #define AVA8_P_COUNT	40
137  #define AVA8_P_DATA_LEN 32
138  
139  #define AVA8_OTP_LEN	        32
140  
141  /* Broadcase with block iic_write*/
142  #define AVA8_P_DETECT	0x10
143  
144  /* Broadcase With non-block iic_write*/
145  #define AVA8_P_STATIC	0x11
146  #define AVA8_P_JOB_ID	0x12
147  #define AVA8_P_COINBASE	0x13
148  #define AVA8_P_MERKLES	0x14
149  #define AVA8_P_HEADER	0x15
150  #define AVA8_P_TARGET	0x16
151  #define AVA8_P_JOB_FIN	0x17
152  
153  /* Broadcase or with I2C address */
154  #define AVA8_P_SET			0x20
155  #define AVA8_P_SET_FIN			0x21
156  #define AVA8_P_SET_VOLT			0x22
157  #define AVA8_P_SET_PMU			0x24
158  #define AVA8_P_SET_PLL			0x25
159  #define AVA8_P_SET_SS			0x26
160  /* 0x27 reserved */
161  #define AVA8_P_SET_FAC			0x28
162  #define AVA8_P_SET_OC			0x29
163  
164  /* Have to send with I2C address */
165  #define AVA8_P_POLLING	0x30
166  #define AVA8_P_SYNC	0x31
167  #define AVA8_P_TEST	0x32
168  #define AVA8_P_RSTMMTX	0x33
169  #define AVA8_P_GET_VOLT	0x34
170  
171  /* Back to host */
172  #define AVA8_P_ACKDETECT		0x40
173  #define AVA8_P_STATUS			0x41
174  #define AVA8_P_NONCE			0x42
175  #define AVA8_P_TEST_RET			0x43
176  #define AVA8_P_STATUS_VOLT		0x46
177  #define AVA8_P_STATUS_PMU		0x48
178  #define AVA8_P_STATUS_PLL		0x49
179  #define AVA8_P_STATUS_LOG		0x4a
180  #define AVA8_P_STATUS_ASIC		0x4b
181  #define AVA8_P_STATUS_PVT		0x4c
182  #define AVA8_P_STATUS_FAC		0x4d
183  #define AVA8_P_STATUS_OC		0x4e
184  #define AVA8_P_STATUS_OTP		0x4f
185  #define AVA8_P_SET_ASIC_OTP		0x50
186  
187  #define AVA8_MODULE_BROADCAST	0
188  /* End of avalon8 protocol package type */
189  
190  #define AVA8_IIC_RESET		0xa0
191  #define AVA8_IIC_INIT		0xa1
192  #define AVA8_IIC_DEINIT		0xa2
193  #define AVA8_IIC_XFER		0xa5
194  #define AVA8_IIC_INFO		0xa6
195  
196  #define AVA8_FREQ_INIT_MODE	0x0
197  #define AVA8_FREQ_PLLADJ_MODE	0x1
198  
199  #define AVA8_DEFAULT_FACTORY_INFO_CNT	(AVA8_DEFAULT_FACTORY_INFO_0_CNT + AVA8_DEFAULT_FACTORY_INFO_1_CNT)
200  
201  #define AVA8_DEFAULT_OVERCLOCKING_CNT	1
202  
203  #define AVA8_MM821_VIN_ADC_RATIO	(3.3 / 4095.0 * 25.62 / 5.62 * 1000.0 * 100.0)
204  #define AVA8_MM831_VIN_ADC_RATIO	(3.3 / 4095.0 * 25.62 / 5.62 * 1000.0 * 100.0)
205  #define AVA8_MM841_VIN_ADC_RATIO	(3.3 / 4095.0 * 25.62 / 5.62 * 1000.0 * 100.0)
206  #define AVA8_MM851_VIN_ADC_RATIO	(3.3 / 4095.0 * 25.62 / 5.62 * 1000.0 * 100.0)
207  
208  #define AVA8_MM821_VOUT_ADC_RATIO	(3.3 / 4095.0 * 63.0 / 20.0 * 10000.0 * 100.0)
209  #define AVA8_MM831_VOUT_ADC_RATIO	(3.3 / 4095.0 * 63.0 / 20.0 * 10000.0 * 100.0)
210  #define AVA8_MM841_VOUT_ADC_RATIO	(3.3 / 4095.0 * 63.0 / 20.0 * 10000.0 * 100.0)
211  #define AVA8_MM851_VOUT_ADC_RATIO	(3.3 / 4095.0 * 72.3 / 20.0 * 10000.0 * 100.0)
212  
213  #define AVA8_OTP_INDEX_READ_STEP   	27
214  #define AVA8_OTP_INDEX_ASIC_NUM	28
215  #define AVA8_OTP_INDEX_CYCLE_HIT	29
216  #define AVA8_OTP_INFO_LOTIDCRC_OFFSET	0
217  #define AVA8_OTP_INFO_LOTID_OFFSET  	6
218  
219  struct avalon8_pkg {
220  	uint8_t head[2];
221  	uint8_t type;
222  	uint8_t opt;
223  	uint8_t idx;
224  	uint8_t cnt;
225  	uint8_t data[32];
226  	uint8_t crc[2];
227  };
228  #define avalon8_ret avalon8_pkg
229  
230  struct avalon8_info {
231  	/* Public data */
232  	int64_t last_diff1;
233  	int64_t pending_diff1;
234  	double last_rej;
235  
236  	int mm_count;
237  	int xfer_err_cnt;
238  	int pool_no;
239  
240  	struct timeval firsthash;
241  	struct timeval last_fan_adj;
242  	struct timeval last_stratum;
243  	struct timeval last_detect;
244  
245  	cglock_t update_lock;
246  
247  	struct pool pool0;
248  	struct pool pool1;
249  	struct pool pool2;
250  
251  	bool work_restart;
252  
253  	uint32_t last_jobid;
254  
255  	/* For connecter */
256  	char auc_version[AVA8_AUC_VER_LEN + 1];
257  
258  	int auc_speed;
259  	int auc_xdelay;
260  	int auc_sensor;
261  
262  	struct i2c_ctx *i2c_slaves[AVA8_DEFAULT_MODULARS];
263  
264  	uint8_t connecter; /* AUC or IIC */
265  
266  	/* For modulars */
267  	bool enable[AVA8_DEFAULT_MODULARS];
268  	bool reboot[AVA8_DEFAULT_MODULARS];
269  
270  	struct timeval elapsed[AVA8_DEFAULT_MODULARS];
271  
272  	uint8_t mm_dna[AVA8_DEFAULT_MODULARS][AVA8_MM_DNA_LEN];
273  	char mm_version[AVA8_DEFAULT_MODULARS][AVA8_MM_VER_LEN + 1]; /* It's a string */
274  	uint32_t total_asics[AVA8_DEFAULT_MODULARS];
275  	uint32_t max_ntime; /* Maximum: 7200 */
276  
277  	uint8_t otp_info[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT][AVA8_OTP_LEN + 1];
278  
279  	int mod_type[AVA8_DEFAULT_MODULARS];
280  	uint8_t miner_count[AVA8_DEFAULT_MODULARS];
281  	uint8_t asic_count[AVA8_DEFAULT_MODULARS];
282  
283  	uint32_t freq_mode[AVA8_DEFAULT_MODULARS];
284  	int led_indicator[AVA8_DEFAULT_MODULARS];
285  	int fan_pct[AVA8_DEFAULT_MODULARS];
286  	int fan_cpm[AVA8_DEFAULT_MODULARS];
287  
288  	int temp[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT][AVA8_DEFAULT_ASIC_MAX];
289  	int temp_mm[AVA8_DEFAULT_MODULARS];
290  
291  	uint32_t core_volt[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT] \
292  			  [AVA8_DEFAULT_ASIC_MAX][AVA8_DEFAULT_CORE_VOLT_CNT];
293  
294  	uint8_t cutoff[AVA8_DEFAULT_MODULARS];
295  	int temp_target[AVA8_DEFAULT_MODULARS];
296  	int temp_overheat[AVA8_DEFAULT_MODULARS];
297  
298  	/* pid controler*/
299  	int pid_p[AVA8_DEFAULT_MODULARS];
300  	int pid_i[AVA8_DEFAULT_MODULARS];
301  	int pid_d[AVA8_DEFAULT_MODULARS];
302  	double pid_u[AVA8_DEFAULT_MODULARS];
303  	int pid_e[AVA8_DEFAULT_MODULARS][3];
304  	int pid_0[AVA8_DEFAULT_MODULARS];
305  
306  	int set_voltage_level[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT];
307  	uint32_t set_frequency[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT][AVA8_DEFAULT_PLL_CNT];
308  	uint32_t get_frequency[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT][AVA8_DEFAULT_ASIC_MAX][AVA8_DEFAULT_PLL_CNT];
309  
310  	int set_asic_otp[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT];
311  
312  	uint16_t get_vin[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT];
313  	uint32_t get_voltage[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT];
314  	uint32_t get_pll[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT][AVA8_DEFAULT_PLL_CNT];
315  
316  	uint32_t get_asic[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT][AVA8_DEFAULT_ASIC_MAX][6];
317  
318  	int8_t factory_info[AVA8_DEFAULT_FACTORY_INFO_CNT];
319  	int8_t overclocking_info[AVA8_DEFAULT_OVERCLOCKING_CNT];
320  
321  	uint64_t local_works[AVA8_DEFAULT_MODULARS];
322  	uint64_t local_works_i[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT];
323  	uint64_t hw_works[AVA8_DEFAULT_MODULARS];
324  	uint64_t hw_works_i[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT];
325  	uint64_t chip_matching_work[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT][AVA8_DEFAULT_ASIC_MAX];
326  
327  	uint32_t error_code[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT + 1];
328  	uint32_t error_crc[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_MINER_CNT];
329  	uint8_t error_polling_cnt[AVA8_DEFAULT_MODULARS];
330  
331  	uint8_t power_good[AVA8_DEFAULT_MODULARS];
332  	char pmu_version[AVA8_DEFAULT_MODULARS][AVA8_DEFAULT_PMU_CNT][5];
333  	uint64_t diff1[AVA8_DEFAULT_MODULARS];
334  
335  	uint16_t vin_adc_ratio[AVA8_DEFAULT_MODULARS];
336  	uint16_t vout_adc_ratio[AVA8_DEFAULT_MODULARS];
337  
338  	bool conn_overloaded;
339  };
340  
341  struct avalon8_iic_info {
342  	uint8_t iic_op;
343  	union {
344  		uint32_t aucParam[2];
345  		uint8_t slave_addr;
346  	} iic_param;
347  };
348  
349  struct avalon8_dev_description {
350  	uint8_t dev_id_str[8];
351  	int mod_type;
352  	uint8_t miner_count; /* it should not greater than AVA8_DEFAULT_MINER_CNT */
353  	uint8_t asic_count; /* asic count each miner, it should not great than AVA8_DEFAULT_ASIC_MAX */
354  	uint16_t vin_adc_ratio;
355  	uint16_t vout_adc_ratio;
356  	int set_voltage_level;
357  	uint16_t set_freq[AVA8_DEFAULT_PLL_CNT];
358  	int set_asic_otp;
359  };
360  
361  #define AVA8_WRITE_SIZE (sizeof(struct avalon8_pkg))
362  #define AVA8_READ_SIZE AVA8_WRITE_SIZE
363  
364  #define AVA8_SEND_OK 0
365  #define AVA8_SEND_ERROR -1
366  
367  extern char *set_avalon8_fan(char *arg);
368  extern char *set_avalon8_freq(char *arg);
369  extern char *set_avalon8_voltage_level(char *arg);
370  extern char *set_avalon8_voltage_level_offset(char *arg);
371  extern char *set_avalon8_asic_otp(char *arg);
372  extern int opt_avalon8_temp_target;
373  extern int opt_avalon8_polling_delay;
374  extern int opt_avalon8_aucspeed;
375  extern int opt_avalon8_aucxdelay;
376  extern int opt_avalon8_smart_speed;
377  extern bool opt_avalon8_iic_detect;
378  extern int opt_avalon8_freq_sel;
379  extern uint32_t opt_avalon8_th_pass;
380  extern uint32_t opt_avalon8_th_fail;
381  extern uint32_t opt_avalon8_th_init;
382  extern uint32_t opt_avalon8_th_ms;
383  extern uint32_t opt_avalon8_th_timeout;
384  extern uint32_t opt_avalon8_th_add;
385  extern uint32_t opt_avalon8_nonce_mask;
386  extern uint32_t opt_avalon8_nonce_check;
387  extern uint32_t opt_avalon8_mux_l2h;
388  extern uint32_t opt_avalon8_mux_h2l;
389  extern uint32_t opt_avalon8_h2ltime0_spd;
390  extern uint32_t opt_avalon8_roll_enable;
391  extern uint32_t opt_avalon8_spdlow;
392  extern uint32_t opt_avalon8_spdhigh;
393  extern uint32_t opt_avalon8_pid_p;
394  extern uint32_t opt_avalon8_pid_i;
395  extern uint32_t opt_avalon8_pid_d;
396  
397  #endif /* USE_AVALON8 */
398  #endif /* _AVALON8_H_ */