/ driver-bab.c
driver-bab.c
1 /* 2 * Copyright 2013-2014 Andrew Smith 3 * Copyright 2013 bitfury 4 * 5 * BitFury GPIO code originally based on chainminer code: 6 * https://github.com/bfsb/chainminer 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the Free 10 * Software Foundation; either version 3 of the License, or (at your option) 11 * any later version. See COPYING for more details. 12 */ 13 14 #include "config.h" 15 #include "compat.h" 16 #include "miner.h" 17 #include "sha2.h" 18 #include "klist.h" 19 #include <ctype.h> 20 21 /* 22 * Tested on RPi running both Raspbian and Arch 23 * with BlackArrow BitFury V1 & V2 GPIO Controller 24 * with 16 chip BlackArrow BitFury boards 25 */ 26 27 #ifndef LINUX 28 static void bab_detect(__maybe_unused bool hotplug) 29 { 30 } 31 #else 32 33 #include <unistd.h> 34 #include <linux/spi/spidev.h> 35 #include <sys/mman.h> 36 #include <sys/ioctl.h> 37 #include <fcntl.h> 38 39 #define BAB_SPI_BUS 0 40 #define BAB_SPI_CHIP 0 41 42 #define BAB_SPI_SPEED 96000 43 #define BAB_SPI_BUFSIZ 1024 44 45 #define BAB_DELAY_USECS 0 46 #define BAB_TRF_DELAY 0 47 48 #define BAB_ADDR(_n) (*((babinfo->gpio) + (_n))) 49 50 #define BAB_INP_GPIO(_n) BAB_ADDR((_n) / 10) &= (~(7 << (((_n) % 10) * 3))) 51 #define BAB_OUT_GPIO(_n) BAB_ADDR((_n) / 10) |= (1 << (((_n) % 10) * 3)) 52 #define BAB_OUT_GPIO_V(_n, _v) BAB_ADDR((_n) / 10) |= (((_v) <= 3 ? (_v) + 4 : \ 53 ((_v) == 4 ? 3 : 2)) << (((_n) % 10) * 3)) 54 55 #define BAB_GPIO_SET BAB_ADDR(7) 56 #define BAB_GPIO_CLR BAB_ADDR(10) 57 #define BAB_GPIO_LEVEL BAB_ADDR(13) 58 59 // If the V1 test of this many chips finds no chips it will try V2 60 #define BAB_V1_CHIP_TEST 32 61 62 //maximum number of chips per board 63 #define BAB_BOARDCHIPS 16 64 #define BAB_MAXBUF (BAB_MAXCHIPS * 512) 65 #define BAB_V1_BANK 0 66 //maximum number of alternative banks 67 #define BAB_MAXBANKS 4 68 //maximum number of boards in a bank 69 #define BAB_BANKBOARDS 6 70 //maximum number of chips on alternative bank 71 #define BAB_BANKCHIPS (BAB_BOARDCHIPS * BAB_BANKBOARDS) 72 //maximum number of chips 73 #define BAB_MAXCHIPS (BAB_MAXBANKS * BAB_BANKCHIPS) 74 #define BAB_CORES 16 75 #define BAB_X_COORD 21 76 #define BAB_Y_COORD 36 77 78 #define BAB_NOOP 0 79 #define BAB_BREAK ((uint8_t *)"\04") 80 #define BAB_ASYNC ((uint8_t *)"\05") 81 #define BAB_SYNC ((uint8_t *)"\06") 82 83 #define BAB_FFL " - from %s %s() line %d" 84 #define BAB_FFL_HERE __FILE__, __func__, __LINE__ 85 #define BAB_FFL_PASS file, func, line 86 87 #define bab_reset(_bank, _times) _bab_reset(babcgpu, babinfo, _bank, _times) 88 #define bab_txrx(_item, _det) _bab_txrx(babcgpu, babinfo, _item, _det, BAB_FFL_HERE) 89 #define bab_add_buf(_item, _data) _bab_add_buf(_item, _data, sizeof(_data)-1, BAB_FFL_HERE) 90 #define BAB_ADD_BREAK(_item) _bab_add_buf(_item, BAB_BREAK, 1, BAB_FFL_HERE) 91 #define BAB_ADD_ASYNC(_item) _bab_add_buf(_item, BAB_ASYNC, 1, BAB_FFL_HERE) 92 #define bab_config_reg(_item, _reg, _ena) _bab_config_reg(_item, _reg, _ena, BAB_FFL_HERE) 93 #define bab_add_data(_item, _addr, _data, _siz) _bab_add_data(_item, _addr, (const uint8_t *)(_data), _siz, BAB_FFL_HERE) 94 95 #define BAB_ADD_NOOPs(_item, _count) _bab_add_noops(_item, _count, BAB_FFL_HERE) 96 97 #define BAB_ADD_MIN 4 98 #define BAB_ADD_MAX 128 99 100 #define BAB_BASEA 4 101 #define BAB_BASEB 61 102 #define BAB_COUNTERS 16 103 static const uint8_t bab_counters[BAB_COUNTERS] = { 104 64, 64, 105 BAB_BASEA, BAB_BASEA+4, 106 BAB_BASEA+2, BAB_BASEA+2+16, 107 BAB_BASEA, BAB_BASEA+1, 108 (BAB_BASEB)%65, (BAB_BASEB+1)%65, 109 (BAB_BASEB+3)%65, (BAB_BASEB+3+16)%65, 110 (BAB_BASEB+4)%65, (BAB_BASEB+4+4)%65, 111 (BAB_BASEB+3+3)%65, (BAB_BASEB+3+1+3)%65 112 }; 113 114 #define BAB_W1 16 115 static const uint32_t bab_w1[BAB_W1] = { 116 0, 0, 0, 0xffffffff, 117 0x80000000, 0, 0, 0, 118 0, 0, 0, 0, 119 0, 0, 0, 0x00000280 120 }; 121 122 #define BAB_W2 8 123 static const uint32_t bab_w2[BAB_W2] = { 124 0x80000000, 0, 0, 0, 125 0, 0, 0, 0x00000100 126 }; 127 128 #define BAB_TEST_DATA 19 129 static const uint32_t bab_test_data[BAB_TEST_DATA] = { 130 0xb0e72d8e, 0x1dc5b862, 0xe9e7c4a6, 0x3050f1f5, 131 0x8a1a6b7e, 0x7ec384e8, 0x42c1c3fc, 0x8ed158a1, 132 0x8a1a6b7e, 0x6f484872, 0x4ff0bb9b, 0x12c97f07, 133 0xb0e72d8e, 0x55d979bc, 0x39403296, 0x40f09e84, 134 0x8a0bb7b7, 0x33af304f, 0x0b290c1a //, 0xf0c4e61f 135 }; 136 137 /* 138 * maximum chip speed available for auto tuner 139 * speed/nrate/hrate/watt 140 * 53/ 97/ 100/ 84 141 * 54/ 98/ 107/ 88 142 * 55/ 99/ 115/ 93 143 * 56/ 101/ 125/ 99 144 */ 145 #define BAB_MAXSPEED 57 146 #define BAB_DEFMAXSPEED 55 147 #define BAB_DEFSPEED 53 148 #define BAB_MINSPEED 52 149 #define BAB_ABSMINSPEED 32 150 151 /* 152 * % of errors to tune the speed up or down 153 * 1.0 to 10.0 should average around 5.5% errors 154 */ 155 #define BAB_TUNEUP 1.0 156 #define BAB_TUNEDOWN 10.0 157 158 #define MIDSTATE_BYTES 32 159 #define MERKLE_OFFSET 64 160 #define MERKLE_BYTES 12 161 #define BLOCK_HEADER_BYTES 80 162 163 #define MIDSTATE_UINTS (MIDSTATE_BYTES / sizeof(uint32_t)) 164 #define DATA_UINTS ((BLOCK_HEADER_BYTES / sizeof(uint32_t)) - 1) 165 166 // Auto adjust 167 #define BAB_AUTO_REG 0 168 #define BAB_AUTO_VAL 0x01 169 // iclk 170 #define BAB_ICLK_REG 1 171 #define BAB_ICLK_VAL 0x02 172 // No fast clock 173 #define BAB_FAST_REG 2 174 #define BAB_FAST_VAL 0x04 175 // Divide by 2 176 #define BAB_DIV2_REG 3 177 #define BAB_DIV2_VAL 0x08 178 // Slow Clock 179 #define BAB_SLOW_REG 4 180 #define BAB_SLOW_VAL 0x10 181 // No oclk 182 #define BAB_OCLK_REG 6 183 #define BAB_OCLK_VAL 0x20 184 // Has configured 185 #define BAB_CFGD_VAL 0x40 186 187 #define BAB_DEFCONF (BAB_AUTO_VAL | \ 188 BAB_ICLK_VAL | \ 189 BAB_DIV2_VAL | \ 190 BAB_SLOW_VAL) 191 192 #define BAB_REG_CLR_FROM 7 193 #define BAB_REG_CLR_TO 11 194 195 #define BAB_AUTO_SET(_c) ((_c) & BAB_AUTO_VAL) 196 #define BAB_ICLK_SET(_c) ((_c) & BAB_ICLK_VAL) 197 #define BAB_FAST_SET(_c) ((_c) & BAB_FAST_VAL) 198 #define BAB_DIV2_SET(_c) ((_c) & BAB_DIV2_VAL) 199 #define BAB_SLOW_SET(_c) ((_c) & BAB_SLOW_VAL) 200 #define BAB_OCLK_SET(_c) ((_c) & BAB_OCLK_VAL) 201 #define BAB_CFGD_SET(_c) ((_c) & BAB_CFGD_VAL) 202 203 #define BAB_AUTO_BIT(_c) (BAB_AUTO_SET(_c) ? true : false) 204 #define BAB_ICLK_BIT(_c) (BAB_ICLK_SET(_c) ? false : true) 205 #define BAB_FAST_BIT(_c) (BAB_FAST_SET(_c) ? true : false) 206 #define BAB_DIV2_BIT(_c) (BAB_DIV2_SET(_c) ? false : true) 207 #define BAB_SLOW_BIT(_c) (BAB_SLOW_SET(_c) ? true : false) 208 #define BAB_OCLK_BIT(_c) (BAB_OCLK_SET(_c) ? true : false) 209 210 #define BAB_COUNT_ADDR 0x0100 211 #define BAB_W1A_ADDR 0x1000 212 #define BAB_W1B_ADDR 0x1400 213 #define BAB_W2_ADDR 0x1900 214 #define BAB_INP_ADDR 0x3000 215 #define BAB_OSC_ADDR 0x6000 216 #define BAB_REG_ADDR 0x7000 217 218 /* 219 * valid: 0x01 0x03 0x07 0x0F 0x1F 0x3F 0x7F 0xFF 220 * max { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0x00 } 221 * max { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x3F, 0x00 } 222 * avg { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00 } 223 * slo { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x3F, 0x00 } 224 * min { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } 225 * good: 0x1F (97) 0x3F (104) 0x7F (109) 0xFF (104) 226 */ 227 228 #define BAB_OSC 8 229 static const uint8_t bab_osc_bits[BAB_OSC] = 230 { 0x01, 0x03, 0x07, 0x0F, 0x1F, 0x3F, 0x7F, 0xFF }; 231 232 static const uint8_t bab_reg_ena[4] = { 0xc1, 0x6a, 0x59, 0xe3 }; 233 static const uint8_t bab_reg_dis[4] = { 0x00, 0x00, 0x00, 0x00 }; 234 235 #define BAB_NONCE_OFFSETS 3 236 #define BAB_OFF_0x1C_STA 2 237 #define BAB_OFF_0x1C_FIN 2 238 #define BAB_OFF_OTHER_STA 0 239 #define BAB_OFF_OTHER_FIN 1 240 241 #define BAB_EVIL_NONCE 0xe0 242 #define BAB_EVIL_MASK 0xff 243 244 static const uint32_t bab_nonce_offsets[] = {-0x800000, 0, -0x400000}; 245 246 struct bab_work_send { 247 uint32_t midstate[MIDSTATE_UINTS]; 248 uint32_t ms3steps[MIDSTATE_UINTS]; 249 uint32_t merkle7; 250 uint32_t ntime; 251 uint32_t bits; 252 }; 253 254 #define BAB_REPLY_NONCES 16 255 struct bab_work_reply { 256 uint32_t nonce[BAB_REPLY_NONCES]; 257 uint32_t jobsel; 258 uint32_t spichk; 259 }; 260 261 #define BAB_CHIP_MIN (sizeof(struct bab_work_reply)+16) 262 263 #define ALLOC_WITEMS 1024 264 #define LIMIT_WITEMS 0 265 266 // Work 267 typedef struct witem { 268 struct work *work; 269 struct bab_work_send chip_input; 270 bool ci_setup; 271 bool rolled; 272 int nonces; 273 struct timeval work_start; 274 } WITEM; 275 276 #define ALLOC_SITEMS 8 277 #define LIMIT_SITEMS 0 278 279 // SPI I/O 280 typedef struct sitem { 281 uint32_t siz; 282 uint8_t wbuf[BAB_MAXBUF]; 283 uint8_t rbuf[BAB_MAXBUF]; 284 uint32_t chip_off[BAB_MAXCHIPS+1]; 285 uint32_t bank_off[BAB_MAXBANKS+2]; 286 // WITEMs used to build the work 287 K_ITEM *witems[BAB_MAXCHIPS]; 288 struct timeval work_start; 289 } SITEM; 290 291 #define ALLOC_RITEMS 256 292 #define LIMIT_RITEMS 0 293 294 // Results 295 typedef struct ritem { 296 int chip; 297 int nonces; 298 uint32_t nonce[BAB_REPLY_NONCES]; 299 bool not_first_reply; 300 struct timeval when; 301 } RITEM; 302 303 #define ALLOC_NITEMS 102400 304 #define LIMIT_NITEMS 0 305 306 // Nonce History 307 typedef struct nitem { 308 struct timeval found; 309 } NITEM; 310 311 #define DATAW(_item) ((WITEM *)(_item->data)) 312 #define DATAS(_item) ((SITEM *)(_item->data)) 313 #define DATAR(_item) ((RITEM *)(_item->data)) 314 #define DATAN(_item) ((NITEM *)(_item->data)) 315 316 // Record the number of each band between work sends 317 #define BAB_DELAY_BANDS 10 318 #define BAB_DELAY_BASE 0.5 319 #define BAB_DELAY_STEP 0.2 320 321 #define BAB_CHIP_SPEEDS 6 322 // less than or equal GH/s 323 static double chip_speed_ranges[BAB_CHIP_SPEEDS - 1] = 324 { 0.0, 0.8, 1.6, 2.2, 2.8 }; 325 // Greater than the last one above means it's the last speed 326 static char *chip_speed_names[BAB_CHIP_SPEEDS] = 327 { "Bad", "V.Slow", "Slow", "OK", "Good", "Fast" }; 328 329 /* 330 * This is required to do chip tuning 331 * If disabled, it will simply run the chips at default speed 332 * unless they never return valid results 333 */ 334 #define UPDATE_HISTORY 1 335 336 struct bab_info { 337 struct thr_info spi_thr; 338 struct thr_info res_thr; 339 340 pthread_mutex_t did_lock; 341 pthread_mutex_t nonce_lock; 342 343 // All GPIO goes through this 344 volatile unsigned *gpio; 345 346 int version; 347 int spifd; 348 int chips; 349 int chips_per_bank[BAB_MAXBANKS+1]; 350 int missing_chips_per_bank[BAB_MAXBANKS+1]; 351 int bank_first_chip[BAB_MAXBANKS+1]; 352 int bank_last_chip[BAB_MAXBANKS+1]; 353 int boards; 354 int banks; 355 uint32_t chip_spis[BAB_MAXCHIPS+1]; 356 357 int reply_wait; 358 uint64_t reply_waits; 359 360 cgsem_t scan_work; 361 cgsem_t spi_work; 362 cgsem_t spi_reply; 363 cgsem_t process_reply; 364 365 bool disabled[BAB_MAXCHIPS]; 366 int total_disabled; 367 368 struct bab_work_reply chip_results[BAB_MAXCHIPS]; 369 struct bab_work_reply chip_prev[BAB_MAXCHIPS]; 370 371 uint8_t chip_fast[BAB_MAXCHIPS]; 372 uint8_t chip_conf[BAB_MAXCHIPS]; 373 uint8_t old_fast[BAB_MAXCHIPS]; 374 uint8_t old_conf[BAB_MAXCHIPS]; 375 uint8_t chip_bank[BAB_MAXCHIPS+1]; 376 377 uint8_t osc[BAB_OSC]; 378 379 /* 380 * Ignore errors in the first work reply since 381 * they may be from a previous run or random junk 382 * There can be >100 with just one 16 chip board 383 */ 384 uint32_t initial_ignored; 385 bool not_first_reply[BAB_MAXCHIPS]; 386 387 // Stats 388 uint64_t core_good[BAB_MAXCHIPS][BAB_CORES]; 389 uint64_t core_bad[BAB_MAXCHIPS][BAB_CORES]; 390 uint64_t chip_spie[BAB_MAXCHIPS]; // spi errors 391 uint64_t chip_miso[BAB_MAXCHIPS]; // msio errors 392 uint64_t chip_nonces[BAB_MAXCHIPS]; 393 uint64_t chip_good[BAB_MAXCHIPS]; 394 uint64_t chip_bad[BAB_MAXCHIPS]; 395 uint64_t chip_ncore[BAB_MAXCHIPS][BAB_X_COORD][BAB_Y_COORD]; 396 397 uint64_t chip_cont_bad[BAB_MAXCHIPS]; 398 uint64_t chip_max_bad[BAB_MAXCHIPS]; 399 400 uint64_t discarded_e0s; 401 402 uint64_t untested_nonces; 403 uint64_t tested_nonces; 404 405 uint64_t new_nonces; 406 uint64_t ok_nonces; 407 408 uint64_t nonce_offset_count[BAB_NONCE_OFFSETS]; 409 uint64_t total_tests; 410 uint64_t max_tests_per_nonce; 411 uint64_t total_links; 412 uint64_t total_proc_links; 413 uint64_t max_links; 414 uint64_t max_proc_links; 415 uint64_t total_work_links; 416 417 uint64_t fail; 418 uint64_t fail_total_tests; 419 uint64_t fail_total_links; 420 uint64_t fail_total_work_links; 421 422 uint64_t ign_total_tests; 423 uint64_t ign_total_links; 424 uint64_t ign_total_work_links; 425 426 struct timeval last_sent_work; 427 uint64_t delay_count; 428 double delay_min; 429 double delay_max; 430 /* 431 * 0 is below band ranges 432 * BAB_DELAY_BANDS+1 is above band ranges 433 */ 434 uint64_t delay_bands[BAB_DELAY_BANDS+2]; 435 436 uint64_t send_count; 437 double send_total; 438 double send_min; 439 double send_max; 440 441 // Work 442 K_LIST *wfree_list; 443 K_STORE *available_work; 444 K_STORE *chip_work[BAB_MAXCHIPS]; 445 446 // SPI I/O 447 K_LIST *sfree_list; 448 // Waiting to send 449 K_STORE *spi_list; 450 // Sent 451 K_STORE *spi_sent; 452 453 // Results 454 K_LIST *rfree_list; 455 K_STORE *res_list; 456 457 // Nonce History 458 K_LIST *nfree_list; 459 K_STORE *good_nonces[BAB_MAXCHIPS]; 460 K_STORE *bad_nonces[BAB_MAXCHIPS]; 461 462 struct timeval first_work[BAB_MAXCHIPS]; 463 #if UPDATE_HISTORY 464 uint32_t work_count[BAB_MAXCHIPS]; 465 struct timeval last_tune[BAB_MAXCHIPS]; 466 uint8_t bad_fast[BAB_MAXCHIPS]; 467 bool bad_msg[BAB_MAXCHIPS]; 468 #endif 469 uint64_t work_unrolled; 470 uint64_t work_rolled; 471 472 // bab-options (in order) 473 uint8_t max_speed; 474 uint8_t def_speed; 475 uint8_t min_speed; 476 double tune_up; 477 double tune_down; 478 uint32_t speed_hz; 479 uint16_t delay_usecs; 480 uint64_t trf_delay; 481 482 struct timeval last_did; 483 484 bool initialised; 485 }; 486 487 /* 488 * Amount of time for history 489 * Older items in nonce_history are discarded 490 * 300s / 5 minutes 491 */ 492 #define HISTORY_TIME_S 300 493 494 /* 495 * If the SPI I/O thread waits longer than this long for work 496 * it will report an error saying how long it's waiting 497 * and again every BAB_STD_WAIT_mS after that 498 */ 499 #define BAB_LONG_uS 1200000 500 501 /* 502 * If work wasn't available early enough, 503 * report every BAB_LONG_WAIT_mS until it is 504 */ 505 #define BAB_LONG_WAIT_mS 888 506 507 /* 508 * Some amount of time to wait for work 509 * before checking how long we've waited 510 */ 511 #define BAB_STD_WAIT_mS 888 512 513 /* 514 * How long to wait for the ioctl() to complete (per BANK) 515 * This is a failsafe in case the ioctl() fails 516 * since bab_txrx() will already post a wakeup when it completes 517 * V1 is set to this x 2 518 * V2 is set to this x active banks 519 */ 520 #define BAB_REPLY_WAIT_mS 160 521 522 /* 523 * Work items older than this should not expect results 524 * It has to allow for the result buffer returned with the next result 525 * 0.75GH/s takes 5.727s to do a full nonce range 526 * If HW is too high, consider increasing this to see if work is being 527 * expired too early (due to slow chips) 528 */ 529 #define BAB_WORK_EXPIRE_mS 7800 530 531 // Don't send work more often than this 532 #define BAB_EXPECTED_WORK_DELAY_mS 899 533 534 /* 535 * If a chip only has bad results after this time limit in seconds, 536 * then switch it down to min_speed 537 */ 538 #define BAB_BAD_TO_MIN (HISTORY_TIME_S + 10) 539 540 /* 541 * Also, just to be sure it's actually mining, it must have got this 542 * many bad results before considering disabling it 543 */ 544 #define BAB_BAD_COUNT 100 545 546 /* 547 * If a chip only has bad results after this time limit in seconds, 548 * then disable it 549 * A chip only returning bad results will use a lot more CPU than 550 * an ok chip since all results will be tested against all unexpired 551 * work that's been sent to the chip 552 */ 553 #define BAB_BAD_DEAD (BAB_BAD_TO_MIN * 2) 554 555 /* 556 * Maximum bab_queue_full() will roll work if it is allowed to 557 * Since work can somtimes (rarely) queue up with many chips, 558 * limit it to avoid it getting too much range in the pending work 559 */ 560 #define BAB_MAX_ROLLTIME 42 561 562 static void bab_ms3steps(uint32_t *p) 563 { 564 uint32_t a, b, c, d, e, f, g, h, new_e, new_a; 565 int i; 566 567 a = p[0]; 568 b = p[1]; 569 c = p[2]; 570 d = p[3]; 571 e = p[4]; 572 f = p[5]; 573 g = p[6]; 574 h = p[7]; 575 for (i = 0; i < 3; i++) { 576 new_e = p[i+16] + sha256_k[i] + h + CH(e,f,g) + SHA256_F2(e) + d; 577 new_a = p[i+16] + sha256_k[i] + h + CH(e,f,g) + SHA256_F2(e) + 578 SHA256_F1(a) + MAJ(a,b,c); 579 d = c; 580 c = b; 581 b = a; 582 a = new_a; 583 h = g; 584 g = f; 585 f = e; 586 e = new_e; 587 } 588 p[15] = a; 589 p[14] = b; 590 p[13] = c; 591 p[12] = d; 592 p[11] = e; 593 p[10] = f; 594 p[9] = g; 595 p[8] = h; 596 } 597 598 static uint32_t bab_decnonce(uint32_t in) 599 { 600 uint32_t out; 601 602 /* First part load */ 603 out = (in & 0xFF) << 24; 604 in >>= 8; 605 606 /* Byte reversal */ 607 in = (((in & 0xaaaaaaaa) >> 1) | ((in & 0x55555555) << 1)); 608 in = (((in & 0xcccccccc) >> 2) | ((in & 0x33333333) << 2)); 609 in = (((in & 0xf0f0f0f0) >> 4) | ((in & 0x0f0f0f0f) << 4)); 610 611 out |= (in >> 2) & 0x3FFFFF; 612 613 /* Extraction */ 614 if (in & 1) 615 out |= (1 << 23); 616 if (in & 2) 617 out |= (1 << 22); 618 619 out -= 0x800004; 620 return out; 621 } 622 623 static void cleanup_older(struct cgpu_info *babcgpu, int chip, K_ITEM *witem) 624 { 625 struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data); 626 struct timeval now; 627 bool expired_item; 628 K_ITEM *tail; 629 630 cgtime(&now); 631 632 K_WLOCK(babinfo->chip_work[chip]); 633 tail = babinfo->chip_work[chip]->tail; 634 expired_item = false; 635 // Discard expired work 636 while (tail) { 637 if (ms_tdiff(&now, &(DATAW(tail)->work_start)) < BAB_WORK_EXPIRE_mS) 638 break; 639 640 if (tail == witem) 641 expired_item = true; 642 643 k_unlink_item(babinfo->chip_work[chip], tail); 644 K_WUNLOCK(babinfo->chip_work[chip]); 645 if (DATAW(tail)->rolled) 646 free_work(DATAW(tail)->work); 647 else 648 work_completed(babcgpu, DATAW(tail)->work); 649 K_WLOCK(babinfo->chip_work[chip]); 650 k_add_head(babinfo->wfree_list, tail); 651 tail = babinfo->chip_work[chip]->tail; 652 } 653 // If we didn't expire witem, then remove all older than it 654 if (!expired_item && witem && witem->next) { 655 tail = babinfo->chip_work[chip]->tail; 656 while (tail && tail != witem) { 657 k_unlink_item(babinfo->chip_work[chip], tail); 658 K_WUNLOCK(babinfo->chip_work[chip]); 659 if (DATAW(tail)->rolled) 660 free_work(DATAW(tail)->work); 661 else 662 work_completed(babcgpu, DATAW(tail)->work); 663 K_WLOCK(babinfo->chip_work[chip]); 664 k_add_head(babinfo->wfree_list, tail); 665 tail = babinfo->chip_work[chip]->tail; 666 } 667 } 668 K_WUNLOCK(babinfo->chip_work[chip]); 669 } 670 671 static void _bab_reset(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo, int bank, int times) 672 { 673 const int banks[BAB_MAXBANKS] = { 18, 23, 24, 25 }; 674 int i; 675 676 BAB_INP_GPIO(10); 677 BAB_OUT_GPIO(10); 678 BAB_INP_GPIO(11); 679 BAB_OUT_GPIO(11); 680 681 if (bank) { 682 for (i = 0; i < BAB_MAXBANKS; i++) { 683 BAB_INP_GPIO(banks[i]); 684 BAB_OUT_GPIO(banks[i]); 685 if (bank == i+1) 686 BAB_GPIO_SET = 1 << banks[i]; 687 else 688 BAB_GPIO_CLR = 1 << banks[i]; 689 } 690 cgsleep_us(4096); 691 } else { 692 for (i = 0; i < BAB_MAXBANKS; i++) 693 BAB_INP_GPIO(banks[i]); 694 } 695 696 BAB_GPIO_SET = 1 << 11; 697 for (i = 0; i < times; i++) { // 1us = 1MHz 698 BAB_GPIO_SET = 1 << 10; 699 cgsleep_us(1); 700 BAB_GPIO_CLR = 1 << 10; 701 cgsleep_us(1); 702 } 703 BAB_GPIO_CLR = 1 << 11; 704 BAB_INP_GPIO(11); 705 BAB_INP_GPIO(10); 706 BAB_INP_GPIO(9); 707 BAB_OUT_GPIO_V(11, 0); 708 BAB_OUT_GPIO_V(10, 0); 709 BAB_OUT_GPIO_V(9, 0); 710 } 711 712 // TODO: handle a false return where this is called? 713 static bool _bab_txrx(struct cgpu_info *babcgpu, struct bab_info *babinfo, K_ITEM *item, bool detect_ignore, const char *file, const char *func, const int line) 714 { 715 int bank, i, count, chip1, chip2; 716 uint32_t siz, pos; 717 struct spi_ioc_transfer tran; 718 uintptr_t rbuf, wbuf; 719 720 wbuf = (uintptr_t)(DATAS(item)->wbuf); 721 rbuf = (uintptr_t)(DATAS(item)->rbuf); 722 siz = (uint32_t)(DATAS(item)->siz); 723 724 memset(&tran, 0, sizeof(tran)); 725 tran.speed_hz = babinfo->speed_hz; 726 tran.delay_usecs = babinfo->delay_usecs; 727 728 i = 0; 729 pos = 0; 730 for (bank = 0; bank <= BAB_MAXBANKS; bank++) { 731 if (DATAS(item)->bank_off[bank]) { 732 bab_reset(bank, 64); 733 break; 734 } 735 } 736 737 if (unlikely(bank > BAB_MAXBANKS)) { 738 applog(LOG_ERR, "%s%d: %s() failed to find a bank" BAB_FFL, 739 babcgpu->drv->name, babcgpu->device_id, 740 __func__, BAB_FFL_PASS); 741 return false; 742 } 743 744 count = 0; 745 while (siz > 0) { 746 tran.tx_buf = wbuf; 747 tran.rx_buf = rbuf; 748 tran.speed_hz = BAB_SPI_SPEED; 749 if (pos == DATAS(item)->bank_off[bank]) { 750 for (; ++bank <= BAB_MAXBANKS; ) { 751 if (DATAS(item)->bank_off[bank] > pos) { 752 bab_reset(bank, 64); 753 break; 754 } 755 } 756 } 757 if (siz < BAB_SPI_BUFSIZ) 758 tran.len = siz; 759 else 760 tran.len = BAB_SPI_BUFSIZ; 761 762 if (pos < DATAS(item)->bank_off[bank] && 763 DATAS(item)->bank_off[bank] < (pos + tran.len)) 764 tran.len = DATAS(item)->bank_off[bank] - pos; 765 766 for (; i < babinfo->chips; i++) { 767 if (!DATAS(item)->chip_off[i]) 768 continue; 769 if (DATAS(item)->chip_off[i] >= pos + tran.len) { 770 tran.speed_hz = babinfo->chip_spis[i]; 771 break; 772 } 773 } 774 775 if (unlikely(i > babinfo->chips)) { 776 applog(LOG_ERR, "%s%d: %s() failed to find chip" BAB_FFL, 777 babcgpu->drv->name, babcgpu->device_id, 778 __func__, BAB_FFL_PASS); 779 return false; 780 } 781 782 if (unlikely(babinfo->chip_spis[i] == BAB_SPI_SPEED)) { 783 applog(LOG_DEBUG, "%s%d: %s() chip[%d] speed %d shouldn't be %d" BAB_FFL, 784 babcgpu->drv->name, babcgpu->device_id, 785 __func__, i, (int)babinfo->chip_spis[i], 786 BAB_SPI_SPEED, BAB_FFL_PASS); 787 } 788 789 if (unlikely(tran.speed_hz == BAB_SPI_SPEED)) { 790 applog(LOG_DEBUG, "%s%d: %s() transfer speed %d shouldn't be %d" BAB_FFL, 791 babcgpu->drv->name, babcgpu->device_id, 792 __func__, (int)tran.speed_hz, 793 BAB_SPI_SPEED, BAB_FFL_PASS); 794 } 795 796 count++; 797 if (ioctl(babinfo->spifd, SPI_IOC_MESSAGE(1), (void *)&tran) < 0) { 798 if (!detect_ignore || errno != 110) { 799 for (bank = BAB_MAXBANKS; bank >= 0; bank--) { 800 if (DATAS(item)->bank_off[bank] && 801 pos >= DATAS(item)->bank_off[bank]) { 802 break; 803 } 804 } 805 for (chip1 = babinfo->chips-1; chip1 >= 0; chip1--) { 806 if (DATAS(item)->chip_off[chip1] && 807 pos >= DATAS(item)->chip_off[chip1]) { 808 break; 809 } 810 } 811 for (chip2 = babinfo->chips-1; chip2 >= 0; chip2--) { 812 if (DATAS(item)->chip_off[chip2] && 813 (pos + tran.len) >= DATAS(item)->chip_off[chip2]) { 814 break; 815 } 816 } 817 applog(LOG_ERR, "%s%d: ioctl (%d) siz=%d bank=%d chip=%d-%d" 818 " failed err=%d" BAB_FFL, 819 babcgpu->drv->name, 820 babcgpu->device_id, 821 count, (int)(tran.len), 822 bank, chip1, chip2, 823 errno, BAB_FFL_PASS); 824 } 825 return false; 826 } 827 828 siz -= tran.len; 829 wbuf += tran.len; 830 rbuf += tran.len; 831 pos += tran.len; 832 833 if (siz > 0 && babinfo->trf_delay > 0) 834 cgsleep_us(babinfo->trf_delay); 835 } 836 cgtime(&(DATAS(item)->work_start)); 837 mutex_lock(&(babinfo->did_lock)); 838 cgtime(&(babinfo->last_did)); 839 mutex_unlock(&(babinfo->did_lock)); 840 return true; 841 } 842 843 static void _bab_add_buf_rev(K_ITEM *item, const uint8_t *data, uint32_t siz, const char *file, const char *func, const int line) 844 { 845 uint32_t now_used, i; 846 uint8_t tmp; 847 848 now_used = DATAS(item)->siz; 849 if (now_used + siz >= BAB_MAXBUF) { 850 quitfrom(1, file, func, line, 851 "%s() buffer limit of %d exceeded=%d siz=%d", 852 __func__, BAB_MAXBUF, (int)(now_used + siz), (int)siz); 853 } 854 855 for (i = 0; i < siz; i++) { 856 tmp = data[i]; 857 tmp = ((tmp & 0xaa)>>1) | ((tmp & 0x55) << 1); 858 tmp = ((tmp & 0xcc)>>2) | ((tmp & 0x33) << 2); 859 tmp = ((tmp & 0xf0)>>4) | ((tmp & 0x0f) << 4); 860 DATAS(item)->wbuf[now_used + i] = tmp; 861 } 862 863 DATAS(item)->siz += siz; 864 } 865 866 static void _bab_add_buf(K_ITEM *item, const uint8_t *data, size_t siz, const char *file, const char *func, const int line) 867 { 868 uint32_t now_used; 869 870 now_used = DATAS(item)->siz; 871 if (now_used + siz >= BAB_MAXBUF) { 872 quitfrom(1, file, func, line, 873 "%s() DATAS buffer limit of %d exceeded=%d siz=%d", 874 __func__, BAB_MAXBUF, (int)(now_used + siz), (int)siz); 875 } 876 877 memcpy(&(DATAS(item)->wbuf[now_used]), data, siz); 878 DATAS(item)->siz += siz; 879 } 880 881 static void _bab_add_noops(K_ITEM *item, size_t siz, const char *file, const char *func, const int line) 882 { 883 uint32_t now_used; 884 885 now_used = DATAS(item)->siz; 886 if (now_used + siz >= BAB_MAXBUF) { 887 quitfrom(1, file, func, line, 888 "%s() DATAS buffer limit of %d exceeded=%d siz=%d", 889 __func__, BAB_MAXBUF, (int)(now_used + siz), (int)siz); 890 } 891 892 memset(&(DATAS(item)->wbuf[now_used]), BAB_NOOP, siz); 893 DATAS(item)->siz += siz; 894 } 895 896 static void _bab_add_data(K_ITEM *item, uint32_t addr, const uint8_t *data, size_t siz, const char *file, const char *func, const int line) 897 { 898 uint8_t tmp[3]; 899 int trf_siz; 900 901 if (siz < BAB_ADD_MIN || siz > BAB_ADD_MAX) { 902 quitfrom(1, file, func, line, 903 "%s() called with invalid siz=%d (min=%d max=%d)", 904 __func__, (int)siz, BAB_ADD_MIN, BAB_ADD_MAX); 905 } 906 trf_siz = siz / 4; 907 tmp[0] = (trf_siz - 1) | 0xE0; 908 tmp[1] = (addr >> 8) & 0xff; 909 tmp[2] = addr & 0xff; 910 _bab_add_buf(item, tmp, sizeof(tmp), BAB_FFL_PASS); 911 _bab_add_buf_rev(item, data, siz, BAB_FFL_PASS); 912 } 913 914 static void _bab_config_reg(K_ITEM *item, uint32_t reg, bool enable, const char *file, const char *func, const int line) 915 { 916 if (enable) { 917 _bab_add_data(item, BAB_REG_ADDR + reg*32, 918 bab_reg_ena, sizeof(bab_reg_ena), BAB_FFL_PASS); 919 } else { 920 _bab_add_data(item, BAB_REG_ADDR + reg*32, 921 bab_reg_dis, sizeof(bab_reg_dis), BAB_FFL_PASS); 922 } 923 924 } 925 926 static void bab_set_osc(struct bab_info *babinfo, int chip) 927 { 928 int fast, i; 929 930 fast = babinfo->chip_fast[chip]; 931 932 for (i = 0; i < BAB_OSC && fast > BAB_OSC; i++, fast -= BAB_OSC) { 933 babinfo->osc[i] = 0xff; 934 } 935 if (i < BAB_OSC && fast > 0 && fast <= BAB_OSC) 936 babinfo->osc[i++] = bab_osc_bits[fast - 1]; 937 for (; i < BAB_OSC; i++) 938 babinfo->osc[i] = 0x00; 939 940 applog(LOG_DEBUG, "@osc(chip=%d) fast=%d 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x", chip, fast, babinfo->osc[0], babinfo->osc[1], babinfo->osc[2], babinfo->osc[3], babinfo->osc[4], babinfo->osc[5], babinfo->osc[6], babinfo->osc[7]); 941 } 942 943 static void bab_put(struct bab_info *babinfo, K_ITEM *sitem) 944 { 945 struct bab_work_send *chip_input; 946 int i, reg, bank = 0; 947 size_t chip_siz; 948 949 BAB_ADD_BREAK(sitem); 950 for (i = 0; i < babinfo->chips; i++) { 951 if (babinfo->chip_bank[i] != bank) { 952 DATAS(sitem)->bank_off[bank] = DATAS(sitem)->siz; 953 bank = babinfo->chip_bank[i]; 954 BAB_ADD_BREAK(sitem); 955 } 956 if (!(babinfo->disabled[i])) { 957 if (BAB_CFGD_SET(babinfo->chip_conf[i]) || !babinfo->chip_conf[i]) { 958 bab_set_osc(babinfo, i); 959 bab_add_data(sitem, BAB_OSC_ADDR, babinfo->osc, sizeof(babinfo->osc)); 960 bab_config_reg(sitem, BAB_ICLK_REG, BAB_ICLK_BIT(babinfo->chip_conf[i])); 961 bab_config_reg(sitem, BAB_FAST_REG, BAB_FAST_BIT(babinfo->chip_conf[i])); 962 bab_config_reg(sitem, BAB_DIV2_REG, BAB_DIV2_BIT(babinfo->chip_conf[i])); 963 bab_config_reg(sitem, BAB_SLOW_REG, BAB_SLOW_BIT(babinfo->chip_conf[i])); 964 bab_config_reg(sitem, BAB_OCLK_REG, BAB_OCLK_BIT(babinfo->chip_conf[i])); 965 for (reg = BAB_REG_CLR_FROM; reg <= BAB_REG_CLR_TO; reg++) 966 bab_config_reg(sitem, reg, false); 967 if (babinfo->chip_conf[i]) { 968 bab_add_data(sitem, BAB_COUNT_ADDR, bab_counters, sizeof(bab_counters)); 969 bab_add_data(sitem, BAB_W1A_ADDR, bab_w1, sizeof(bab_w1)); 970 bab_add_data(sitem, BAB_W1B_ADDR, bab_w1, sizeof(bab_w1)/2); 971 bab_add_data(sitem, BAB_W2_ADDR, bab_w2, sizeof(bab_w2)); 972 babinfo->chip_conf[i] ^= BAB_CFGD_VAL; 973 } 974 babinfo->old_fast[i] = babinfo->chip_fast[i]; 975 babinfo->old_conf[i] = babinfo->chip_conf[i]; 976 } else { 977 if (babinfo->old_fast[i] != babinfo->chip_fast[i]) { 978 bab_set_osc(babinfo, i); 979 bab_add_data(sitem, BAB_OSC_ADDR, babinfo->osc, sizeof(babinfo->osc)); 980 babinfo->old_fast[i] = babinfo->chip_fast[i]; 981 } 982 if (babinfo->old_conf[i] != babinfo->chip_conf[i]) { 983 if (BAB_ICLK_SET(babinfo->old_conf[i]) != 984 BAB_ICLK_SET(babinfo->chip_conf[i])) 985 bab_config_reg(sitem, BAB_ICLK_REG, 986 BAB_ICLK_BIT(babinfo->chip_conf[i])); 987 if (BAB_FAST_SET(babinfo->old_conf[i]) != 988 BAB_FAST_SET(babinfo->chip_conf[i])) 989 bab_config_reg(sitem, BAB_FAST_REG, 990 BAB_FAST_BIT(babinfo->chip_conf[i])); 991 if (BAB_DIV2_SET(babinfo->old_conf[i]) != 992 BAB_DIV2_SET(babinfo->chip_conf[i])) 993 bab_config_reg(sitem, BAB_DIV2_REG, 994 BAB_DIV2_BIT(babinfo->chip_conf[i])); 995 if (BAB_SLOW_SET(babinfo->old_conf[i]) != 996 BAB_SLOW_SET(babinfo->chip_conf[i])) 997 bab_config_reg(sitem, BAB_SLOW_REG, 998 BAB_SLOW_BIT(babinfo->chip_conf[i])); 999 if (BAB_OCLK_SET(babinfo->old_conf[i]) != 1000 BAB_OCLK_SET(babinfo->chip_conf[i])) 1001 bab_config_reg(sitem, BAB_OCLK_REG, 1002 BAB_OCLK_BIT(babinfo->chip_conf[i])); 1003 babinfo->old_conf[i] = babinfo->chip_conf[i]; 1004 } 1005 } 1006 DATAS(sitem)->chip_off[i] = DATAS(sitem)->siz + 3; 1007 chip_input = &(DATAW(DATAS(sitem)->witems[i])->chip_input); 1008 1009 if (babinfo->chip_conf[i]) 1010 bab_add_data(sitem, BAB_INP_ADDR, (uint8_t *)chip_input, sizeof(*chip_input)); 1011 1012 chip_siz = DATAS(sitem)->siz - babinfo->chip_conf[i]; 1013 if (chip_siz < BAB_CHIP_MIN) 1014 BAB_ADD_NOOPs(sitem, BAB_CHIP_MIN - chip_siz); 1015 } 1016 BAB_ADD_ASYNC(sitem); 1017 } 1018 DATAS(sitem)->chip_off[i] = DATAS(sitem)->siz; 1019 DATAS(sitem)->bank_off[bank] = DATAS(sitem)->siz; 1020 1021 K_WLOCK(babinfo->spi_list); 1022 k_add_head(babinfo->spi_list, sitem); 1023 K_WUNLOCK(babinfo->spi_list); 1024 1025 cgsem_post(&(babinfo->spi_work)); 1026 } 1027 1028 static bool bab_get(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo, struct timeval *when) 1029 { 1030 K_ITEM *item; 1031 bool delayed; 1032 int i; 1033 1034 item = NULL; 1035 delayed = false; 1036 while (item == NULL) { 1037 cgsem_mswait(&(babinfo->spi_reply), babinfo->reply_wait); 1038 1039 K_WLOCK(babinfo->spi_sent); 1040 item = k_unlink_tail(babinfo->spi_sent); 1041 K_WUNLOCK(babinfo->spi_sent); 1042 1043 if (!item) { 1044 if (!delayed) { 1045 applog(LOG_WARNING, "%s%d: Delay getting work reply ...", 1046 babcgpu->drv->name, 1047 babcgpu->device_id); 1048 delayed = true; 1049 babinfo->reply_waits++; 1050 } 1051 } 1052 } 1053 1054 for (i = 0; i < babinfo->chips; i++) { 1055 if (babinfo->chip_conf[i] & 0x7f) { 1056 memcpy((void *)&(babinfo->chip_results[i]), 1057 (void *)(DATAS(item)->rbuf + DATAS(item)->chip_off[i]), 1058 sizeof(babinfo->chip_results[0])); 1059 } 1060 } 1061 1062 // work_start is also the time the results were read 1063 memcpy(when, &(DATAS(item)->work_start), sizeof(*when)); 1064 1065 K_WLOCK(babinfo->sfree_list); 1066 k_add_head(babinfo->sfree_list, item); 1067 K_WUNLOCK(babinfo->sfree_list); 1068 1069 return true; 1070 } 1071 1072 void bab_detect_chips(struct cgpu_info *babcgpu, struct bab_info *babinfo, int bank, int first, int last) 1073 { 1074 int i, reg, j; 1075 K_ITEM *item; 1076 1077 if (sizeof(struct bab_work_send) != sizeof(bab_test_data)) { 1078 quithere(1, "struct bab_work_send (%d) and bab_test_data (%d)" 1079 " must be the same size", 1080 (int)sizeof(struct bab_work_send), 1081 (int)sizeof(bab_test_data)); 1082 } 1083 1084 K_WLOCK(babinfo->sfree_list); 1085 item = k_unlink_head_zero(babinfo->sfree_list); 1086 K_WUNLOCK(babinfo->sfree_list); 1087 BAB_ADD_BREAK(item); 1088 for (i = first; i < last && i < BAB_MAXCHIPS; i++) { 1089 bab_set_osc(babinfo, i); 1090 bab_add_data(item, BAB_OSC_ADDR, babinfo->osc, sizeof(babinfo->osc)); 1091 bab_config_reg(item, BAB_ICLK_REG, BAB_ICLK_BIT(babinfo->chip_conf[i])); 1092 bab_config_reg(item, BAB_FAST_REG, BAB_FAST_BIT(babinfo->chip_conf[i])); 1093 bab_config_reg(item, BAB_DIV2_REG, BAB_DIV2_BIT(babinfo->chip_conf[i])); 1094 bab_config_reg(item, BAB_SLOW_REG, BAB_SLOW_BIT(babinfo->chip_conf[i])); 1095 bab_config_reg(item, BAB_OCLK_REG, BAB_OCLK_BIT(babinfo->chip_conf[i])); 1096 for (reg = BAB_REG_CLR_FROM; reg <= BAB_REG_CLR_TO; reg++) 1097 bab_config_reg(item, reg, false); 1098 bab_add_data(item, BAB_COUNT_ADDR, bab_counters, sizeof(bab_counters)); 1099 bab_add_data(item, BAB_W1A_ADDR, bab_w1, sizeof(bab_w1)); 1100 bab_add_data(item, BAB_W1B_ADDR, bab_w1, sizeof(bab_w1)/2); 1101 bab_add_data(item, BAB_W2_ADDR, bab_w2, sizeof(bab_w2)); 1102 DATAS(item)->chip_off[i] = DATAS(item)->siz + 3; 1103 bab_add_data(item, BAB_INP_ADDR, bab_test_data, sizeof(bab_test_data)); 1104 DATAS(item)->chip_off[i+1] = DATAS(item)->siz; 1105 DATAS(item)->bank_off[bank] = DATAS(item)->siz; 1106 babinfo->chips = i + 1; 1107 bab_txrx(item, false); 1108 DATAS(item)->siz = 0; 1109 BAB_ADD_BREAK(item); 1110 for (j = first; j <= i; j++) { 1111 DATAS(item)->chip_off[j] = DATAS(item)->siz + 3; 1112 BAB_ADD_ASYNC(item); 1113 } 1114 } 1115 1116 memset(item->data, 0, babinfo->sfree_list->siz); 1117 BAB_ADD_BREAK(item); 1118 for (i = first; i < last && i < BAB_MAXCHIPS; i++) { 1119 DATAS(item)->chip_off[i] = DATAS(item)->siz + 3; 1120 bab_add_data(item, BAB_INP_ADDR, bab_test_data, sizeof(bab_test_data)); 1121 BAB_ADD_ASYNC(item); 1122 } 1123 DATAS(item)->chip_off[i] = DATAS(item)->siz; 1124 DATAS(item)->bank_off[bank] = DATAS(item)->siz; 1125 babinfo->chips = i; 1126 bab_txrx(item, true); 1127 DATAS(item)->siz = 0; 1128 babinfo->chips = first; 1129 for (i = first; i < last && i < BAB_MAXCHIPS; i++) { 1130 uint32_t tmp[DATA_UINTS-1]; 1131 memcpy(tmp, DATAS(item)->rbuf + DATAS(item)->chip_off[i], sizeof(tmp)); 1132 DATAS(item)->chip_off[i] = 0; 1133 for (j = 0; j < BAB_REPLY_NONCES; j++) { 1134 if (tmp[j] != 0xffffffff && tmp[j] != 0x00000000) { 1135 babinfo->chip_bank[i] = bank; 1136 babinfo->chips = i + 1; 1137 break; 1138 } 1139 } 1140 } 1141 for (i = first ; i < babinfo->chips; i++) 1142 babinfo->chip_bank[i] = bank; 1143 1144 K_WLOCK(babinfo->sfree_list); 1145 k_add_head(babinfo->sfree_list, item); 1146 K_WUNLOCK(babinfo->sfree_list); 1147 } 1148 1149 static const char *bab_modules[] = { 1150 "i2c-dev", 1151 "i2c-bcm2708", 1152 "spidev", 1153 "spi-bcm2708", 1154 NULL 1155 }; 1156 1157 static const char *bab_memory = "/dev/mem"; 1158 1159 static int bab_memory_addr = 0x20200000; 1160 1161 // TODO: add --bab-options for SPEED_HZ, tran.delay_usecs and an inter transfer delay (default 0) 1162 static struct { 1163 int request; 1164 int value; 1165 } bab_ioc[] = { 1166 { SPI_IOC_RD_MODE, 0 }, 1167 { SPI_IOC_WR_MODE, 0 }, 1168 { SPI_IOC_RD_BITS_PER_WORD, 8 }, 1169 { SPI_IOC_WR_BITS_PER_WORD, 8 }, 1170 { SPI_IOC_RD_MAX_SPEED_HZ, 1000000 }, 1171 { SPI_IOC_WR_MAX_SPEED_HZ, 1000000 }, 1172 { -1, -1 } 1173 }; 1174 1175 static bool bab_init_gpio(struct cgpu_info *babcgpu, struct bab_info *babinfo, int bus, int chip) 1176 { 1177 int i, err, memfd, data; 1178 char buf[64]; 1179 1180 bab_ioc[4].value = (int)(babinfo->speed_hz); 1181 bab_ioc[5].value = (int)(babinfo->speed_hz); 1182 1183 for (i = 0; bab_modules[i]; i++) { 1184 snprintf(buf, sizeof(buf), "modprobe %s", bab_modules[i]); 1185 err = system(buf); 1186 if (err) { 1187 applog(LOG_ERR, "%s failed to modprobe %s (%d) - you need to be root?", 1188 babcgpu->drv->dname, 1189 bab_modules[i], err); 1190 goto bad_out; 1191 } 1192 } 1193 1194 memfd = open(bab_memory, O_RDWR | O_SYNC); 1195 if (memfd < 0) { 1196 applog(LOG_ERR, "%s failed open %s (%d)", 1197 babcgpu->drv->dname, 1198 bab_memory, errno); 1199 goto bad_out; 1200 } 1201 1202 babinfo->gpio = (volatile unsigned *)mmap(NULL, BAB_SPI_BUFSIZ, 1203 PROT_READ | PROT_WRITE, 1204 MAP_SHARED, memfd, 1205 bab_memory_addr); 1206 if (babinfo->gpio == MAP_FAILED) { 1207 close(memfd); 1208 applog(LOG_ERR, "%s failed mmap gpio (%d)", 1209 babcgpu->drv->dname, 1210 errno); 1211 goto bad_out; 1212 } 1213 1214 close(memfd); 1215 1216 snprintf(buf, sizeof(buf), "/dev/spidev%d.%d", bus, chip); 1217 babinfo->spifd = open(buf, O_RDWR); 1218 if (babinfo->spifd < 0) { 1219 applog(LOG_ERR, "%s failed to open spidev (%d)", 1220 babcgpu->drv->dname, 1221 errno); 1222 goto map_out; 1223 } 1224 1225 babcgpu->device_path = strdup(buf); 1226 1227 for (i = 0; bab_ioc[i].value != -1; i++) { 1228 data = bab_ioc[i].value; 1229 err = ioctl(babinfo->spifd, bab_ioc[i].request, (void *)&data); 1230 if (err < 0) { 1231 applog(LOG_ERR, "%s failed ioctl (%d) (%d)", 1232 babcgpu->drv->dname, 1233 i, errno); 1234 goto close_out; 1235 } 1236 } 1237 1238 for (i = 0; i < BAB_MAXCHIPS; i++) 1239 babinfo->chip_spis[i] = (int)((1000000.0 / (100.0 + 31.0 * (i + 1))) * 1000); 1240 1241 return true; 1242 1243 close_out: 1244 close(babinfo->spifd); 1245 babinfo->spifd = 0; 1246 free(babcgpu->device_path); 1247 babcgpu->device_path = NULL; 1248 map_out: 1249 munmap((void *)(babinfo->gpio), BAB_SPI_BUFSIZ); 1250 babinfo->gpio = NULL; 1251 bad_out: 1252 return false; 1253 } 1254 1255 static void bab_init_chips(struct cgpu_info *babcgpu, struct bab_info *babinfo) 1256 { 1257 int chip, chipoff, bank, chips, new_chips, boards, mis; 1258 1259 applog(LOG_WARNING, "%s V1 first test for %d chips ...", 1260 babcgpu->drv->dname, BAB_V1_CHIP_TEST); 1261 1262 bab_detect_chips(babcgpu, babinfo, 0, 0, BAB_V1_CHIP_TEST); 1263 if (babinfo->chips > 0) { 1264 babinfo->version = 1; 1265 babinfo->banks = 0; 1266 if (babinfo->chips == BAB_V1_CHIP_TEST) { 1267 applog(LOG_WARNING, "%s V1 test for %d more chips ...", 1268 babcgpu->drv->dname, BAB_MAXCHIPS - BAB_V1_CHIP_TEST); 1269 1270 bab_detect_chips(babcgpu, babinfo, 0, BAB_V1_CHIP_TEST, BAB_MAXCHIPS); 1271 } 1272 babinfo->chips_per_bank[BAB_V1_BANK] = babinfo->chips; 1273 babinfo->bank_first_chip[BAB_V1_BANK] = 0; 1274 babinfo->bank_last_chip[BAB_V1_BANK] = babinfo->chips - 1; 1275 babinfo->boards = (int)((float)(babinfo->chips - 1) / BAB_BOARDCHIPS) + 1; 1276 babinfo->reply_wait = BAB_REPLY_WAIT_mS * 2; 1277 1278 if ((chip = (babinfo->chips_per_bank[BAB_V1_BANK] % BAB_BOARDCHIPS))) { 1279 mis = BAB_BOARDCHIPS - chip; 1280 babinfo->missing_chips_per_bank[BAB_V1_BANK] = mis; 1281 applog(LOG_WARNING, "%s V1: missing %d chip%s", 1282 babcgpu->drv->dname, mis, 1283 (mis == 1) ? "" : "s"); 1284 } 1285 } else { 1286 applog(LOG_WARNING, "%s no chips found with V1", babcgpu->drv->dname); 1287 applog(LOG_WARNING, "%s V2 test %d banks %d chips ...", 1288 babcgpu->drv->dname, BAB_MAXBANKS, BAB_MAXCHIPS); 1289 1290 chips = 0; 1291 babinfo->version = 2; 1292 babinfo->banks = 0; 1293 for (bank = 1; bank <= BAB_MAXBANKS; bank++) { 1294 for (chipoff = 0; chipoff < BAB_BANKCHIPS; chipoff++) { 1295 chip = babinfo->chips + chipoff; 1296 babinfo->chip_spis[chip] = 625000; 1297 } 1298 bab_reset(bank, 64); 1299 bab_detect_chips(babcgpu, babinfo, bank, babinfo->chips, babinfo->chips + BAB_BANKCHIPS); 1300 new_chips = babinfo->chips - chips; 1301 babinfo->chips_per_bank[bank] = new_chips; 1302 if (new_chips > 0) { 1303 babinfo->bank_first_chip[bank] = babinfo->chips - new_chips; 1304 babinfo->bank_last_chip[bank] = babinfo->chips - 1; 1305 } 1306 chips = babinfo->chips; 1307 if (new_chips == 0) 1308 boards = 0; 1309 else { 1310 boards = (int)((float)(new_chips - 1) / BAB_BOARDCHIPS) + 1; 1311 babinfo->banks++; 1312 } 1313 applog(LOG_WARNING, "%s V2 bank %d: %d chips %d board%s", 1314 babcgpu->drv->dname, bank, new_chips, 1315 boards, (boards == 1) ? "" : "s"); 1316 babinfo->boards += boards; 1317 1318 if ((chip = (babinfo->chips_per_bank[bank] % BAB_BOARDCHIPS))) { 1319 mis = BAB_BOARDCHIPS - chip; 1320 babinfo->missing_chips_per_bank[bank] = mis; 1321 applog(LOG_WARNING, "%s V2: bank %d missing %d chip%s", 1322 babcgpu->drv->dname, bank, 1323 mis, (mis == 1) ? "" : "s"); 1324 } 1325 } 1326 babinfo->reply_wait = BAB_REPLY_WAIT_mS * babinfo->banks; 1327 bab_reset(0, 8); 1328 } 1329 1330 memcpy(babinfo->old_conf, babinfo->chip_conf, sizeof(babinfo->old_conf)); 1331 memcpy(babinfo->old_fast, babinfo->chip_fast, sizeof(babinfo->old_fast)); 1332 } 1333 1334 static char *bab_options[] = { 1335 "MaxSpeed", 1336 "DefaultSpeed", 1337 "MinSpeed", 1338 "TuneUp", 1339 "TuneDown", 1340 "SPISpeed", 1341 "SPIDelayuS", 1342 "TransferDelayuS" 1343 }; 1344 1345 #define INVOP " Invalid Option " 1346 1347 static void bab_get_options(struct cgpu_info *babcgpu, struct bab_info *babinfo) 1348 { 1349 char *ptr, *colon; 1350 int which, val; 1351 double fval; 1352 long lval; 1353 1354 if (opt_bab_options == NULL) 1355 return; 1356 1357 which = 0; 1358 ptr = opt_bab_options; 1359 while (ptr && *ptr) { 1360 colon = strchr(ptr, ':'); 1361 if (colon) 1362 *(colon++) = '\0'; 1363 1364 switch (which) { 1365 case 0: 1366 if (*ptr && tolower(*ptr) != 'd') { 1367 val = atoi(ptr); 1368 if (!isdigit(*ptr) || val < BAB_ABSMINSPEED || val > BAB_MAXSPEED) { 1369 quit(1, "%s"INVOP"%s '%s' must be %d <= %s <= %d", 1370 babcgpu->drv->dname, 1371 bab_options[which], 1372 ptr, BAB_ABSMINSPEED, 1373 bab_options[which], 1374 BAB_MAXSPEED); 1375 } 1376 babinfo->max_speed = (uint8_t)val; 1377 // Adjust def,min down if they are above max specified 1378 if (babinfo->def_speed > babinfo->max_speed) 1379 babinfo->def_speed = babinfo->max_speed; 1380 if (babinfo->min_speed > babinfo->max_speed) 1381 babinfo->min_speed = babinfo->max_speed; 1382 } 1383 break; 1384 case 1: 1385 if (*ptr && tolower(*ptr) != 'd') { 1386 val = atoi(ptr); 1387 if (!isdigit(*ptr) || val < BAB_ABSMINSPEED || val > babinfo->max_speed) { 1388 quit(1, "%s"INVOP"%s '%s' must be %d <= %s <= %d", 1389 babcgpu->drv->dname, 1390 bab_options[which], 1391 ptr, BAB_ABSMINSPEED, 1392 bab_options[which], 1393 babinfo->max_speed); 1394 } 1395 babinfo->def_speed = (uint8_t)val; 1396 // Adjust min down if is is above def specified 1397 if (babinfo->min_speed > babinfo->def_speed) 1398 babinfo->min_speed = babinfo->def_speed; 1399 } 1400 break; 1401 case 2: 1402 if (*ptr && tolower(*ptr) != 'd') { 1403 val = atoi(ptr); 1404 if (!isdigit(*ptr) || val < BAB_ABSMINSPEED || val > babinfo->def_speed) { 1405 quit(1, "%s"INVOP"%s '%s' must be %d <= %s <= %d", 1406 babcgpu->drv->dname, 1407 bab_options[which], 1408 ptr, BAB_ABSMINSPEED, 1409 bab_options[which], 1410 babinfo->def_speed); 1411 } 1412 babinfo->min_speed = (uint8_t)val; 1413 } 1414 break; 1415 case 3: 1416 if (*ptr && tolower(*ptr) != 'd') { 1417 fval = atof(ptr); 1418 if (!isdigit(*ptr) || fval < 0.0 || fval > 100.0) { 1419 quit(1, "%s"INVOP"%s '%s' must be 0.0 <= %s <= 100.0", 1420 babcgpu->drv->dname, 1421 bab_options[which], ptr, 1422 bab_options[which]); 1423 } 1424 babinfo->tune_up = fval; 1425 } 1426 break; 1427 case 4: 1428 if (*ptr && tolower(*ptr) != 'd') { 1429 fval = atof(ptr); 1430 if (!isdigit(*ptr) || fval < 0.0 || fval > 100.0) { 1431 quit(1, "%s"INVOP"%s '%s' must be %f <= %s <= 100.0", 1432 babcgpu->drv->dname, 1433 bab_options[which], 1434 ptr, babinfo->tune_up, 1435 bab_options[which]); 1436 } 1437 babinfo->tune_down = fval; 1438 } 1439 break; 1440 case 5: 1441 if (*ptr && tolower(*ptr) != 'd') { 1442 val = atoi(ptr); 1443 if (!isdigit(*ptr) || val < 10000 || val > 10000000) { 1444 quit(1, "%s"INVOP"%s '%s' must be 10,000 <= %s <= 10,000,000", 1445 babcgpu->drv->dname, 1446 bab_options[which], ptr, 1447 bab_options[which]); 1448 } 1449 babinfo->speed_hz = (uint32_t)val; 1450 } 1451 break; 1452 case 6: 1453 if (*ptr && tolower(*ptr) != 'd') { 1454 val = atoi(ptr); 1455 if (!isdigit(*ptr) || val < 0 || val > 65535) { 1456 quit(1, "%s"INVOP"%s '%s' must be 0 <= %s <= 65535", 1457 babcgpu->drv->dname, 1458 bab_options[which], ptr, 1459 bab_options[which]); 1460 } 1461 babinfo->delay_usecs = (uint16_t)val; 1462 } 1463 break; 1464 case 7: 1465 if (*ptr && tolower(*ptr) != 'd') { 1466 lval = atol(ptr); 1467 if (!isdigit(*ptr) || lval < 0) { 1468 quit(1, "%s"INVOP"%s '%s' must be %s >= 0", 1469 babcgpu->drv->dname, 1470 bab_options[which], ptr, 1471 bab_options[which]); 1472 } 1473 babinfo->trf_delay = (uint64_t)lval; 1474 } 1475 break; 1476 default: 1477 break; 1478 } 1479 ptr = colon; 1480 which++; 1481 } 1482 } 1483 1484 static void bab_detect(bool hotplug) 1485 { 1486 struct cgpu_info *babcgpu = NULL; 1487 struct bab_info *babinfo = NULL; 1488 int i; 1489 1490 if (hotplug) 1491 return; 1492 1493 babcgpu = calloc(1, sizeof(*babcgpu)); 1494 if (unlikely(!babcgpu)) 1495 quithere(1, "Failed to calloc babcgpu"); 1496 1497 babcgpu->drv = &bab_drv; 1498 babcgpu->deven = DEV_ENABLED; 1499 babcgpu->threads = 1; 1500 1501 babinfo = calloc(1, sizeof(*babinfo)); 1502 if (unlikely(!babinfo)) 1503 quithere(1, "Failed to calloc babinfo"); 1504 babcgpu->device_data = (void *)babinfo; 1505 1506 babinfo->max_speed = BAB_DEFMAXSPEED; 1507 babinfo->def_speed = BAB_DEFSPEED; 1508 babinfo->min_speed = BAB_ABSMINSPEED; 1509 1510 babinfo->tune_up = BAB_TUNEUP; 1511 babinfo->tune_down = BAB_TUNEDOWN; 1512 1513 babinfo->speed_hz = BAB_SPI_SPEED; 1514 babinfo->delay_usecs = BAB_DELAY_USECS; 1515 babinfo->trf_delay = BAB_TRF_DELAY; 1516 1517 bab_get_options(babcgpu, babinfo); 1518 1519 for (i = 0; i < BAB_MAXCHIPS; i++) { 1520 babinfo->chip_conf[i] = BAB_DEFCONF; 1521 babinfo->chip_fast[i] = babinfo->def_speed; 1522 #if UPDATE_HISTORY 1523 babinfo->bad_fast[i] = babinfo->max_speed + 1; 1524 #endif 1525 } 1526 1527 if (!bab_init_gpio(babcgpu, babinfo, BAB_SPI_BUS, BAB_SPI_CHIP)) 1528 goto unalloc; 1529 1530 babinfo->sfree_list = k_new_list("SPI I/O", sizeof(SITEM), 1531 ALLOC_SITEMS, LIMIT_SITEMS, true); 1532 babinfo->spi_list = k_new_store(babinfo->sfree_list); 1533 babinfo->spi_sent = k_new_store(babinfo->sfree_list); 1534 1535 for (i = 0; i <= BAB_MAXBANKS; i++) { 1536 babinfo->bank_first_chip[i] = -1; 1537 babinfo->bank_last_chip[i] = -1; 1538 } 1539 1540 bab_init_chips(babcgpu, babinfo); 1541 1542 if (babinfo->boards) { 1543 applog(LOG_WARNING, "%s found %d chips %d board%s", 1544 babcgpu->drv->dname, babinfo->chips, 1545 babinfo->boards, 1546 (babinfo->boards == 1) ? "" : "s"); 1547 } else { 1548 applog(LOG_WARNING, "%s found %d chips", 1549 babcgpu->drv->dname, babinfo->chips); 1550 } 1551 1552 if (babinfo->chips == 0) 1553 goto cleanup; 1554 1555 if (!add_cgpu(babcgpu)) 1556 goto cleanup; 1557 1558 cgsem_init(&(babinfo->scan_work)); 1559 cgsem_init(&(babinfo->spi_work)); 1560 cgsem_init(&(babinfo->spi_reply)); 1561 cgsem_init(&(babinfo->process_reply)); 1562 1563 mutex_init(&babinfo->did_lock); 1564 mutex_init(&babinfo->nonce_lock); 1565 1566 babinfo->rfree_list = k_new_list("Results", sizeof(RITEM), 1567 ALLOC_RITEMS, LIMIT_RITEMS, true); 1568 babinfo->res_list = k_new_store(babinfo->rfree_list); 1569 1570 babinfo->wfree_list = k_new_list("Work", sizeof(WITEM), 1571 ALLOC_WITEMS, LIMIT_WITEMS, true); 1572 babinfo->available_work = k_new_store(babinfo->wfree_list); 1573 for (i = 0; i < BAB_MAXCHIPS; i++) 1574 babinfo->chip_work[i] = k_new_store(babinfo->wfree_list); 1575 1576 babinfo->nfree_list = k_new_list("Nonce History", sizeof(WITEM), 1577 ALLOC_NITEMS, LIMIT_NITEMS, true); 1578 for (i = 0; i < BAB_MAXCHIPS; i++) { 1579 babinfo->good_nonces[i] = k_new_store(babinfo->nfree_list); 1580 babinfo->bad_nonces[i] = k_new_store(babinfo->nfree_list); 1581 } 1582 1583 // Exclude detection 1584 cgtime(&(babcgpu->dev_start_tv)); 1585 // Ignore detection tests 1586 babinfo->last_did.tv_sec = 0; 1587 1588 babinfo->initialised = true; 1589 1590 return; 1591 1592 cleanup: 1593 close(babinfo->spifd); 1594 munmap((void *)(babinfo->gpio), BAB_SPI_BUFSIZ); 1595 unalloc: 1596 free(babinfo); 1597 free(babcgpu); 1598 } 1599 1600 static void bab_identify(__maybe_unused struct cgpu_info *babcgpu) 1601 { 1602 } 1603 1604 // thread to do spi txrx 1605 static void *bab_spi(void *userdata) 1606 { 1607 struct cgpu_info *babcgpu = (struct cgpu_info *)userdata; 1608 struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data); 1609 struct timeval start, stop, send, now; 1610 K_ITEM *sitem, *witem; 1611 double wait, delay; 1612 int chip, band; 1613 1614 applog(LOG_DEBUG, "%s%i: SPIing...", 1615 babcgpu->drv->name, babcgpu->device_id); 1616 1617 // Wait until we're ready 1618 while (babcgpu->shutdown == false) { 1619 if (babinfo->initialised) { 1620 break; 1621 } 1622 cgsleep_ms(3); 1623 } 1624 1625 cgtime(&start); 1626 while (babcgpu->shutdown == false) { 1627 K_WLOCK(babinfo->spi_list); 1628 sitem = k_unlink_tail(babinfo->spi_list); 1629 K_WUNLOCK(babinfo->spi_list); 1630 1631 if (!sitem) { 1632 cgtime(&stop); 1633 wait = us_tdiff(&stop, &start); 1634 if (wait > BAB_LONG_uS) { 1635 applog(LOG_WARNING, "%s%i: SPI waiting %fs ...", 1636 babcgpu->drv->name, 1637 babcgpu->device_id, 1638 (float)wait / 1000000.0); 1639 cgsem_mswait(&(babinfo->spi_work), BAB_LONG_WAIT_mS); 1640 } else 1641 cgsem_mswait(&(babinfo->spi_work), (int)((BAB_LONG_uS - wait) / 1000)); 1642 continue; 1643 } 1644 1645 // TODO: need an LP/urgent flag to skip this possible cgsem_mswait() 1646 // maybe zero last_sent_work.tv_sec ? 1647 while (babinfo->last_sent_work.tv_sec) { 1648 cgtime(&now); 1649 delay = tdiff(&now, &(babinfo->last_sent_work)) * 1000.0; 1650 if (delay < BAB_EXPECTED_WORK_DELAY_mS) 1651 cgsem_mswait(&(babinfo->spi_work), BAB_EXPECTED_WORK_DELAY_mS - delay); 1652 else 1653 break; 1654 } 1655 1656 /* 1657 * TODO: handle if an LP happened after bab_do_work() started 1658 * i.e. we don't want to send the work 1659 * Have an LP counter that at this point would show the work 1660 * is stale - so don't send it 1661 */ 1662 cgtime(&send); 1663 bab_txrx(sitem, false); 1664 cgtime(&start); 1665 1666 // The work isn't added to the chip until it has been sent 1667 K_WLOCK(babinfo->wfree_list); 1668 for (chip = 0; chip < babinfo->chips; chip++) { 1669 witem = DATAS(sitem)->witems[chip]; 1670 if (witem) { 1671 memcpy(&(DATAW(witem)->work_start), &(DATAS(sitem)->work_start), 1672 sizeof(DATAW(witem)->work_start)); 1673 k_add_head(babinfo->chip_work[chip], witem); 1674 #if UPDATE_HISTORY 1675 babinfo->work_count[chip]++; 1676 #endif 1677 if (babinfo->first_work[chip].tv_sec == 0) 1678 memcpy(&(babinfo->first_work[chip]), &send, sizeof(send)); 1679 } 1680 } 1681 K_WUNLOCK(babinfo->wfree_list); 1682 1683 K_WLOCK(babinfo->spi_sent); 1684 k_add_head(babinfo->spi_sent, sitem); 1685 K_WUNLOCK(babinfo->spi_sent); 1686 1687 cgsem_post(&(babinfo->spi_reply)); 1688 1689 // Store stats 1690 if (babinfo->last_sent_work.tv_sec) { 1691 delay = tdiff(&send, &(babinfo->last_sent_work)); 1692 babinfo->delay_count++; 1693 if (babinfo->delay_min == 0 || babinfo->delay_min > delay) 1694 babinfo->delay_min = delay; 1695 if (babinfo->delay_max < delay) 1696 babinfo->delay_max = delay; 1697 if (delay < BAB_DELAY_BASE) 1698 band = 0; 1699 else if (delay >= (BAB_DELAY_BASE+BAB_DELAY_STEP*(BAB_DELAY_BANDS+1))) 1700 band = BAB_DELAY_BANDS+1; 1701 else 1702 band = (int)(((double)delay - BAB_DELAY_BASE) / BAB_DELAY_STEP) + 1; 1703 babinfo->delay_bands[band]++; 1704 } 1705 memcpy(&(babinfo->last_sent_work), &send, sizeof(start)); 1706 1707 delay = tdiff(&start, &send); 1708 babinfo->send_count++; 1709 babinfo->send_total += delay; 1710 if (babinfo->send_min == 0 || babinfo->send_min > delay) 1711 babinfo->send_min = delay; 1712 if (babinfo->send_max < delay) 1713 babinfo->send_max = delay; 1714 1715 cgsem_mswait(&(babinfo->spi_work), BAB_STD_WAIT_mS); 1716 } 1717 1718 return NULL; 1719 } 1720 1721 static void bab_flush_work(struct cgpu_info *babcgpu) 1722 { 1723 struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data); 1724 1725 applog(LOG_DEBUG, "%s%i: flushing work", 1726 babcgpu->drv->name, babcgpu->device_id); 1727 1728 mutex_lock(&(babinfo->did_lock)); 1729 babinfo->last_did.tv_sec = 0; 1730 mutex_unlock(&(babinfo->did_lock)); 1731 1732 cgsem_post(&(babinfo->scan_work)); 1733 } 1734 1735 #define DATA_MERKLE7 16 1736 #define DATA_NTIME 17 1737 #define DATA_BITS 18 1738 #define DATA_NONCE 19 1739 1740 #define WORK_MERKLE7 (16*4) 1741 #define WORK_NTIME (17*4) 1742 #define WORK_BITS (18*4) 1743 #define WORK_NONCE (19*4) 1744 1745 #if UPDATE_HISTORY 1746 static void process_history(struct cgpu_info *babcgpu, int chip, struct timeval *when, bool good, struct timeval *now) 1747 { 1748 struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data); 1749 uint64_t good_nonces, bad_nonces; 1750 uint8_t chip_fast; 1751 double tune; 1752 K_ITEM *item; 1753 int i; 1754 1755 K_WLOCK(babinfo->nfree_list); 1756 item = k_unlink_head(babinfo->nfree_list); 1757 memcpy(&(DATAN(item)->found), when, sizeof(*when)); 1758 if (good) 1759 k_add_head(babinfo->good_nonces[chip], item); 1760 else 1761 k_add_head(babinfo->bad_nonces[chip], item); 1762 1763 // Remove all expired history 1764 for (i = 0; i < babinfo->chips; i++) { 1765 item = babinfo->good_nonces[i]->tail; 1766 while (item) { 1767 if (tdiff(now, &(DATAN(item)->found)) < HISTORY_TIME_S) 1768 break; 1769 1770 k_unlink_item(babinfo->good_nonces[i], item); 1771 k_add_head(babinfo->nfree_list, item); 1772 1773 item = babinfo->good_nonces[i]->tail; 1774 } 1775 1776 item = babinfo->bad_nonces[i]->tail; 1777 while (item) { 1778 if (tdiff(now, &(DATAN(item)->found)) < HISTORY_TIME_S) 1779 break; 1780 1781 k_unlink_item(babinfo->bad_nonces[i], item); 1782 k_add_head(babinfo->nfree_list, item); 1783 1784 item = babinfo->bad_nonces[i]->tail; 1785 } 1786 } 1787 good_nonces = babinfo->good_nonces[chip]->count; 1788 bad_nonces = babinfo->bad_nonces[chip]->count; 1789 1790 K_WUNLOCK(babinfo->nfree_list); 1791 1792 // Tuning ... 1793 if (tdiff(now, &(babinfo->first_work[chip])) >= HISTORY_TIME_S && 1794 tdiff(now, &(babinfo->last_tune[chip])) >= HISTORY_TIME_S && 1795 (good_nonces + bad_nonces) > 0) { 1796 1797 chip_fast = babinfo->chip_fast[chip]; 1798 1799 /* 1800 * If bad then step it down and remember the speed 1801 * TODO: does a speed change reset the chip? Or is there a reset? 1802 */ 1803 if (good_nonces == 0) { 1804 if (chip_fast > babinfo->min_speed) { 1805 if (babinfo->bad_fast[chip] > chip_fast) 1806 babinfo->bad_fast[chip] = chip_fast; 1807 1808 babinfo->chip_fast[chip]--; 1809 1810 applog(LOG_WARNING, "%s%d: Chip %d BAD - speed down from %d to %d", 1811 babcgpu->drv->name, babcgpu->device_id, 1812 chip, (int)chip_fast, (int)chip_fast - 1); 1813 } else { 1814 /* 1815 * Permanently BAD since we're already at the minumum speed 1816 * but only getting bad nonces 1817 */ 1818 if (babinfo->bad_msg[chip] == false) { 1819 applog(LOG_WARNING, "%s%d: Chip %d BAD - at min speed %d", 1820 babcgpu->drv->name, babcgpu->device_id, 1821 chip, (int)chip_fast); 1822 1823 babinfo->bad_msg[chip] = true; 1824 } 1825 } 1826 goto tune_over; 1827 } 1828 1829 /* 1830 * It 'was' permanently BAD but a good nonce came back! 1831 */ 1832 if (babinfo->bad_msg[chip]) { 1833 applog(LOG_WARNING, "%s%d: Chip %d REVIVED - at speed %d", 1834 babcgpu->drv->name, babcgpu->device_id, 1835 chip, (int)chip_fast); 1836 1837 babinfo->bad_msg[chip] = false; 1838 } 1839 1840 /* 1841 * Since we have found 'some' nonces - 1842 * make sure bad_fast is higher than current chip_fast 1843 */ 1844 if (babinfo->bad_fast[chip] <= chip_fast) 1845 babinfo->bad_fast[chip] = chip_fast + 1; 1846 1847 tune = (double)bad_nonces / (double)(good_nonces + bad_nonces) * 100.0; 1848 1849 /* 1850 * TODO: it appears some chips just get a % bad at low speeds 1851 * so we should handle them by weighting the speed reduction vs 1852 * the HW% gained from the reduction (i.e. GH/s) 1853 * Maybe handle that when they hit min_speed, then do a gradual speed 1854 * up verifying if it is really making GH/s worse or better 1855 */ 1856 1857 // Tune it down if error rate is too high (and it's above min) 1858 if (tune >= babinfo->tune_down && chip_fast > babinfo->min_speed) { 1859 babinfo->chip_fast[chip]--; 1860 1861 applog(LOG_WARNING, "%s%d: Chip %d High errors %.2f%% - speed down %d to %d", 1862 babcgpu->drv->name, babcgpu->device_id, 1863 chip, tune, (int)chip_fast, (int)chip_fast - 1); 1864 1865 goto tune_over; 1866 } 1867 1868 /* 1869 * TODO: if we are at bad_fast-1 and tune_up 1870 * and bad_fast was set more than some time limit ago 1871 * then consider increasing bad_fast by 1? 1872 */ 1873 1874 // Tune it up if error rate is low enough 1875 if (tune <= babinfo->tune_up && 1876 chip_fast < babinfo->max_speed && 1877 chip_fast < (babinfo->bad_fast[chip] - 1)) { 1878 babinfo->chip_fast[chip]++; 1879 1880 applog(LOG_WARNING, "%s%d: Chip %d Low errors %.2f%% - speed up %d to %d", 1881 babcgpu->drv->name, babcgpu->device_id, 1882 chip, tune, (int)chip_fast, (int)chip_fast + 1); 1883 1884 goto tune_over; 1885 } 1886 tune_over: 1887 cgtime(&(babinfo->last_tune[chip])); 1888 } 1889 } 1890 #endif 1891 1892 /* 1893 * Find the matching work item by checking each nonce against 1894 * work items for the nonces chip 1895 */ 1896 static K_ITEM *process_nonce(struct thr_info *thr, struct cgpu_info *babcgpu, K_ITEM *ritem, uint32_t raw_nonce, K_ITEM *newest_witem) 1897 { 1898 struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data); 1899 unsigned int links, proc_links, work_links, tests; 1900 int try_sta, try_fin, offset; 1901 K_ITEM *witem, *wtail; 1902 struct timeval now; 1903 bool not_first_reply; 1904 uint32_t nonce; 1905 int chip; 1906 1907 chip = DATAR(ritem)->chip; 1908 not_first_reply = DATAR(ritem)->not_first_reply; 1909 1910 babinfo->chip_nonces[chip]++; 1911 1912 /* 1913 * We can grab the head of the chip work queue and then release 1914 * the lock and follow it to the end and back, since the other 1915 * thread will only add items above the head - it wont touch 1916 * any of the prev/next pointers from the head to the end - 1917 * except the head->prev pointer may get changed 1918 */ 1919 K_RLOCK(babinfo->chip_work[chip]); 1920 witem = babinfo->chip_work[chip]->head; 1921 K_RUNLOCK(babinfo->chip_work[chip]); 1922 1923 if (!witem) { 1924 applog(LOG_ERR, "%s%i: chip %d has no work, 1 nonce discarded!", 1925 babcgpu->drv->name, babcgpu->device_id, chip); 1926 babinfo->untested_nonces++; 1927 return newest_witem; 1928 } 1929 1930 babinfo->tested_nonces++; 1931 1932 if ((raw_nonce & 0xff) < 0x1c) { 1933 // Will only be this offset 1934 try_sta = BAB_OFF_0x1C_STA; 1935 try_fin = BAB_OFF_0x1C_FIN; 1936 } else { 1937 // Will only be one of the other offsets 1938 try_sta = BAB_OFF_OTHER_STA; 1939 try_fin = BAB_OFF_OTHER_FIN; 1940 } 1941 1942 nonce = bab_decnonce(raw_nonce); 1943 1944 cgtime(&now); 1945 1946 tests = links = proc_links = work_links = 0; 1947 wtail = witem; 1948 while (wtail && wtail->next) { 1949 work_links++; 1950 wtail = wtail->next; 1951 } 1952 while (wtail) { 1953 if (!(DATAW(wtail)->work)) { 1954 applog(LOG_ERR, "%s%i: chip %d witem links %d has no work!", 1955 babcgpu->drv->name, 1956 babcgpu->device_id, 1957 chip, links); 1958 } else { 1959 if (ms_tdiff(&now, &(DATAW(wtail)->work_start)) >= BAB_WORK_EXPIRE_mS) 1960 proc_links--; 1961 else { 1962 for (offset = try_sta; offset <= try_fin; offset++) { 1963 tests++; 1964 if (test_nonce(DATAW(wtail)->work, nonce + bab_nonce_offsets[offset])) { 1965 submit_tested_work(thr, DATAW(wtail)->work); 1966 babinfo->nonce_offset_count[offset]++; 1967 babinfo->chip_good[chip]++; 1968 DATAW(wtail)->nonces++; 1969 1970 mutex_lock(&(babinfo->nonce_lock)); 1971 babinfo->new_nonces++; 1972 mutex_unlock(&(babinfo->nonce_lock)); 1973 1974 babinfo->ok_nonces++; 1975 babinfo->total_tests += tests; 1976 if (babinfo->max_tests_per_nonce < tests) 1977 babinfo->max_tests_per_nonce = tests; 1978 babinfo->total_links += links; 1979 babinfo->total_proc_links += proc_links; 1980 if (babinfo->max_links < links) 1981 babinfo->max_links = links; 1982 if (babinfo->max_proc_links < proc_links) 1983 babinfo->max_proc_links = proc_links; 1984 babinfo->total_work_links += work_links; 1985 1986 babinfo->chip_cont_bad[chip] = 0; 1987 #if UPDATE_HISTORY 1988 process_history(babcgpu, chip, 1989 &(DATAR(ritem)->when), 1990 true, &now); 1991 #endif 1992 1993 if (newest_witem == NULL || 1994 ms_tdiff(&(DATAW(wtail)->work_start), 1995 &(DATAW(newest_witem)->work_start)) < 0) 1996 return wtail; 1997 1998 return newest_witem; 1999 } 2000 } 2001 } 2002 } 2003 if (wtail == witem) 2004 break; 2005 wtail = wtail->prev; 2006 links++; 2007 proc_links++; 2008 } 2009 2010 if (not_first_reply) { 2011 babinfo->chip_bad[chip]++; 2012 inc_hw_errors(thr); 2013 2014 babinfo->fail++; 2015 babinfo->fail_total_tests += tests; 2016 babinfo->fail_total_links += links; 2017 babinfo->fail_total_work_links += work_links; 2018 2019 babinfo->chip_cont_bad[chip]++; 2020 if (babinfo->chip_max_bad[chip] < babinfo->chip_cont_bad[chip]) 2021 babinfo->chip_max_bad[chip] = babinfo->chip_cont_bad[chip]; 2022 2023 // Handle chips with only bad results 2024 if (babinfo->disabled[chip] == false && 2025 babinfo->chip_good[chip] == 0 && 2026 babinfo->chip_bad[chip] >= BAB_BAD_COUNT && 2027 tdiff(&now, &(babinfo->first_work[chip])) >= BAB_BAD_TO_MIN) { 2028 if (babinfo->chip_fast[chip] > babinfo->min_speed) 2029 babinfo->chip_fast[chip] = babinfo->min_speed; 2030 else if (tdiff(&now, &(babinfo->first_work[chip])) > BAB_BAD_DEAD) { 2031 babinfo->disabled[chip] = true; 2032 babinfo->total_disabled++; 2033 applog(LOG_ERR, "%s%i: chip %d disabled!", 2034 babcgpu->drv->name, 2035 babcgpu->device_id, 2036 chip); 2037 } 2038 } 2039 #if UPDATE_HISTORY 2040 process_history(babcgpu, chip, &(DATAR(ritem)->when), false, &now); 2041 #endif 2042 } else { 2043 babinfo->initial_ignored++; 2044 babinfo->ign_total_tests += tests; 2045 babinfo->ign_total_links += links; 2046 babinfo->ign_total_work_links += work_links; 2047 } 2048 2049 return newest_witem; 2050 } 2051 2052 /* 2053 * On completion discard any work items older than BAB_WORK_EXPIRE_mS 2054 * and any work items of the chip older than the work of the newest nonce work item 2055 */ 2056 static void oknonces(struct thr_info *thr, struct cgpu_info *babcgpu, K_ITEM *ritem) 2057 { 2058 uint32_t raw_nonce; 2059 K_ITEM *witem; 2060 int nonces; 2061 2062 witem = NULL; 2063 2064 for (nonces = 0; nonces < DATAR(ritem)->nonces; nonces++) { 2065 raw_nonce = DATAR(ritem)->nonce[nonces]; 2066 2067 witem = process_nonce(thr, babcgpu, ritem, raw_nonce, witem); 2068 } 2069 2070 cleanup_older(babcgpu, DATAR(ritem)->chip, witem); 2071 } 2072 2073 // Check at least every ... 2074 #define BAB_RESULT_DELAY_mS 999 2075 2076 // Results checking thread 2077 static void *bab_res(void *userdata) 2078 { 2079 struct cgpu_info *babcgpu = (struct cgpu_info *)userdata; 2080 struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data); 2081 struct thr_info *thr = babcgpu->thr[0]; 2082 K_ITEM *ritem; 2083 2084 applog(LOG_DEBUG, "%s%i: Results...", 2085 babcgpu->drv->name, babcgpu->device_id); 2086 2087 // Wait until we're ready 2088 while (babcgpu->shutdown == false) { 2089 if (babinfo->initialised) { 2090 break; 2091 } 2092 cgsleep_ms(3); 2093 } 2094 2095 ritem = NULL; 2096 while (babcgpu->shutdown == false) { 2097 K_WLOCK(babinfo->res_list); 2098 if (ritem) { 2099 // Release the old one 2100 k_add_head(babinfo->rfree_list, ritem); 2101 ritem = NULL; 2102 } 2103 // Check for a new one 2104 ritem = k_unlink_tail(babinfo->res_list); 2105 K_WUNLOCK(babinfo->res_list); 2106 2107 if (!ritem) { 2108 cgsem_mswait(&(babinfo->process_reply), BAB_RESULT_DELAY_mS); 2109 continue; 2110 } 2111 2112 oknonces(thr, babcgpu, ritem); 2113 } 2114 2115 return NULL; 2116 } 2117 2118 /* 2119 * 1.0s per nonce = 4.2GH/s 2120 * 0.9s per nonce = 4.8GH/s 2121 * On a slow machine, reducing this may resolve: 2122 * BaB0: SPI waiting 1.2...s 2123 */ 2124 #define BAB_STD_WORK_DELAY_uS 900000 2125 2126 static bool bab_do_work(struct cgpu_info *babcgpu) 2127 { 2128 struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data); 2129 int work_items = 0; 2130 K_ITEM *witem, *sitem, *ritem; 2131 struct timeval when, now; 2132 double delay; 2133 int chip, rep, j, nonces, spie = 0, miso = 0; 2134 uint32_t nonce, spichk; 2135 bool res; 2136 2137 cgtime(&now); 2138 mutex_lock(&(babinfo->did_lock)); 2139 delay = us_tdiff(&now, &(babinfo->last_did)); 2140 mutex_unlock(&(babinfo->did_lock)); 2141 if (delay < BAB_STD_WORK_DELAY_uS) 2142 return false; 2143 2144 K_WLOCK(babinfo->sfree_list); 2145 sitem = k_unlink_head_zero(babinfo->sfree_list); 2146 K_WUNLOCK(babinfo->sfree_list); 2147 2148 for (chip = 0; chip < babinfo->chips; chip++) { 2149 if (!(babinfo->disabled[chip])) { 2150 // TODO: ignore stale work 2151 K_WLOCK(babinfo->available_work); 2152 witem = k_unlink_tail(babinfo->available_work); 2153 K_WUNLOCK(babinfo->available_work); 2154 if (!witem) { 2155 applog(LOG_ERR, "%s%i: short work list (%d) %d expected %d - reset", 2156 babcgpu->drv->name, babcgpu->device_id, 2157 chip, work_items, 2158 babinfo->chips - babinfo->total_disabled); 2159 2160 // Put them back in the order they were taken 2161 K_WLOCK(babinfo->available_work); 2162 for (j = chip-1; j >= 0; j--) { 2163 witem = DATAS(sitem)->witems[j]; 2164 if (witem) 2165 k_add_tail(babinfo->available_work, witem); 2166 } 2167 K_WUNLOCK(babinfo->available_work); 2168 2169 K_WLOCK(babinfo->sfree_list); 2170 k_add_head(babinfo->sfree_list, sitem); 2171 K_WUNLOCK(babinfo->sfree_list); 2172 2173 return false; 2174 } 2175 2176 /* 2177 * TODO: do this when we get work except on LP? 2178 * (not LP so we only do ms3steps for work required) 2179 * Though that may more likely trigger the applog(short work list) above? 2180 */ 2181 if (DATAW(witem)->ci_setup == false) { 2182 memcpy((void *)&(DATAW(witem)->chip_input.midstate[0]), 2183 DATAW(witem)->work->midstate, 2184 sizeof(DATAW(witem)->work->midstate)); 2185 memcpy((void *)&(DATAW(witem)->chip_input.merkle7), 2186 (void *)&(DATAW(witem)->work->data[WORK_MERKLE7]), 2187 MERKLE_BYTES); 2188 2189 bab_ms3steps((void *)&(DATAW(witem)->chip_input)); 2190 2191 DATAW(witem)->ci_setup = true; 2192 } 2193 2194 DATAS(sitem)->witems[chip] = witem; 2195 work_items++; 2196 } 2197 } 2198 2199 // Send 2200 bab_put(babinfo, sitem); 2201 2202 // Receive 2203 res = bab_get(babcgpu, babinfo, &when); 2204 if (!res) { 2205 applog(LOG_DEBUG, "%s%i: didn't get work reply ...", 2206 babcgpu->drv->name, babcgpu->device_id); 2207 return false; 2208 } 2209 2210 applog(LOG_DEBUG, "%s%i: Did get work reply ...", 2211 babcgpu->drv->name, babcgpu->device_id); 2212 2213 for (chip = 0; chip < babinfo->chips; chip++) { 2214 if (!(babinfo->disabled[chip])) { 2215 K_WLOCK(babinfo->rfree_list); 2216 ritem = k_unlink_head(babinfo->rfree_list); 2217 K_WUNLOCK(babinfo->rfree_list); 2218 2219 DATAR(ritem)->chip = chip; 2220 DATAR(ritem)->not_first_reply = babinfo->not_first_reply[chip]; 2221 memcpy(&(DATAR(ritem)->when), &when, sizeof(when)); 2222 2223 spichk = babinfo->chip_results[chip].spichk; 2224 if (spichk != 0 && spichk != 0xffffffff) { 2225 babinfo->chip_spie[chip]++; 2226 spie++; 2227 // Test the results anyway 2228 } 2229 2230 nonces = 0; 2231 for (rep = 0; rep < BAB_REPLY_NONCES; rep++) { 2232 nonce = babinfo->chip_results[chip].nonce[rep]; 2233 if (nonce != babinfo->chip_prev[chip].nonce[rep]) { 2234 if ((nonce & BAB_EVIL_MASK) == BAB_EVIL_NONCE) 2235 babinfo->discarded_e0s++; 2236 else 2237 DATAR(ritem)->nonce[nonces++] = nonce; 2238 } 2239 } 2240 2241 if (nonces == BAB_REPLY_NONCES) { 2242 babinfo->chip_miso[chip]++; 2243 miso++; 2244 // Test the results anyway 2245 } 2246 2247 /* 2248 * Send even with zero nonces 2249 * so cleanup_older() is called for the chip 2250 */ 2251 DATAR(ritem)->nonces = nonces; 2252 K_WLOCK(babinfo->res_list); 2253 k_add_head(babinfo->res_list, ritem); 2254 K_WUNLOCK(babinfo->res_list); 2255 2256 cgsem_post(&(babinfo->process_reply)); 2257 2258 babinfo->not_first_reply[chip] = true; 2259 2260 memcpy((void *)(&(babinfo->chip_prev[chip])), 2261 (void *)(&(babinfo->chip_results[chip])), 2262 sizeof(struct bab_work_reply)); 2263 } 2264 2265 } 2266 2267 applog(LOG_DEBUG, "Work: items:%d spie:%d miso:%d", work_items, spie, miso); 2268 2269 return true; 2270 } 2271 2272 static bool bab_thread_prepare(struct thr_info *thr) 2273 { 2274 struct cgpu_info *babcgpu = thr->cgpu; 2275 struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data); 2276 2277 if (thr_info_create(&(babinfo->spi_thr), NULL, bab_spi, (void *)babcgpu)) { 2278 applog(LOG_ERR, "%s%i: SPI thread create failed", 2279 babcgpu->drv->name, babcgpu->device_id); 2280 return false; 2281 } 2282 pthread_detach(babinfo->spi_thr.pth); 2283 2284 /* 2285 * We require a seperate results checking thread since there is a lot 2286 * of work done checking the results multiple times - thus we don't 2287 * want that delay affecting sending/receiving work to/from the device 2288 */ 2289 if (thr_info_create(&(babinfo->res_thr), NULL, bab_res, (void *)babcgpu)) { 2290 applog(LOG_ERR, "%s%i: Results thread create failed", 2291 babcgpu->drv->name, babcgpu->device_id); 2292 return false; 2293 } 2294 pthread_detach(babinfo->res_thr.pth); 2295 2296 return true; 2297 } 2298 2299 static void bab_shutdown(struct thr_info *thr) 2300 { 2301 struct cgpu_info *babcgpu = thr->cgpu; 2302 struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data); 2303 int i; 2304 2305 applog(LOG_DEBUG, "%s%i: shutting down", 2306 babcgpu->drv->name, babcgpu->device_id); 2307 2308 for (i = 0; i < babinfo->chips; i++) 2309 // TODO: bab_shutdown(babcgpu, babinfo, i); 2310 ; 2311 2312 babcgpu->shutdown = true; 2313 } 2314 2315 static bool bab_queue_full(struct cgpu_info *babcgpu) 2316 { 2317 struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data); 2318 int roll, roll_limit = BAB_MAX_ROLLTIME; 2319 struct work *work, *usework; 2320 K_ITEM *item; 2321 int count, need; 2322 bool ret, rolled; 2323 2324 K_RLOCK(babinfo->available_work); 2325 count = babinfo->available_work->count; 2326 K_RUNLOCK(babinfo->available_work); 2327 2328 if (count >= (babinfo->chips - babinfo->total_disabled)) 2329 ret = true; 2330 else { 2331 need = (babinfo->chips - babinfo->total_disabled) - count; 2332 work = get_queued(babcgpu); 2333 if (work) { 2334 if (roll_limit > work->drv_rolllimit) 2335 roll_limit = work->drv_rolllimit; 2336 roll = 0; 2337 do { 2338 if (roll == 0) { 2339 usework = work; 2340 babinfo->work_unrolled++; 2341 rolled = false; 2342 } else { 2343 usework = copy_work_noffset(work, roll); 2344 babinfo->work_rolled++; 2345 rolled = true; 2346 } 2347 2348 K_WLOCK(babinfo->wfree_list); 2349 item = k_unlink_head_zero(babinfo->wfree_list); 2350 DATAW(item)->work = usework; 2351 DATAW(item)->rolled = rolled; 2352 k_add_head(babinfo->available_work, item); 2353 K_WUNLOCK(babinfo->wfree_list); 2354 } while (--need > 0 && ++roll <= roll_limit); 2355 } else { 2356 // Avoid a hard loop when we can't get work fast enough 2357 cgsleep_us(42); 2358 } 2359 2360 if (need > 0) 2361 ret = false; 2362 else 2363 ret = true; 2364 } 2365 2366 return ret; 2367 } 2368 2369 #define BAB_STD_DELAY_mS 100 2370 2371 /* 2372 * TODO: allow this to run through more than once - the second+ 2373 * time not sending any new work unless a flush occurs since: 2374 * at the moment we have BAB_STD_WORK_mS latency added to earliest replies 2375 */ 2376 static int64_t bab_scanwork(__maybe_unused struct thr_info *thr) 2377 { 2378 struct cgpu_info *babcgpu = thr->cgpu; 2379 struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data); 2380 int64_t hashcount = 0; 2381 int count; 2382 2383 bab_do_work(babcgpu); 2384 2385 K_RLOCK(babinfo->available_work); 2386 count = babinfo->available_work->count; 2387 K_RUNLOCK(babinfo->available_work); 2388 2389 if (count >= babinfo->chips) 2390 cgsem_mswait(&(babinfo->scan_work), BAB_STD_DELAY_mS); 2391 2392 mutex_lock(&(babinfo->nonce_lock)); 2393 if (babinfo->new_nonces) { 2394 hashcount += 0xffffffffull * babinfo->new_nonces; 2395 babinfo->new_nonces = 0; 2396 } 2397 mutex_unlock(&(babinfo->nonce_lock)); 2398 2399 return hashcount; 2400 } 2401 2402 #define CHIPS_PER_STAT 16 2403 #define FMT_RANGE "%d-%d" 2404 2405 static struct api_data *bab_api_stats(struct cgpu_info *babcgpu) 2406 { 2407 struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data); 2408 uint64_t history_good[BAB_MAXCHIPS], history_bad[BAB_MAXCHIPS]; 2409 uint64_t his_good_tot, his_bad_tot; 2410 double history_elapsed[BAB_MAXCHIPS], diff; 2411 bool elapsed_is_good[BAB_MAXCHIPS]; 2412 int speeds[BAB_CHIP_SPEEDS]; 2413 struct api_data *root = NULL; 2414 char data[2048]; 2415 char buf[32]; 2416 int spi_work, chip_work, sp, chip, bank, chip_off, board, last_board; 2417 int i, to, j, k; 2418 bool bad; 2419 struct timeval now; 2420 double elapsed, ghs; 2421 float ghs_sum, his_ghs_tot; 2422 float tot, hw; 2423 K_ITEM *item; 2424 2425 if (babinfo->initialised == false) 2426 return NULL; 2427 2428 memset(&speeds, 0, sizeof(speeds)); 2429 2430 root = api_add_int(root, "Version", &(babinfo->version), true); 2431 root = api_add_int(root, "Chips", &(babinfo->chips), true); 2432 root = api_add_int(root, "Boards", &(babinfo->boards), true); 2433 root = api_add_int(root, "Banks", &(babinfo->banks), true); 2434 2435 data[0] = '\0'; 2436 for (i = 0; i <= BAB_MAXBANKS; i++) { 2437 snprintf(buf, sizeof(buf), "%s%d", 2438 (i == 0) ? "" : " ", 2439 babinfo->chips_per_bank[i]); 2440 strcat(data, buf); 2441 } 2442 root = api_add_string(root, "Chips Per Bank", data, true); 2443 2444 data[0] = '\0'; 2445 for (i = 0; i <= BAB_MAXBANKS; i++) { 2446 snprintf(buf, sizeof(buf), "%s%d", 2447 (i == 0) ? "" : " ", 2448 babinfo->missing_chips_per_bank[i]); 2449 strcat(data, buf); 2450 } 2451 root = api_add_string(root, "Missing Chips Per Bank", data, true); 2452 2453 cgtime(&now); 2454 elapsed = tdiff(&now, &(babcgpu->dev_start_tv)); 2455 2456 root = api_add_elapsed(root, "Device Elapsed", &elapsed, true); 2457 2458 root = api_add_string(root, "History Enabled", 2459 #if UPDATE_HISTORY 2460 "true", 2461 #else 2462 "false", 2463 #endif 2464 true); 2465 2466 int chs = HISTORY_TIME_S; 2467 root = api_add_int(root, "Chip History Limit", &chs, true); 2468 2469 K_RLOCK(babinfo->nfree_list); 2470 for (i = 0; i < babinfo->chips; i++) { 2471 item = babinfo->good_nonces[i]->tail; 2472 elapsed_is_good[i] = true; 2473 if (!item) 2474 history_elapsed[i] = 0; 2475 else 2476 history_elapsed[i] = tdiff(&now, &(DATAN(item)->found)); 2477 2478 item = babinfo->bad_nonces[i]->tail; 2479 if (item) { 2480 diff = tdiff(&now, &(DATAN(item)->found)); 2481 if (history_elapsed[i] < diff) { 2482 history_elapsed[i] = diff; 2483 elapsed_is_good[i] = false; 2484 } 2485 } 2486 history_good[i] = babinfo->good_nonces[i]->count; 2487 history_bad[i] = babinfo->bad_nonces[i]->count; 2488 } 2489 K_RUNLOCK(babinfo->nfree_list); 2490 2491 his_ghs_tot = 0; 2492 for (i = 0; i < babinfo->chips; i += CHIPS_PER_STAT) { 2493 to = i + CHIPS_PER_STAT - 1; 2494 if (to >= babinfo->chips) 2495 to = babinfo->chips - 1; 2496 2497 data[0] = '\0'; 2498 for (j = i; j <= to; j++) { 2499 snprintf(buf, sizeof(buf), 2500 "%s%"PRIu64, 2501 j == i ? "" : " ", 2502 babinfo->chip_nonces[j]); 2503 strcat(data, buf); 2504 } 2505 snprintf(buf, sizeof(buf), "Nonces "FMT_RANGE, i, to); 2506 root = api_add_string(root, buf, data, true); 2507 2508 data[0] = '\0'; 2509 for (j = i; j <= to; j++) { 2510 snprintf(buf, sizeof(buf), 2511 "%s%"PRIu64, 2512 j == i ? "" : " ", 2513 babinfo->chip_good[j]); 2514 strcat(data, buf); 2515 } 2516 snprintf(buf, sizeof(buf), "Good "FMT_RANGE, i, to); 2517 root = api_add_string(root, buf, data, true); 2518 2519 data[0] = '\0'; 2520 for (j = i; j <= to; j++) { 2521 snprintf(buf, sizeof(buf), 2522 "%s%"PRIu64, 2523 j == i ? "" : " ", 2524 babinfo->chip_bad[j]); 2525 strcat(data, buf); 2526 } 2527 snprintf(buf, sizeof(buf), "Bad "FMT_RANGE, i, to); 2528 root = api_add_string(root, buf, data, true); 2529 2530 data[0] = '\0'; 2531 for (j = i; j <= to; j++) { 2532 snprintf(buf, sizeof(buf), 2533 "%s0x%02x", 2534 j == i ? "" : " ", 2535 (int)(babinfo->chip_conf[j])); 2536 strcat(data, buf); 2537 } 2538 snprintf(buf, sizeof(buf), "Conf "FMT_RANGE, i, to); 2539 root = api_add_string(root, buf, data, true); 2540 2541 data[0] = '\0'; 2542 for (j = i; j <= to; j++) { 2543 snprintf(buf, sizeof(buf), 2544 "%s%d", 2545 j == i ? "" : " ", 2546 (int)(babinfo->chip_fast[j])); 2547 strcat(data, buf); 2548 } 2549 snprintf(buf, sizeof(buf), "Fast "FMT_RANGE, i, to); 2550 root = api_add_string(root, buf, data, true); 2551 2552 data[0] = '\0'; 2553 for (j = i; j <= to; j++) { 2554 snprintf(buf, sizeof(buf), 2555 "%s%d", 2556 j == i ? "" : " ", 2557 (int)(babinfo->chip_spie[j])); 2558 strcat(data, buf); 2559 } 2560 snprintf(buf, sizeof(buf), "Spie "FMT_RANGE, i, to); 2561 root = api_add_string(root, buf, data, true); 2562 2563 data[0] = '\0'; 2564 for (j = i; j <= to; j++) { 2565 snprintf(buf, sizeof(buf), 2566 "%s%d", 2567 j == i ? "" : " ", 2568 (int)(babinfo->chip_miso[j])); 2569 strcat(data, buf); 2570 } 2571 snprintf(buf, sizeof(buf), "Miso "FMT_RANGE, i, to); 2572 root = api_add_string(root, buf, data, true); 2573 2574 data[0] = '\0'; 2575 for (j = i; j <= to; j++) { 2576 tot = (float)(babinfo->chip_good[j] + babinfo->chip_bad[j]); 2577 if (tot != 0) 2578 hw = 100.0 * (float)(babinfo->chip_bad[j]) / tot; 2579 else 2580 hw = 0; 2581 snprintf(buf, sizeof(buf), 2582 "%s%.3f", 2583 j == i ? "" : " ", hw); 2584 strcat(data, buf); 2585 } 2586 snprintf(buf, sizeof(buf), "HW%% "FMT_RANGE, i, to); 2587 root = api_add_string(root, buf, data, true); 2588 2589 ghs_sum = 0; 2590 data[0] = '\0'; 2591 for (j = i; j <= to; j++) { 2592 if (elapsed > 0) { 2593 ghs = (double)(babinfo->chip_good[j]) * 0xffffffffull / 2594 elapsed / 1000000000.0; 2595 } else 2596 ghs = 0; 2597 2598 snprintf(buf, sizeof(buf), 2599 "%s%.3f", 2600 j == i ? "" : " ", ghs); 2601 strcat(data, buf); 2602 ghs_sum += (float)ghs; 2603 } 2604 snprintf(buf, sizeof(buf), "GHs "FMT_RANGE, i, to); 2605 root = api_add_string(root, buf, data, true); 2606 2607 snprintf(buf, sizeof(buf), "Sum GHs "FMT_RANGE, i, to); 2608 root = api_add_avg(root, buf, &ghs_sum, true); 2609 2610 data[0] = '\0'; 2611 for (j = i; j <= to; j++) { 2612 snprintf(buf, sizeof(buf), 2613 "%s%"PRIu64, 2614 j == i ? "" : " ", 2615 babinfo->chip_cont_bad[j]); 2616 strcat(data, buf); 2617 } 2618 snprintf(buf, sizeof(buf), "Cont-Bad "FMT_RANGE, i, to); 2619 root = api_add_string(root, buf, data, true); 2620 2621 data[0] = '\0'; 2622 for (j = i; j <= to; j++) { 2623 snprintf(buf, sizeof(buf), 2624 "%s%"PRIu64, 2625 j == i ? "" : " ", 2626 babinfo->chip_max_bad[j]); 2627 strcat(data, buf); 2628 } 2629 snprintf(buf, sizeof(buf), "Max-Bad "FMT_RANGE, i, to); 2630 root = api_add_string(root, buf, data, true); 2631 2632 data[0] = '\0'; 2633 for (j = i; j <= to; j++) { 2634 snprintf(buf, sizeof(buf), 2635 "%s%"PRIu64, 2636 j == i ? "" : " ", 2637 history_good[j]); 2638 strcat(data, buf); 2639 } 2640 snprintf(buf, sizeof(buf), "History Good "FMT_RANGE, i, to); 2641 root = api_add_string(root, buf, data, true); 2642 2643 data[0] = '\0'; 2644 for (j = i; j <= to; j++) { 2645 snprintf(buf, sizeof(buf), 2646 "%s%"PRIu64, 2647 j == i ? "" : " ", 2648 history_bad[j]); 2649 strcat(data, buf); 2650 } 2651 snprintf(buf, sizeof(buf), "History Bad "FMT_RANGE, i, to); 2652 root = api_add_string(root, buf, data, true); 2653 2654 data[0] = '\0'; 2655 for (j = i; j <= to; j++) { 2656 tot = (float)(history_good[j] + history_bad[j]); 2657 if (tot != 0) 2658 hw = 100.0 * (float)(history_bad[j]) / tot; 2659 else 2660 hw = 0; 2661 snprintf(buf, sizeof(buf), 2662 "%s%.3f", 2663 j == i ? "" : " ", hw); 2664 strcat(data, buf); 2665 } 2666 snprintf(buf, sizeof(buf), "History HW%% "FMT_RANGE, i, to); 2667 root = api_add_string(root, buf, data, true); 2668 2669 ghs_sum = 0; 2670 data[0] = '\0'; 2671 for (j = i; j <= to; j++) { 2672 if (history_elapsed[j] > 0) { 2673 double num = history_good[j]; 2674 // exclude the first nonce? 2675 if (elapsed_is_good[j]) 2676 num--; 2677 ghs = num * 0xffffffffull / 2678 history_elapsed[j] / 1000000000.0; 2679 } else 2680 ghs = 0; 2681 2682 snprintf(buf, sizeof(buf), 2683 "%s%.3f", 2684 j == i ? "" : " ", ghs); 2685 strcat(data, buf); 2686 2687 ghs_sum += (float)ghs; 2688 2689 // Setup speed range data 2690 for (sp = 0; sp < BAB_CHIP_SPEEDS - 1; sp++) { 2691 if (ghs <= chip_speed_ranges[sp]) { 2692 speeds[sp]++; 2693 break; 2694 } 2695 } 2696 if (sp >= (BAB_CHIP_SPEEDS - 1)) 2697 speeds[BAB_CHIP_SPEEDS - 1]++; 2698 } 2699 snprintf(buf, sizeof(buf), "History GHs "FMT_RANGE, i, to); 2700 root = api_add_string(root, buf, data, true); 2701 2702 snprintf(buf, sizeof(buf), "Sum History GHs "FMT_RANGE, i, to); 2703 root = api_add_avg(root, buf, &ghs_sum, true); 2704 2705 his_ghs_tot += ghs_sum; 2706 } 2707 2708 root = api_add_avg(root, "Total History GHs", &his_ghs_tot, true); 2709 2710 his_good_tot = his_bad_tot = 0; 2711 for (i = 0; i < babinfo->chips; i++) { 2712 his_good_tot += history_good[i]; 2713 his_bad_tot += history_bad[i]; 2714 } 2715 if (his_good_tot + his_bad_tot) 2716 tot = 100.0 * (float)his_bad_tot / (float)(his_good_tot + his_bad_tot); 2717 else 2718 tot = 0.0; 2719 root = api_add_avg(root, "Total History HW%", &tot, true); 2720 2721 for (sp = 0; sp < BAB_CHIP_SPEEDS; sp++) { 2722 if (sp < (BAB_CHIP_SPEEDS - 1)) 2723 ghs = chip_speed_ranges[sp]; 2724 else 2725 ghs = chip_speed_ranges[BAB_CHIP_SPEEDS - 2]; 2726 2727 snprintf(buf, sizeof(buf), "History Speed %s%.1f %s", 2728 (sp < (BAB_CHIP_SPEEDS - 1)) ? "" : ">", 2729 ghs, chip_speed_names[sp]); 2730 2731 root = api_add_int(root, buf, &(speeds[sp]), true); 2732 } 2733 2734 int len, str, siz = 1024; 2735 char *tmp = malloc(siz); 2736 if (!tmp) 2737 quithere(1, "OOM tmp1"); 2738 for (sp = 0; sp < 2; sp++) { 2739 tmp[0] = '\0'; 2740 len = 0; 2741 for (i = 0; i < babinfo->chips; i++) { 2742 if (history_elapsed[i] > 0) { 2743 double num = history_good[i]; 2744 // exclude the first nonce? 2745 if (elapsed_is_good[i]) 2746 num--; 2747 ghs = num * 0xffffffffull / 2748 history_elapsed[i] / 1000000000.0; 2749 } else 2750 ghs = 0; 2751 2752 if ((sp == 0 || ghs > chip_speed_ranges[sp-1]) && 2753 (ghs <= chip_speed_ranges[sp])) { 2754 bank = babinfo->chip_bank[i]; 2755 chip_off = i; 2756 for (j = 0; j < babinfo->chip_bank[i]; j++) 2757 chip_off -= babinfo->chips_per_bank[j]; 2758 /* 2759 * Bank/Board/Chip are all 1 based 2760 * except V1 Bank = BAB_V1_BANK (0) 2761 * If the bank has any missing chips then a "?" 2762 * is placed after the board number 2763 */ 2764 snprintf(buf, sizeof(buf), "%s%d/%d%s/%d", 2765 len ? " " : "", bank, 2766 (int)(chip_off / BAB_BOARDCHIPS)+1, 2767 babinfo->missing_chips_per_bank[bank] ? 2768 "?" : "", 2769 (chip_off % BAB_BOARDCHIPS)+1); 2770 str = strlen(buf); 2771 while ((len + str + 1) > siz) { 2772 siz += 1024; 2773 tmp = realloc(tmp, siz); 2774 if (!tmp) 2775 quithere(1, "OOM tmp2"); 2776 } 2777 strcpy(tmp + len, buf); 2778 len += str; 2779 } 2780 } 2781 snprintf(buf, sizeof(buf), "History %s", chip_speed_names[sp]); 2782 2783 root = api_add_string(root, buf, len ? tmp : "None", true); 2784 } 2785 free(tmp); 2786 tmp = NULL; 2787 2788 switch (babinfo->version) { 2789 case 1: 2790 i = j = BAB_V1_BANK; 2791 break; 2792 case 2: 2793 i = 1; 2794 j = BAB_MAXBANKS; 2795 break; 2796 } 2797 data[0] = '\0'; 2798 for (bank = i; bank <= j; bank++) { 2799 if (babinfo->bank_first_chip[bank] >= 0) { 2800 chip = babinfo->bank_first_chip[bank]; 2801 to = babinfo->bank_last_chip[bank]; 2802 for (; chip <= to; chip += BAB_BOARDCHIPS) { 2803 bad = true; 2804 for (k = chip; (k <= to) && (k < (chip+BAB_BOARDCHIPS)); k++) { 2805 if (history_elapsed[k] > 0) { 2806 double num = history_good[k]; 2807 // exclude the first nonce? 2808 if (elapsed_is_good[k]) 2809 num--; 2810 ghs = num * 0xffffffffull / 2811 history_elapsed[k] / 1000000000.0; 2812 } else 2813 ghs = 0; 2814 2815 if (ghs > 0.0) { 2816 bad = false; 2817 break; 2818 } 2819 } 2820 if (bad) { 2821 board = (int)((float)(chip - babinfo->bank_first_chip[bank]) / 2822 BAB_BOARDCHIPS) + 1; 2823 snprintf(buf, sizeof(buf), 2824 "%s%d/%d%s", 2825 data[0] ? " " : "", 2826 bank, board, 2827 babinfo->missing_chips_per_bank[bank] ? 2828 "?" : ""); 2829 strcat(data, buf); 2830 } 2831 } 2832 } 2833 } 2834 root = api_add_string(root, "History Bad Boards", data[0] ? data : "None", true); 2835 2836 data[0] = '\0'; 2837 for (bank = i; bank <= j; bank++) { 2838 if (babinfo->bank_first_chip[bank] >= 0) { 2839 to = babinfo->bank_first_chip[bank]; 2840 chip = babinfo->bank_last_chip[bank]; 2841 for (; chip >= to; chip--) { 2842 bad = true; 2843 if (history_elapsed[chip] > 0) { 2844 double num = history_good[chip]; 2845 // exclude the first nonce? 2846 if (elapsed_is_good[chip]) 2847 num--; 2848 ghs = num * 0xffffffffull / 2849 history_elapsed[chip] / 1000000000.0; 2850 } else 2851 ghs = 0; 2852 2853 if (ghs > 0.0) 2854 break; 2855 } 2856 /* 2857 * The output here is: a/b+c/d 2858 * a/b is the SPI/board that starts the Bad Chain 2859 * c is the number of boards after a 2860 * d is the total number of chips in the Bad Chain 2861 * A Bad Chain is a continous set of bad chips that 2862 * finish at the end of an SPI chain of boards 2863 * This might be caused by the first board, or the cables attached 2864 * to the first board, in the Bad Chain i.e. a/b 2865 * If c is zero, it's just the last board, so it's the same as any 2866 * other board having bad chips 2867 */ 2868 if (chip < babinfo->bank_last_chip[bank]) { 2869 board = (int)((float)(chip - babinfo->bank_first_chip[bank]) / 2870 BAB_BOARDCHIPS) + 1; 2871 last_board = (int)((float)(babinfo->bank_last_chip[bank] - 2872 babinfo->bank_first_chip[bank]) / 2873 BAB_BOARDCHIPS) + 1; 2874 snprintf(buf, sizeof(buf), 2875 "%s%d/%d%s+%d/%d", 2876 data[0] ? " " : "", 2877 bank, board, 2878 babinfo->missing_chips_per_bank[bank] ? 2879 "?" : "", 2880 last_board - board, 2881 babinfo->bank_last_chip[bank] - chip); 2882 strcat(data, buf); 2883 } 2884 } 2885 } 2886 root = api_add_string(root, "History Bad Chains", data[0] ? data : "None", true); 2887 2888 root = api_add_int(root, "Disabled Chips", &(babinfo->total_disabled), true); 2889 2890 for (i = 0; i < BAB_NONCE_OFFSETS; i++) { 2891 snprintf(buf, sizeof(buf), "Nonce Offset 0x%08x", bab_nonce_offsets[i]); 2892 root = api_add_uint64(root, buf, &(babinfo->nonce_offset_count[i]), true); 2893 } 2894 2895 root = api_add_uint64(root, "Discarded E0s", &(babinfo->discarded_e0s), true); 2896 root = api_add_uint64(root, "Tested", &(babinfo->tested_nonces), true); 2897 root = api_add_uint64(root, "OK", &(babinfo->ok_nonces), true); 2898 root = api_add_uint64(root, "Total Tests", &(babinfo->total_tests), true); 2899 root = api_add_uint64(root, "Max Tests", &(babinfo->max_tests_per_nonce), true); 2900 float avg = babinfo->ok_nonces ? (float)(babinfo->total_tests) / 2901 (float)(babinfo->ok_nonces) : 0; 2902 root = api_add_avg(root, "Avg Tests", &avg, true); 2903 root = api_add_uint64(root, "Untested", &(babinfo->untested_nonces), true); 2904 2905 root = api_add_uint64(root, "Work Links", &(babinfo->total_links), true); 2906 root = api_add_uint64(root, "Work Processed Links", &(babinfo->total_proc_links), true); 2907 root = api_add_uint64(root, "Max Links", &(babinfo->max_links), true); 2908 root = api_add_uint64(root, "Max Processed Links", &(babinfo->max_proc_links), true); 2909 root = api_add_uint64(root, "Total Work Links", &(babinfo->total_work_links), true); 2910 avg = babinfo->ok_nonces ? (float)(babinfo->total_links) / 2911 (float)(babinfo->ok_nonces) : 0; 2912 root = api_add_avg(root, "Avg Links", &avg, true); 2913 avg = babinfo->ok_nonces ? (float)(babinfo->total_proc_links) / 2914 (float)(babinfo->ok_nonces) : 0; 2915 root = api_add_avg(root, "Avg Proc Links", &avg, true); 2916 avg = babinfo->ok_nonces ? (float)(babinfo->total_work_links) / 2917 (float)(babinfo->ok_nonces) : 0; 2918 root = api_add_avg(root, "Avg Work Links", &avg, true); 2919 2920 root = api_add_uint64(root, "Fail", &(babinfo->fail), true); 2921 root = api_add_uint64(root, "Fail Total Tests", &(babinfo->fail_total_tests), true); 2922 avg = babinfo->fail ? (float)(babinfo->fail_total_tests) / 2923 (float)(babinfo->fail) : 0; 2924 root = api_add_avg(root, "Fail Avg Tests", &avg, true); 2925 root = api_add_uint64(root, "Fail Work Links", &(babinfo->fail_total_links), true); 2926 root = api_add_uint64(root, "Fail Total Work Links", &(babinfo->fail_total_work_links), true); 2927 2928 root = api_add_uint32(root, "Initial Ignored", &(babinfo->initial_ignored), true); 2929 root = api_add_uint64(root, "Ign Total Tests", &(babinfo->ign_total_tests), true); 2930 root = api_add_uint64(root, "Ign Work Links", &(babinfo->ign_total_links), true); 2931 root = api_add_uint64(root, "Ign Total Work Links", &(babinfo->ign_total_work_links), true); 2932 2933 chip_work = 0; 2934 for (i = 0; i < babinfo->chips; i++) 2935 chip_work += babinfo->chip_work[i]->count; 2936 spi_work = babinfo->spi_list->count * babinfo->chips; 2937 2938 root = api_add_int(root, "WFree Total", &(babinfo->wfree_list->total), true); 2939 root = api_add_int(root, "WFree Count", &(babinfo->wfree_list->count), true); 2940 root = api_add_int(root, "Available Work", &(babinfo->available_work->count), true); 2941 root = api_add_int(root, "SPI Work", &spi_work, true); 2942 root = api_add_int(root, "Chip Work", &chip_work, true); 2943 2944 root = api_add_int(root, "SFree Total", &(babinfo->sfree_list->total), true); 2945 root = api_add_int(root, "SFree Count", &(babinfo->sfree_list->count), true); 2946 root = api_add_int(root, "SPI Waiting", &(babinfo->spi_list->count), true); 2947 root = api_add_int(root, "SPI Sent", &(babinfo->spi_sent->count), true); 2948 2949 root = api_add_int(root, "RFree Total", &(babinfo->rfree_list->total), true); 2950 root = api_add_int(root, "RFree Count", &(babinfo->rfree_list->count), true); 2951 root = api_add_int(root, "Result Count", &(babinfo->res_list->count), true); 2952 2953 int used = babinfo->nfree_list->total - babinfo->nfree_list->count; 2954 root = api_add_int(root, "NFree Total", &(babinfo->nfree_list->total), true); 2955 root = api_add_int(root, "NFree Used", &used, true); 2956 2957 root = api_add_uint64(root, "Delay Count", &(babinfo->delay_count), true); 2958 root = api_add_double(root, "Delay Min", &(babinfo->delay_min), true); 2959 root = api_add_double(root, "Delay Max", &(babinfo->delay_max), true); 2960 2961 data[0] = '\0'; 2962 for (i = 0; i <= BAB_DELAY_BANDS; i++) { 2963 snprintf(buf, sizeof(buf), 2964 "%s<%.1f=%"PRIu64, 2965 i == 0 ? "" : " ", 2966 BAB_DELAY_BASE+(BAB_DELAY_STEP*i), 2967 babinfo->delay_bands[i]); 2968 strcat(data, buf); 2969 } 2970 snprintf(buf, sizeof(buf), 2971 " >=%.1f=%"PRIu64, 2972 BAB_DELAY_BASE+BAB_DELAY_STEP*(BAB_DELAY_BANDS+1), 2973 babinfo->delay_bands[BAB_DELAY_BANDS+1]); 2974 strcat(data, buf); 2975 root = api_add_string(root, "Delay Bands", data, true); 2976 2977 root = api_add_uint64(root, "Send Count", &(babinfo->send_count), true); 2978 root = api_add_double(root, "Send Total", &(babinfo->send_total), true); 2979 avg = babinfo->send_count ? (float)(babinfo->send_total) / 2980 (float)(babinfo->send_count) : 0; 2981 root = api_add_avg(root, "Send Avg", &avg, true); 2982 root = api_add_double(root, "Send Min", &(babinfo->send_min), true); 2983 root = api_add_double(root, "Send Max", &(babinfo->send_max), true); 2984 2985 root = api_add_int(root, "Reply Wait", &(babinfo->reply_wait), true); 2986 root = api_add_uint64(root, "Reply Waits", &(babinfo->reply_waits), true); 2987 2988 root = api_add_uint64(root, "Work Unrolled", &(babinfo->work_unrolled), true); 2989 root = api_add_uint64(root, "Work Rolled", &(babinfo->work_rolled), true); 2990 2991 i = (int)(babinfo->max_speed); 2992 root = api_add_int(root, bab_options[0], &i, true); 2993 i = (int)(babinfo->def_speed); 2994 root = api_add_int(root, bab_options[1], &i, true); 2995 i = (int)(babinfo->min_speed); 2996 root = api_add_int(root, bab_options[2], &i, true); 2997 root = api_add_double(root, bab_options[3], &(babinfo->tune_up), true); 2998 root = api_add_double(root, bab_options[4], &(babinfo->tune_down), true); 2999 i = (int)(babinfo->speed_hz); 3000 root = api_add_int(root, bab_options[5], &i, true); 3001 i = (int)(babinfo->delay_usecs); 3002 root = api_add_int(root, bab_options[6], &i, true); 3003 root = api_add_uint64(root, bab_options[7], &(babinfo->trf_delay), true); 3004 3005 return root; 3006 } 3007 3008 static void bab_get_statline_before(char *buf, size_t bufsiz, struct cgpu_info *babcgpu) 3009 { 3010 struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data); 3011 #if UPDATE_HISTORY 3012 struct timeval now; 3013 double elapsed; 3014 int i, bad = 0; 3015 3016 cgtime(&now); 3017 elapsed = tdiff(&now, &(babcgpu->dev_start_tv)); 3018 3019 // At least get 15s of nonces before saying anything is bad 3020 if (elapsed > 15.0) { 3021 K_RLOCK(babinfo->nfree_list); 3022 for (i = 0; i < babinfo->chips; i++) { 3023 if (babinfo->good_nonces[i]->count == 0 && 3024 babinfo->bad_nonces[i]->count > 1) 3025 bad++; 3026 } 3027 K_RUNLOCK(babinfo->nfree_list); 3028 } 3029 3030 tailsprintf(buf, bufsiz, "%d.%02d.%03d B:%03d D:%03d", 3031 babinfo->banks, 3032 babinfo->boards, 3033 babinfo->chips, 3034 bad, 3035 babinfo->total_disabled); 3036 #else 3037 tailsprintf(buf, bufsiz, "%d.%02d.%03d D:%03d", 3038 babinfo->banks, 3039 babinfo->boards, 3040 babinfo->chips, 3041 babinfo->total_disabled); 3042 #endif 3043 } 3044 #endif 3045 3046 struct device_drv bab_drv = { 3047 .drv_id = DRIVER_bab, 3048 .dname = "BlackArrowBitFuryGPIO", 3049 .name = "BaB", 3050 .drv_detect = bab_detect, 3051 #ifdef LINUX 3052 .get_api_stats = bab_api_stats, 3053 .get_statline_before = bab_get_statline_before, 3054 .identify_device = bab_identify, 3055 .thread_prepare = bab_thread_prepare, 3056 .hash_work = hash_queued_work, 3057 .scanwork = bab_scanwork, 3058 .queue_full = bab_queue_full, 3059 .flush_work = bab_flush_work, 3060 .thread_shutdown = bab_shutdown 3061 #endif 3062 };