assembler.hpp
1 #pragma once 2 3 #include <biscuit/code_buffer.hpp> 4 #include <biscuit/csr.hpp> 5 #include <biscuit/isa.hpp> 6 #include <biscuit/label.hpp> 7 #include <biscuit/registers.hpp> 8 #include <biscuit/vector.hpp> 9 #include <cstddef> 10 #include <cstdint> 11 12 namespace biscuit { 13 14 /** 15 * Defines the set of features that a particular assembler instance 16 * would like to assemble for. 17 * 18 * This allows for assertions and extra logic checking to be done. 19 * 20 * It can also affect various behaviors as well. e.g. LI, shifts, etc 21 * will take these into account to adjust for emission on different 22 * environments transparently. 23 */ 24 enum class ArchFeature : uint32_t { 25 RV32, //< 32-bit RISC-V 26 RV64, //< 64-bit RISC-V 27 RV128, //< 128-bit RISC-V 28 }; 29 30 /** 31 * Code generator for RISC-V code. 32 * 33 * User code may inherit from this in order to make use of 34 * the API more convenient, or use it separately if desired. 35 */ 36 class Assembler { 37 public: 38 /** 39 * Constructor 40 * 41 * Initializes the underlying code buffer to be able to hold `capacity` bytes. 42 * 43 * @param capacity The capacity for the underlying code buffer in bytes. 44 * If no capacity is specified, then the underlying buffer 45 * will be 4KB in size. 46 * 47 * @note Will assume to be assembling for RV64 unless changed. 48 */ 49 [[nodiscard]] explicit Assembler(size_t capacity = CodeBuffer::default_capacity); 50 51 /** 52 * Constructor 53 * 54 * @param buffer A non-null pointer to an allocated buffer of size `capacity`. 55 * @param capacity The capacity of the memory pointed to by `buffer`. 56 * @param features Architectural features to make the assembler aware of. 57 * 58 * @pre The given memory buffer must not be null. 59 * @pre The given memory buffer must be at minimum `capacity` bytes in size. 60 * 61 * @note The caller is responsible for managing the lifetime of the given memory. 62 * CodeBuffer will *not* free the memory once it goes out of scope. 63 */ 64 [[nodiscard]] explicit Assembler(uint8_t* buffer, size_t capacity, 65 ArchFeature features = ArchFeature::RV64); 66 67 // Copy constructor and assignment. 68 Assembler(const Assembler&) = delete; 69 Assembler& operator=(const Assembler&) = delete; 70 71 // Move constructor and assignment. 72 Assembler(Assembler&&) = default; 73 Assembler& operator=(Assembler&&) = default; 74 75 // Destructor 76 virtual ~Assembler(); 77 78 /** 79 * Tells the assembler what features to take into account. 80 * 81 * Will alter how some code is emitted and also enforce asserts suitable 82 * for those particular features. 83 */ 84 void SetArchFeatures(ArchFeature features) noexcept { 85 m_features = features; 86 } 87 88 /// Gets the underlying code buffer being managed by this assembler. 89 CodeBuffer& GetCodeBuffer(); 90 91 /** 92 * Allows swapping out the code buffer used by the assembler. 93 * 94 * @param buffer The new buffer for the assembler to emit code into. 95 * 96 * @returns The old buffer that the assembler made use of. 97 */ 98 CodeBuffer SwapCodeBuffer(CodeBuffer&& buffer) noexcept; 99 100 /** 101 * Allows rewinding of the code buffer cursor. 102 * 103 * @param offset The offset to rewind the cursor by. 104 * 105 * @note If no offset is provided, then this function rewinds the 106 * cursor to the beginning of the buffer. 107 * 108 * @note The offset may not be larger than the current cursor offset 109 * and may not be less than the current buffer starting address. 110 */ 111 void RewindBuffer(ptrdiff_t offset = 0) { 112 m_buffer.RewindCursor(offset); 113 } 114 115 /// Retrieves the cursor pointer for the underlying code buffer. 116 [[nodiscard]] uint8_t* GetCursorPointer() noexcept { 117 return m_buffer.GetCursorPointer(); 118 } 119 120 /// Retrieves the cursor for the underlying code buffer. 121 [[nodiscard]] const uint8_t* GetCursorPointer() const noexcept { 122 return m_buffer.GetCursorPointer(); 123 } 124 125 /// Retrieves the pointer to an arbitrary location within the underlying code buffer. 126 [[nodiscard]] uint8_t* GetBufferPointer(ptrdiff_t offset) noexcept { 127 return m_buffer.GetOffsetPointer(offset); 128 } 129 130 /// Retrieves the pointer to an arbitrary location within the underlying code buffer. 131 [[nodiscard]] const uint8_t* GetBufferPointer(ptrdiff_t offset) const noexcept { 132 return m_buffer.GetOffsetPointer(offset); 133 } 134 135 /** 136 * Binds a label to the current offset within the code buffer 137 * 138 * @param label A non-null valid label to bind. 139 */ 140 void Bind(Label* label); 141 142 // RV32I Instructions 143 144 void ADD(GPR rd, GPR lhs, GPR rhs) noexcept; 145 void ADDI(GPR rd, GPR rs, int32_t imm) noexcept; 146 void AND(GPR rd, GPR lhs, GPR rhs) noexcept; 147 void ANDI(GPR rd, GPR rs, uint32_t imm) noexcept; 148 149 void AUIPC(GPR rd, int32_t imm) noexcept; 150 151 void BEQ(GPR rs1, GPR rs2, Label* label) noexcept; 152 void BEQZ(GPR rs, Label* label) noexcept; 153 void BGE(GPR rs1, GPR rs2, Label* label) noexcept; 154 void BGEU(GPR rs1, GPR rs2, Label* label) noexcept; 155 void BGEZ(GPR rs, Label* label) noexcept; 156 void BGT(GPR rs, GPR rt, Label* label) noexcept; 157 void BGTU(GPR rs, GPR rt, Label* label) noexcept; 158 void BGTZ(GPR rs, Label* label) noexcept; 159 void BLE(GPR rs, GPR rt, Label* label) noexcept; 160 void BLEU(GPR rs, GPR rt, Label* label) noexcept; 161 void BLEZ(GPR rs, Label* label) noexcept; 162 void BLT(GPR rs1, GPR rs2, Label* label) noexcept; 163 void BLTU(GPR rs1, GPR rs2, Label* label) noexcept; 164 void BLTZ(GPR rs, Label* label) noexcept; 165 void BNE(GPR rs1, GPR rs2, Label* label) noexcept; 166 void BNEZ(GPR rs, Label* label) noexcept; 167 168 void BEQ(GPR rs1, GPR rs2, int32_t imm) noexcept; 169 void BEQZ(GPR rs, int32_t imm) noexcept; 170 void BGE(GPR rs1, GPR rs2, int32_t imm) noexcept; 171 void BGEU(GPR rs1, GPR rs2, int32_t imm) noexcept; 172 void BGEZ(GPR rs, int32_t imm) noexcept; 173 void BGT(GPR rs, GPR rt, int32_t imm) noexcept; 174 void BGTU(GPR rs, GPR rt, int32_t imm) noexcept; 175 void BGTZ(GPR rs, int32_t imm) noexcept; 176 void BLE(GPR rs, GPR rt, int32_t imm) noexcept; 177 void BLEU(GPR rs, GPR rt, int32_t imm) noexcept; 178 void BLEZ(GPR rs, int32_t imm) noexcept; 179 void BLT(GPR rs1, GPR rs2, int32_t imm) noexcept; 180 void BLTU(GPR rs1, GPR rs2, int32_t imm) noexcept; 181 void BLTZ(GPR rs, int32_t imm) noexcept; 182 void BNE(GPR rs1, GPR rs2, int32_t imm) noexcept; 183 void BNEZ(GPR rs, int32_t imm) noexcept; 184 185 void CALL(int32_t offset) noexcept; 186 187 void EBREAK() noexcept; 188 void ECALL() noexcept; 189 190 void FENCE() noexcept; 191 void FENCE(FenceOrder pred, FenceOrder succ) noexcept; 192 void FENCEI(GPR rd = x0, GPR rs = x0, uint32_t imm = 0) noexcept; 193 void FENCETSO() noexcept; 194 195 void J(Label* label) noexcept; 196 void JAL(Label* label) noexcept; 197 void JAL(GPR rd, Label* label) noexcept; 198 199 void J(int32_t imm) noexcept; 200 void JAL(int32_t imm) noexcept; 201 void JAL(GPR rd, int32_t imm) noexcept; 202 void JALR(GPR rs) noexcept; 203 void JALR(GPR rd, int32_t imm, GPR rs1) noexcept; 204 void JR(GPR rs) noexcept; 205 206 void LB(GPR rd, int32_t imm, GPR rs) noexcept; 207 void LBU(GPR rd, int32_t imm, GPR rs) noexcept; 208 void LH(GPR rd, int32_t imm, GPR rs) noexcept; 209 void LHU(GPR rd, int32_t imm, GPR rs) noexcept; 210 void LI(GPR rd, uint64_t imm) noexcept; 211 void LUI(GPR rd, uint32_t imm) noexcept; 212 void LW(GPR rd, int32_t imm, GPR rs) noexcept; 213 214 void MV(GPR rd, GPR rs) noexcept; 215 void NEG(GPR rd, GPR rs) noexcept; 216 217 void NOP() noexcept; 218 219 void NOT(GPR rd, GPR rs) noexcept; 220 void OR(GPR rd, GPR lhs, GPR rhs) noexcept; 221 void ORI(GPR rd, GPR rs, uint32_t imm) noexcept; 222 223 void PAUSE() noexcept; 224 void RET() noexcept; 225 226 void SB(GPR rs2, int32_t imm, GPR rs1) noexcept; 227 void SH(GPR rs2, int32_t imm, GPR rs1) noexcept; 228 void SW(GPR rs2, int32_t imm, GPR rs1) noexcept; 229 230 void SEQZ(GPR rd, GPR rs) noexcept; 231 void SGTZ(GPR rd, GPR rs) noexcept; 232 233 void SLL(GPR rd, GPR lhs, GPR rhs) noexcept; 234 void SLLI(GPR rd, GPR rs, uint32_t shift) noexcept; 235 236 void SLT(GPR rd, GPR lhs, GPR rhs) noexcept; 237 void SLTI(GPR rd, GPR rs, int32_t imm) noexcept; 238 void SLTIU(GPR rd, GPR rs, int32_t imm) noexcept; 239 void SLTU(GPR rd, GPR lhs, GPR rhs) noexcept; 240 void SLTZ(GPR rd, GPR rs) noexcept; 241 242 void SNEZ(GPR rd, GPR rs) noexcept; 243 244 void SRA(GPR rd, GPR lhs, GPR rhs) noexcept; 245 void SRAI(GPR rd, GPR rs, uint32_t shift) noexcept; 246 247 void SRL(GPR rd, GPR lhs, GPR rhs) noexcept; 248 void SRLI(GPR rd, GPR rs, uint32_t shift) noexcept; 249 250 void SUB(GPR rd, GPR lhs, GPR rhs) noexcept; 251 252 void XOR(GPR rd, GPR lhs, GPR rhs) noexcept; 253 void XORI(GPR rd, GPR rs, uint32_t imm) noexcept; 254 255 // RV64I Base Instruction Set 256 257 void ADDIW(GPR rd, GPR rs, int32_t imm) noexcept; 258 void ADDW(GPR rd, GPR lhs, GPR rhs) noexcept; 259 void LD(GPR rd, int32_t imm, GPR rs) noexcept; 260 void LWU(GPR rd, int32_t imm, GPR rs) noexcept; 261 void SD(GPR rs2, int32_t imm, GPR rs1) noexcept; 262 263 void SLLIW(GPR rd, GPR rs, uint32_t shift) noexcept; 264 void SRAIW(GPR rd, GPR rs, uint32_t shift) noexcept; 265 void SRLIW(GPR rd, GPR rs, uint32_t shift) noexcept; 266 267 void SLLW(GPR rd, GPR lhs, GPR rhs) noexcept; 268 void SRAW(GPR rd, GPR lhs, GPR rhs) noexcept; 269 void SRLW(GPR rd, GPR lhs, GPR rhs) noexcept; 270 void SUBW(GPR rd, GPR lhs, GPR rhs) noexcept; 271 272 // Zawrs Extension Instructions 273 void WRS_NTO() noexcept; 274 void WRS_STO() noexcept; 275 276 // Zacas Extension Instructions 277 // 278 // NOTE: If targeting RV32 and using AMOCAS.D, rd and rs2 must be even-numbered 279 // registers, since they both indicate a register pair. 280 // 281 // On RV64, even and odd numbered registers can be used, 282 // 283 // On both RV32 and RV64, AMOCAS.Q requires rd and rs2 to be even-numbered 284 // since it also treats them like their own register pairs. 285 286 void AMOCAS_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 287 void AMOCAS_Q(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 288 void AMOCAS_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 289 290 // Zicond Extension Instructions 291 void CZERO_EQZ(GPR rd, GPR value, GPR condition) noexcept; 292 void CZERO_NEZ(GPR rd, GPR value, GPR condition) noexcept; 293 294 // Zicsr Extension Instructions 295 296 void CSRRC(GPR rd, CSR csr, GPR rs) noexcept; 297 void CSRRCI(GPR rd, CSR csr, uint32_t imm) noexcept; 298 void CSRRS(GPR rd, CSR csr, GPR rs) noexcept; 299 void CSRRSI(GPR rd, CSR csr, uint32_t imm) noexcept; 300 void CSRRW(GPR rd, CSR csr, GPR rs) noexcept; 301 void CSRRWI(GPR rd, CSR csr, uint32_t imm) noexcept; 302 303 void CSRR(GPR rd, CSR csr) noexcept; 304 void CSWR(CSR csr, GPR rs) noexcept; 305 306 void CSRS(CSR csr, GPR rs) noexcept; 307 void CSRC(CSR csr, GPR rs) noexcept; 308 309 void CSRCI(CSR csr, uint32_t imm) noexcept; 310 void CSRSI(CSR csr, uint32_t imm) noexcept; 311 void CSRWI(CSR csr, uint32_t imm) noexcept; 312 313 void FRCSR(GPR rd) noexcept; 314 void FSCSR(GPR rd, GPR rs) noexcept; 315 void FSCSR(GPR rs) noexcept; 316 317 void FRRM(GPR rd) noexcept; 318 void FSRM(GPR rd, GPR rs) noexcept; 319 void FSRM(GPR rs) noexcept; 320 321 void FSRMI(GPR rd, uint32_t imm) noexcept; 322 void FSRMI(uint32_t imm) noexcept; 323 324 void FRFLAGS(GPR rd) noexcept; 325 void FSFLAGS(GPR rd, GPR rs) noexcept; 326 void FSFLAGS(GPR rs) noexcept; 327 328 void FSFLAGSI(GPR rd, uint32_t imm) noexcept; 329 void FSFLAGSI(uint32_t imm) noexcept; 330 331 void RDCYCLE(GPR rd) noexcept; 332 void RDCYCLEH(GPR rd) noexcept; 333 334 void RDINSTRET(GPR rd) noexcept; 335 void RDINSTRETH(GPR rd) noexcept; 336 337 void RDTIME(GPR rd) noexcept; 338 void RDTIMEH(GPR rd) noexcept; 339 340 // Zihintntl Extension Instructions 341 342 void C_NTL_ALL() noexcept; 343 void C_NTL_S1() noexcept; 344 void C_NTL_P1() noexcept; 345 void C_NTL_PALL() noexcept; 346 void NTL_ALL() noexcept; 347 void NTL_S1() noexcept; 348 void NTL_P1() noexcept; 349 void NTL_PALL() noexcept; 350 351 // RV32M Extension Instructions 352 353 void DIV(GPR rd, GPR rs1, GPR rs2) noexcept; 354 void DIVU(GPR rd, GPR rs1, GPR rs2) noexcept; 355 void MUL(GPR rd, GPR rs1, GPR rs2) noexcept; 356 void MULH(GPR rd, GPR rs1, GPR rs2) noexcept; 357 void MULHSU(GPR rd, GPR rs1, GPR rs2) noexcept; 358 void MULHU(GPR rd, GPR rs1, GPR rs2) noexcept; 359 void REM(GPR rd, GPR rs1, GPR rs2) noexcept; 360 void REMU(GPR rd, GPR rs1, GPR rs2) noexcept; 361 362 // RV64M Extension Instructions 363 364 void DIVW(GPR rd, GPR rs1, GPR rs2) noexcept; 365 void DIVUW(GPR rd, GPR rs1, GPR rs2) noexcept; 366 void MULW(GPR rd, GPR rs1, GPR rs2) noexcept; 367 void REMW(GPR rd, GPR rs1, GPR rs2) noexcept; 368 void REMUW(GPR rd, GPR rs1, GPR rs2) noexcept; 369 370 // RV32A Extension Instructions 371 372 void AMOADD_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 373 void AMOAND_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 374 void AMOMAX_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 375 void AMOMAXU_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 376 void AMOMIN_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 377 void AMOMINU_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 378 void AMOOR_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 379 void AMOSWAP_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 380 void AMOXOR_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 381 void LR_W(Ordering ordering, GPR rd, GPR rs) noexcept; 382 void SC_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 383 384 // RV64A Extension Instructions 385 386 void AMOADD_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 387 void AMOAND_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 388 void AMOMAX_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 389 void AMOMAXU_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 390 void AMOMIN_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 391 void AMOMINU_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 392 void AMOOR_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 393 void AMOSWAP_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 394 void AMOXOR_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 395 void LR_D(Ordering ordering, GPR rd, GPR rs) noexcept; 396 void SC_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 397 398 // RV32F Extension Instructions 399 400 void FADD_S(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 401 void FCLASS_S(GPR rd, FPR rs1) noexcept; 402 void FCVT_S_W(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 403 void FCVT_S_WU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 404 void FCVT_W_S(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 405 void FCVT_WU_S(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 406 void FDIV_S(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 407 void FEQ_S(GPR rd, FPR rs1, FPR rs2) noexcept; 408 void FLE_S(GPR rd, FPR rs1, FPR rs2) noexcept; 409 void FLT_S(GPR rd, FPR rs1, FPR rs2) noexcept; 410 void FLW(FPR rd, int32_t offset, GPR rs) noexcept; 411 void FMADD_S(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 412 void FMAX_S(FPR rd, FPR rs1, FPR rs2) noexcept; 413 void FMIN_S(FPR rd, FPR rs1, FPR rs2) noexcept; 414 void FMSUB_S(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 415 void FMUL_S(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 416 void FMV_W_X(FPR rd, GPR rs1) noexcept; 417 void FMV_X_W(GPR rd, FPR rs1) noexcept; 418 void FNMADD_S(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 419 void FNMSUB_S(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 420 void FSGNJ_S(FPR rd, FPR rs1, FPR rs2) noexcept; 421 void FSGNJN_S(FPR rd, FPR rs1, FPR rs2) noexcept; 422 void FSGNJX_S(FPR rd, FPR rs1, FPR rs2) noexcept; 423 void FSQRT_S(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 424 void FSUB_S(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 425 void FSW(FPR rs2, int32_t offset, GPR rs1) noexcept; 426 427 void FABS_S(FPR rd, FPR rs) noexcept; 428 void FMV_S(FPR rd, FPR rs) noexcept; 429 void FNEG_S(FPR rd, FPR rs) noexcept; 430 431 // RV64F Extension Instructions 432 433 void FCVT_L_S(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 434 void FCVT_LU_S(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 435 void FCVT_S_L(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 436 void FCVT_S_LU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 437 438 // RV32D Extension Instructions 439 440 void FADD_D(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 441 void FCLASS_D(GPR rd, FPR rs1) noexcept; 442 void FCVT_D_W(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 443 void FCVT_D_WU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 444 void FCVT_W_D(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 445 void FCVT_WU_D(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 446 void FCVT_D_S(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 447 void FCVT_S_D(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 448 void FDIV_D(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 449 void FEQ_D(GPR rd, FPR rs1, FPR rs2) noexcept; 450 void FLE_D(GPR rd, FPR rs1, FPR rs2) noexcept; 451 void FLT_D(GPR rd, FPR rs1, FPR rs2) noexcept; 452 void FLD(FPR rd, int32_t offset, GPR rs) noexcept; 453 void FMADD_D(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 454 void FMAX_D(FPR rd, FPR rs1, FPR rs2) noexcept; 455 void FMIN_D(FPR rd, FPR rs1, FPR rs2) noexcept; 456 void FMSUB_D(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 457 void FMUL_D(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 458 void FNMADD_D(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 459 void FNMSUB_D(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 460 void FSGNJ_D(FPR rd, FPR rs1, FPR rs2) noexcept; 461 void FSGNJN_D(FPR rd, FPR rs1, FPR rs2) noexcept; 462 void FSGNJX_D(FPR rd, FPR rs1, FPR rs2) noexcept; 463 void FSQRT_D(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 464 void FSUB_D(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 465 void FSD(FPR rs2, int32_t offset, GPR rs1) noexcept; 466 467 void FABS_D(FPR rd, FPR rs) noexcept; 468 void FMV_D(FPR rd, FPR rs) noexcept; 469 void FNEG_D(FPR rd, FPR rs) noexcept; 470 471 // RV64D Extension Instructions 472 473 void FCVT_L_D(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 474 void FCVT_LU_D(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 475 void FCVT_D_L(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 476 void FCVT_D_LU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 477 void FMV_D_X(FPR rd, GPR rs1) noexcept; 478 void FMV_X_D(GPR rd, FPR rs1) noexcept; 479 480 // RV32Q Extension Instructions 481 482 void FADD_Q(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 483 void FCLASS_Q(GPR rd, FPR rs1) noexcept; 484 void FCVT_Q_W(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 485 void FCVT_Q_WU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 486 void FCVT_W_Q(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 487 void FCVT_WU_Q(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 488 void FCVT_Q_D(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 489 void FCVT_D_Q(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 490 void FCVT_Q_S(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 491 void FCVT_S_Q(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 492 void FDIV_Q(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 493 void FEQ_Q(GPR rd, FPR rs1, FPR rs2) noexcept; 494 void FLE_Q(GPR rd, FPR rs1, FPR rs2) noexcept; 495 void FLT_Q(GPR rd, FPR rs1, FPR rs2) noexcept; 496 void FLQ(FPR rd, int32_t offset, GPR rs) noexcept; 497 void FMADD_Q(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 498 void FMAX_Q(FPR rd, FPR rs1, FPR rs2) noexcept; 499 void FMIN_Q(FPR rd, FPR rs1, FPR rs2) noexcept; 500 void FMSUB_Q(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 501 void FMUL_Q(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 502 void FNMADD_Q(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 503 void FNMSUB_Q(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 504 void FSGNJ_Q(FPR rd, FPR rs1, FPR rs2) noexcept; 505 void FSGNJN_Q(FPR rd, FPR rs1, FPR rs2) noexcept; 506 void FSGNJX_Q(FPR rd, FPR rs1, FPR rs2) noexcept; 507 void FSQRT_Q(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 508 void FSUB_Q(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 509 void FSQ(FPR rs2, int32_t offset, GPR rs1) noexcept; 510 511 void FABS_Q(FPR rd, FPR rs) noexcept; 512 void FMV_Q(FPR rd, FPR rs) noexcept; 513 void FNEG_Q(FPR rd, FPR rs) noexcept; 514 515 // RV64Q Extension Instructions 516 517 void FCVT_L_Q(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 518 void FCVT_LU_Q(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 519 void FCVT_Q_L(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 520 void FCVT_Q_LU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 521 522 // RV32Zfh Extension Instructions 523 524 void FADD_H(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 525 void FCLASS_H(GPR rd, FPR rs1) noexcept; 526 void FCVT_D_H(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 527 void FCVT_H_D(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 528 void FCVT_H_Q(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 529 void FCVT_H_S(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 530 void FCVT_H_W(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 531 void FCVT_H_WU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 532 void FCVT_Q_H(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 533 void FCVT_S_H(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 534 void FCVT_W_H(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 535 void FCVT_WU_H(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 536 void FDIV_H(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 537 void FEQ_H(GPR rd, FPR rs1, FPR rs2) noexcept; 538 void FLE_H(GPR rd, FPR rs1, FPR rs2) noexcept; 539 void FLH(FPR rd, int32_t offset, GPR rs) noexcept; 540 void FLT_H(GPR rd, FPR rs1, FPR rs2) noexcept; 541 void FMADD_H(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 542 void FMAX_H(FPR rd, FPR rs1, FPR rs2) noexcept; 543 void FMIN_H(FPR rd, FPR rs1, FPR rs2) noexcept; 544 void FMSUB_H(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 545 void FMUL_H(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 546 void FMV_H_X(FPR rd, GPR rs1) noexcept; 547 void FMV_X_H(GPR rd, FPR rs1) noexcept; 548 void FNMADD_H(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 549 void FNMSUB_H(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 550 void FSGNJ_H(FPR rd, FPR rs1, FPR rs2) noexcept; 551 void FSGNJN_H(FPR rd, FPR rs1, FPR rs2) noexcept; 552 void FSGNJX_H(FPR rd, FPR rs1, FPR rs2) noexcept; 553 void FSH(FPR rs2, int32_t offset, GPR rs1) noexcept; 554 void FSQRT_H(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 555 void FSUB_H(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 556 557 // RV64Zfh Extension Instructions 558 559 void FCVT_L_H(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 560 void FCVT_LU_H(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 561 void FCVT_H_L(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 562 void FCVT_H_LU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 563 564 // Zfa Extension Instructions 565 566 void FLI_D(FPR rd, double value) noexcept; 567 void FLI_H(FPR rd, double value) noexcept; 568 void FLI_S(FPR rd, double value) noexcept; 569 570 void FMINM_D(FPR rd, FPR rs1, FPR rs2) noexcept; 571 void FMINM_H(FPR rd, FPR rs1, FPR rs2) noexcept; 572 void FMINM_Q(FPR rd, FPR rs1, FPR rs2) noexcept; 573 void FMINM_S(FPR rd, FPR rs1, FPR rs2) noexcept; 574 575 void FMAXM_D(FPR rd, FPR rs1, FPR rs2) noexcept; 576 void FMAXM_H(FPR rd, FPR rs1, FPR rs2) noexcept; 577 void FMAXM_Q(FPR rd, FPR rs1, FPR rs2) noexcept; 578 void FMAXM_S(FPR rd, FPR rs1, FPR rs2) noexcept; 579 580 void FROUND_D(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 581 void FROUND_H(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 582 void FROUND_Q(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 583 void FROUND_S(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 584 585 void FROUNDNX_D(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 586 void FROUNDNX_H(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 587 void FROUNDNX_Q(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 588 void FROUNDNX_S(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 589 590 void FCVTMOD_W_D(GPR rd, FPR rs1) noexcept; 591 592 void FMVH_X_D(GPR rd, FPR rs1) noexcept; 593 void FMVH_X_Q(GPR rd, FPR rs1) noexcept; 594 void FMVP_D_X(FPR rd, GPR rs1, GPR rs2) noexcept; 595 void FMVP_Q_X(FPR rd, GPR rs1, GPR rs2) noexcept; 596 597 void FLEQ_D(GPR rd, FPR rs1, FPR rs2) noexcept; 598 void FLTQ_D(GPR rd, FPR rs1, FPR rs2) noexcept; 599 600 void FLEQ_H(GPR rd, FPR rs1, FPR rs2) noexcept; 601 void FLTQ_H(GPR rd, FPR rs1, FPR rs2) noexcept; 602 603 void FLEQ_Q(GPR rd, FPR rs1, FPR rs2) noexcept; 604 void FLTQ_Q(GPR rd, FPR rs1, FPR rs2) noexcept; 605 606 void FLEQ_S(GPR rd, FPR rs1, FPR rs2) noexcept; 607 void FLTQ_S(GPR rd, FPR rs1, FPR rs2) noexcept; 608 609 // Zfbfmin Extension Instructions 610 611 void FCVT_BF16_S(FPR rd, FPR rs, RMode rmode = RMode::DYN) noexcept; 612 void FCVT_S_BF16(FPR rd, FPR rs, RMode rmode = RMode::DYN) noexcept; 613 614 // RVB Extension Instructions (plus scalar crypto bit operations) 615 616 void ADDUW(GPR rd, GPR rs1, GPR rs2) noexcept; 617 void ANDN(GPR rd, GPR rs1, GPR rs2) noexcept; 618 void BCLR(GPR rd, GPR rs1, GPR rs2) noexcept; 619 void BCLRI(GPR rd, GPR rs, uint32_t bit) noexcept; 620 void BEXT(GPR rd, GPR rs1, GPR rs2) noexcept; 621 void BEXTI(GPR rd, GPR rs, uint32_t bit) noexcept; 622 void BINV(GPR rd, GPR rs1, GPR rs2) noexcept; 623 void BINVI(GPR rd, GPR rs, uint32_t bit) noexcept; 624 void BREV8(GPR rd, GPR rs) noexcept; 625 void BSET(GPR rd, GPR rs1, GPR rs2) noexcept; 626 void BSETI(GPR rd, GPR rs, uint32_t bit) noexcept; 627 void CLMUL(GPR rd, GPR rs1, GPR rs2) noexcept; 628 void CLMULH(GPR rd, GPR rs1, GPR rs2) noexcept; 629 void CLMULR(GPR rd, GPR rs1, GPR rs2) noexcept; 630 void CLZ(GPR rd, GPR rs) noexcept; 631 void CLZW(GPR rd, GPR rs) noexcept; 632 void CPOP(GPR rd, GPR rs) noexcept; 633 void CPOPW(GPR rd, GPR rs) noexcept; 634 void CTZ(GPR rd, GPR rs) noexcept; 635 void CTZW(GPR rd, GPR rs) noexcept; 636 void MAX(GPR rd, GPR rs1, GPR rs2) noexcept; 637 void MAXU(GPR rd, GPR rs1, GPR rs2) noexcept; 638 void MIN(GPR rd, GPR rs1, GPR rs2) noexcept; 639 void MINU(GPR rd, GPR rs1, GPR rs2) noexcept; 640 void ORCB(GPR rd, GPR rs) noexcept; 641 void ORN(GPR rd, GPR rs1, GPR rs2) noexcept; 642 void PACK(GPR rd, GPR rs1, GPR rs2) noexcept; 643 void PACKH(GPR rd, GPR rs1, GPR rs2) noexcept; 644 void PACKW(GPR rd, GPR rs1, GPR rs2) noexcept; 645 void REV8(GPR rd, GPR rs) noexcept; 646 void ROL(GPR rd, GPR rs1, GPR rs2) noexcept; 647 void ROLW(GPR rd, GPR rs1, GPR rs2) noexcept; 648 void ROR(GPR rd, GPR rs1, GPR rs2) noexcept; 649 void RORI(GPR rd, GPR rs, uint32_t rotate_amount) noexcept; 650 void RORIW(GPR rd, GPR rs, uint32_t rotate_amount) noexcept; 651 void RORW(GPR rd, GPR rs1, GPR rs2) noexcept; 652 void SEXTB(GPR rd, GPR rs) noexcept; 653 void SEXTH(GPR rd, GPR rs) noexcept; 654 void SH1ADD(GPR rd, GPR rs1, GPR rs2) noexcept; 655 void SH1ADDUW(GPR rd, GPR rs1, GPR rs2) noexcept; 656 void SH2ADD(GPR rd, GPR rs1, GPR rs2) noexcept; 657 void SH2ADDUW(GPR rd, GPR rs1, GPR rs2) noexcept; 658 void SH3ADD(GPR rd, GPR rs1, GPR rs2) noexcept; 659 void SH3ADDUW(GPR rd, GPR rs1, GPR rs2) noexcept; 660 void SLLIUW(GPR rd, GPR rs, uint32_t shift_amount) noexcept; 661 void UNZIP(GPR rd, GPR rs) noexcept; 662 void XNOR(GPR rd, GPR rs1, GPR rs2) noexcept; 663 void XPERM4(GPR rd, GPR rs1, GPR rs2) noexcept; 664 void XPERM8(GPR rd, GPR rs1, GPR rs2) noexcept; 665 void ZEXTH(GPR rd, GPR rs) noexcept; 666 void ZEXTW(GPR rd, GPR rs) noexcept; 667 void ZIP(GPR rd, GPR rs) noexcept; 668 669 // Scalar Cryptography (RVK) instructions 670 671 void AES32DSI(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept; 672 void AES32DSMI(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept; 673 void AES32ESI(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept; 674 void AES32ESMI(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept; 675 void AES64DS(GPR rd, GPR rs1, GPR rs2) noexcept; 676 void AES64DSM(GPR rd, GPR rs1, GPR rs2) noexcept; 677 void AES64ES(GPR rd, GPR rs1, GPR rs2) noexcept; 678 void AES64ESM(GPR rd, GPR rs1, GPR rs2) noexcept; 679 void AES64IM(GPR rd, GPR rs) noexcept; 680 void AES64KS1I(GPR rd, GPR rs, uint32_t rnum) noexcept; 681 void AES64KS2(GPR rd, GPR rs1, GPR rs2) noexcept; 682 void SHA256SIG0(GPR rd, GPR rs) noexcept; 683 void SHA256SIG1(GPR rd, GPR rs) noexcept; 684 void SHA256SUM0(GPR rd, GPR rs) noexcept; 685 void SHA256SUM1(GPR rd, GPR rs) noexcept; 686 void SHA512SIG0(GPR rd, GPR rs) noexcept; 687 void SHA512SIG0H(GPR rd, GPR rs1, GPR rs2) noexcept; 688 void SHA512SIG0L(GPR rd, GPR rs1, GPR rs2) noexcept; 689 void SHA512SIG1(GPR rd, GPR rs) noexcept; 690 void SHA512SIG1H(GPR rd, GPR rs1, GPR rs2) noexcept; 691 void SHA512SIG1L(GPR rd, GPR rs1, GPR rs2) noexcept; 692 void SHA512SUM0(GPR rd, GPR rs) noexcept; 693 void SHA512SUM0R(GPR rd, GPR rs1, GPR rs2) noexcept; 694 void SHA512SUM1(GPR rd, GPR rs) noexcept; 695 void SHA512SUM1R(GPR rd, GPR rs1, GPR rs2) noexcept; 696 void SM3P0(GPR rd, GPR rs) noexcept; 697 void SM3P1(GPR rd, GPR rs) noexcept; 698 void SM4ED(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept; 699 void SM4KS(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept; 700 701 // RVC Extension Instructions 702 703 void C_ADD(GPR rd, GPR rs) noexcept; 704 void C_ADDI(GPR rd, int32_t imm) noexcept; 705 void C_ADDIW(GPR rd, int32_t imm) noexcept; 706 void C_ADDI4SPN(GPR rd, uint32_t imm) noexcept; 707 void C_ADDI16SP(int32_t imm) noexcept; 708 void C_ADDW(GPR rd, GPR rs) noexcept; 709 void C_AND(GPR rd, GPR rs) noexcept; 710 void C_ANDI(GPR rd, uint32_t imm) noexcept; 711 void C_BEQZ(GPR rs, int32_t offset) noexcept; 712 void C_BEQZ(GPR rs, Label* label) noexcept; 713 void C_BNEZ(GPR rs, int32_t offset) noexcept; 714 void C_BNEZ(GPR rs, Label* label) noexcept; 715 void C_EBREAK() noexcept; 716 void C_FLD(FPR rd, uint32_t imm, GPR rs) noexcept; 717 void C_FLDSP(FPR rd, uint32_t imm) noexcept; 718 void C_FLW(FPR rd, uint32_t imm, GPR rs) noexcept; 719 void C_FLWSP(FPR rd, uint32_t imm) noexcept; 720 void C_FSD(FPR rs2, uint32_t imm, GPR rs1) noexcept; 721 void C_FSDSP(FPR rs, uint32_t imm) noexcept; 722 void C_FSW(FPR rs2, uint32_t imm, GPR rs1) noexcept; 723 void C_FSWSP(FPR rs, uint32_t imm) noexcept; 724 void C_J(int32_t offset) noexcept; 725 void C_J(Label* label) noexcept; 726 void C_JAL(Label* label) noexcept; 727 void C_JAL(int32_t offset) noexcept; 728 void C_JALR(GPR rs) noexcept; 729 void C_JR(GPR rs) noexcept; 730 void C_LD(GPR rd, uint32_t imm, GPR rs) noexcept; 731 void C_LDSP(GPR rd, uint32_t imm) noexcept; 732 void C_LI(GPR rd, int32_t imm) noexcept; 733 void C_LQ(GPR rd, uint32_t imm, GPR rs) noexcept; 734 void C_LQSP(GPR rd, uint32_t imm) noexcept; 735 void C_LUI(GPR rd, uint32_t imm) noexcept; 736 void C_LW(GPR rd, uint32_t imm, GPR rs) noexcept; 737 void C_LWSP(GPR rd, uint32_t imm) noexcept; 738 void C_MV(GPR rd, GPR rs) noexcept; 739 void C_NOP() noexcept; 740 void C_OR(GPR rd, GPR rs) noexcept; 741 void C_SD(GPR rs2, uint32_t imm, GPR rs1) noexcept; 742 void C_SDSP(GPR rs, uint32_t imm) noexcept; 743 void C_SLLI(GPR rd, uint32_t shift) noexcept; 744 void C_SQ(GPR rs2, uint32_t imm, GPR rs1) noexcept; 745 void C_SQSP(GPR rs, uint32_t imm) noexcept; 746 void C_SRAI(GPR rd, uint32_t shift) noexcept; 747 void C_SRLI(GPR rd, uint32_t shift) noexcept; 748 void C_SUB(GPR rd, GPR rs) noexcept; 749 void C_SUBW(GPR rd, GPR rs) noexcept; 750 void C_SW(GPR rs2, uint32_t imm, GPR rs1) noexcept; 751 void C_SWSP(GPR rs, uint32_t imm) noexcept; 752 void C_UNDEF() noexcept; 753 void C_XOR(GPR rd, GPR rs) noexcept; 754 755 // Zc Extension Instructions 756 757 void C_LBU(GPR rd, uint32_t uimm, GPR rs) noexcept; 758 void C_LH(GPR rd, uint32_t uimm, GPR rs) noexcept; 759 void C_LHU(GPR rd, uint32_t uimm, GPR rs) noexcept; 760 void C_SB(GPR rs2, uint32_t uimm, GPR rs1) noexcept; 761 void C_SH(GPR rs2, uint32_t uimm, GPR rs1) noexcept; 762 763 void C_SEXT_B(GPR rd) noexcept; 764 void C_SEXT_H(GPR rd) noexcept; 765 void C_ZEXT_B(GPR rd) noexcept; 766 void C_ZEXT_H(GPR rd) noexcept; 767 void C_ZEXT_W(GPR rd) noexcept; 768 769 void C_MUL(GPR rsd, GPR rs2) noexcept; 770 void C_NOT(GPR rd) noexcept; 771 772 void CM_MVA01S(GPR r1s, GPR r2s) noexcept; 773 void CM_MVSA01(GPR r1s, GPR r2s) noexcept; 774 775 void CM_POP(PushPopList reg_list, int32_t stack_adj) noexcept; 776 void CM_POPRET(PushPopList reg_list, int32_t stack_adj) noexcept; 777 void CM_POPRETZ(PushPopList reg_list, int32_t stack_adj) noexcept; 778 void CM_PUSH(PushPopList reg_list, int32_t stack_adj) noexcept; 779 780 void CM_JALT(uint32_t index) noexcept; 781 void CM_JT(uint32_t index) noexcept; 782 783 // Cache Management Operation Extension Instructions 784 785 void CBO_CLEAN(GPR rs) noexcept; 786 void CBO_FLUSH(GPR rs) noexcept; 787 void CBO_INVAL(GPR rs) noexcept; 788 void CBO_ZERO(GPR rs) noexcept; 789 void PREFETCH_I(GPR rs, int32_t offset = 0) noexcept; 790 void PREFETCH_R(GPR rs, int32_t offset = 0) noexcept; 791 void PREFETCH_W(GPR rs, int32_t offset = 0) noexcept; 792 793 // Privileged Instructions 794 795 void HFENCE_GVMA(GPR rs1, GPR rs2) noexcept; 796 void HFENCE_VVMA(GPR rs1, GPR rs2) noexcept; 797 void HINVAL_GVMA(GPR rs1, GPR rs2) noexcept; 798 void HINVAL_VVMA(GPR rs1, GPR rs2) noexcept; 799 void HLV_B(GPR rd, GPR rs) noexcept; 800 void HLV_BU(GPR rd, GPR rs) noexcept; 801 void HLV_D(GPR rd, GPR rs) noexcept; 802 void HLV_H(GPR rd, GPR rs) noexcept; 803 void HLV_HU(GPR rd, GPR rs) noexcept; 804 void HLV_W(GPR rd, GPR rs) noexcept; 805 void HLV_WU(GPR rd, GPR rs) noexcept; 806 void HLVX_HU(GPR rd, GPR rs) noexcept; 807 void HLVX_WU(GPR rd, GPR rs) noexcept; 808 void HSV_B(GPR rs2, GPR rs1) noexcept; 809 void HSV_D(GPR rs2, GPR rs1) noexcept; 810 void HSV_H(GPR rs2, GPR rs1) noexcept; 811 void HSV_W(GPR rs2, GPR rs1) noexcept; 812 void MRET() noexcept; 813 void SFENCE_INVAL_IR() noexcept; 814 void SFENCE_VMA(GPR rs1, GPR rs2) noexcept; 815 void SFENCE_W_INVAL() noexcept; 816 void SINVAL_VMA(GPR rs1, GPR rs2) noexcept; 817 void SRET() noexcept; 818 void URET() noexcept; 819 void WFI() noexcept; 820 821 // Vector Extension Instructions 822 823 // Vector Integer Instructions 824 825 void VAADD(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 826 void VAADD(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 827 828 void VAADDU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 829 void VAADDU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 830 831 void VADC(Vec vd, Vec vs2, Vec vs1) noexcept; 832 void VADC(Vec vd, Vec vs2, GPR rs1) noexcept; 833 void VADC(Vec vd, Vec vs2, int32_t simm) noexcept; 834 835 void VADD(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 836 void VADD(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 837 void VADD(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 838 839 void VAND(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 840 void VAND(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 841 void VAND(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 842 843 void VASUB(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 844 void VASUB(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 845 846 void VASUBU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 847 void VASUBU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 848 849 void VCOMPRESS(Vec vd, Vec vs2, Vec vs1) noexcept; 850 851 void VDIV(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 852 void VDIV(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 853 854 void VDIVU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 855 void VDIVU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 856 857 void VFIRST(GPR rd, Vec vs, VecMask mask = VecMask::No) noexcept; 858 859 void VID(Vec vd, VecMask mask = VecMask::No) noexcept; 860 861 void VIOTA(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 862 863 void VMACC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 864 void VMACC(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 865 866 void VMADC(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 867 void VMADC(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 868 void VMADC(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 869 870 void VMADD(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 871 void VMADD(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 872 873 void VMAND(Vec vd, Vec vs2, Vec vs1) noexcept; 874 void VMANDNOT(Vec vd, Vec vs2, Vec vs1) noexcept; 875 void VMNAND(Vec vd, Vec vs2, Vec vs1) noexcept; 876 void VMNOR(Vec vd, Vec vs2, Vec vs1) noexcept; 877 void VMOR(Vec vd, Vec vs2, Vec vs1) noexcept; 878 void VMORNOT(Vec vd, Vec vs2, Vec vs1) noexcept; 879 void VMXNOR(Vec vd, Vec vs2, Vec vs1) noexcept; 880 void VMXOR(Vec vd, Vec vs2, Vec vs1) noexcept; 881 882 void VMAX(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 883 void VMAX(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 884 885 void VMAXU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 886 void VMAXU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 887 888 void VMERGE(Vec vd, Vec vs2, Vec vs1) noexcept; 889 void VMERGE(Vec vd, Vec vs2, GPR rs1) noexcept; 890 void VMERGE(Vec vd, Vec vs2, int32_t simm) noexcept; 891 892 void VMIN(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 893 void VMIN(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 894 895 void VMINU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 896 void VMINU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 897 898 void VMSBC(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 899 void VMSBC(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 900 901 void VMSBF(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 902 void VMSIF(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 903 void VMSOF(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 904 905 void VMSEQ(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 906 void VMSEQ(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 907 void VMSEQ(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 908 909 void VMSGT(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 910 void VMSGT(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 911 912 void VMSGTU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 913 void VMSGTU(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 914 915 void VMSLE(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 916 void VMSLE(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 917 void VMSLE(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 918 919 void VMSLEU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 920 void VMSLEU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 921 void VMSLEU(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 922 923 void VMSLT(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 924 void VMSLT(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 925 926 void VMSLTU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 927 void VMSLTU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 928 929 void VMSNE(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 930 void VMSNE(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 931 void VMSNE(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 932 933 void VMUL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 934 void VMUL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 935 936 void VMULH(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 937 void VMULH(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 938 939 void VMULHSU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 940 void VMULHSU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 941 942 void VMULHU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 943 void VMULHU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 944 945 void VMV(Vec vd, Vec vs1) noexcept; 946 void VMV(Vec vd, GPR rs1) noexcept; 947 void VMV(Vec vd, int32_t simm) noexcept; 948 949 void VMV1R(Vec vd, Vec vs) noexcept; 950 void VMV2R(Vec vd, Vec vs) noexcept; 951 void VMV4R(Vec vd, Vec vs) noexcept; 952 void VMV8R(Vec vd, Vec vs) noexcept; 953 954 void VMV_SX(Vec vd, GPR rs) noexcept; 955 void VMV_XS(GPR rd, Vec vs) noexcept; 956 957 void VNCLIP(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 958 void VNCLIP(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 959 void VNCLIP(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 960 961 void VNCLIPU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 962 void VNCLIPU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 963 void VNCLIPU(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 964 965 void VNMSAC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 966 void VNMSAC(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 967 968 void VNMSUB(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 969 void VNMSUB(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 970 971 void VNSRA(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 972 void VNSRA(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 973 void VNSRA(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 974 975 void VNSRL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 976 void VNSRL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 977 void VNSRL(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 978 979 void VOR(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 980 void VOR(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 981 void VOR(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 982 983 void VPOPC(GPR rd, Vec vs, VecMask mask = VecMask::No) noexcept; 984 985 void VREDAND(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 986 void VREDMAX(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 987 void VREDMAXU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 988 void VREDMIN(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 989 void VREDMINU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 990 void VREDOR(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 991 void VREDSUM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 992 void VREDXOR(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 993 994 void VREM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 995 void VREM(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 996 997 void VREMU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 998 void VREMU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 999 1000 void VRGATHER(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1001 void VRGATHER(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1002 void VRGATHER(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 1003 1004 void VRGATHEREI16(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1005 1006 void VRSUB(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1007 void VRSUB(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 1008 1009 void VSADD(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1010 void VSADD(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1011 void VSADD(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 1012 1013 void VSADDU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1014 void VSADDU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1015 void VSADDU(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 1016 1017 void VSBC(Vec vd, Vec vs2, Vec vs1) noexcept; 1018 void VSBC(Vec vd, Vec vs2, GPR rs1) noexcept; 1019 1020 void VSEXTVF2(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1021 void VSEXTVF4(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1022 void VSEXTVF8(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1023 1024 void VSLIDE1DOWN(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1025 void VSLIDEDOWN(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1026 void VSLIDEDOWN(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 1027 1028 void VSLIDE1UP(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1029 void VSLIDEUP(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1030 void VSLIDEUP(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 1031 1032 void VSLL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1033 void VSLL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1034 void VSLL(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 1035 1036 void VSMUL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1037 void VSMUL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1038 1039 void VSRA(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1040 void VSRA(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1041 void VSRA(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 1042 1043 void VSRL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1044 void VSRL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1045 void VSRL(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 1046 1047 void VSSRA(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1048 void VSSRA(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1049 void VSSRA(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 1050 1051 void VSSRL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1052 void VSSRL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1053 void VSSRL(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 1054 1055 void VSSUB(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1056 void VSSUB(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1057 1058 void VSSUBU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1059 void VSSUBU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1060 1061 void VSUB(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1062 void VSUB(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1063 1064 void VWADD(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1065 void VWADD(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1066 1067 void VWADDW(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1068 void VWADDW(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1069 1070 void VWADDU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1071 void VWADDU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1072 1073 void VWADDUW(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1074 void VWADDUW(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1075 1076 void VWMACC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1077 void VWMACC(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1078 1079 void VWMACCSU(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1080 void VWMACCSU(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1081 1082 void VWMACCU(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1083 void VWMACCU(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1084 1085 void VWMACCUS(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1086 1087 void VWMUL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1088 void VWMUL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1089 1090 void VWMULSU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1091 void VWMULSU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1092 1093 void VWMULU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1094 void VWMULU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1095 1096 void VWREDSUM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1097 void VWREDSUMU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1098 1099 void VWSUB(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1100 void VWSUB(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1101 1102 void VWSUBW(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1103 void VWSUBW(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1104 1105 void VWSUBU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1106 void VWSUBU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1107 1108 void VWSUBUW(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1109 void VWSUBUW(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1110 1111 void VXOR(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1112 void VXOR(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1113 void VXOR(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 1114 1115 void VZEXTVF2(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1116 void VZEXTVF4(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1117 void VZEXTVF8(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1118 1119 // Vector Floating-Point Instructions 1120 1121 void VFADD(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1122 void VFADD(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1123 1124 void VFCLASS(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1125 1126 void VFCVT_F_X(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1127 void VFCVT_F_XU(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1128 void VFCVT_RTZ_X_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1129 void VFCVT_RTZ_XU_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1130 void VFCVT_X_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1131 void VFCVT_XU_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1132 1133 void VFNCVT_F_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1134 void VFNCVT_F_X(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1135 void VFNCVT_F_XU(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1136 void VFNCVT_ROD_F_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1137 void VFNCVT_RTZ_X_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1138 void VFNCVT_RTZ_XU_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1139 void VFNCVT_X_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1140 void VFNCVT_XU_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1141 1142 void VFWCVT_F_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1143 void VFWCVT_F_X(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1144 void VFWCVT_F_XU(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1145 void VFWCVT_RTZ_X_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1146 void VFWCVT_RTZ_XU_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1147 void VFWCVT_X_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1148 void VFWCVT_XU_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1149 1150 void VFDIV(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1151 void VFDIV(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1152 void VFRDIV(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1153 1154 void VFREDMAX(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1155 void VFREDMIN(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1156 1157 void VFREDSUM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1158 void VFREDOSUM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1159 1160 void VFMACC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1161 void VFMACC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1162 1163 void VFMADD(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1164 void VFMADD(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1165 1166 void VFMAX(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1167 void VFMAX(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1168 1169 void VFMERGE(Vec vd, Vec vs2, FPR rs1) noexcept; 1170 1171 void VFMIN(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1172 void VFMIN(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1173 1174 void VFMSAC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1175 void VFMSAC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1176 1177 void VFMSUB(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1178 void VFMSUB(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1179 1180 void VFMUL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1181 void VFMUL(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1182 1183 void VFMV(Vec vd, FPR rs) noexcept; 1184 void VFMV_FS(FPR rd, Vec vs) noexcept; 1185 void VFMV_SF(Vec vd, FPR rs) noexcept; 1186 1187 void VFNMACC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1188 void VFNMACC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1189 1190 void VFNMADD(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1191 void VFNMADD(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1192 1193 void VFNMSAC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1194 void VFNMSAC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1195 1196 void VFNMSUB(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1197 void VFNMSUB(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1198 1199 void VFREC7(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1200 1201 void VFSGNJ(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1202 void VFSGNJ(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1203 1204 void VFSGNJN(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1205 void VFSGNJN(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1206 1207 void VFSGNJX(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1208 void VFSGNJX(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1209 1210 void VFSQRT(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1211 void VFRSQRT7(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1212 1213 void VFSLIDE1DOWN(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1214 void VFSLIDE1UP(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1215 1216 void VFSUB(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1217 void VFSUB(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1218 void VFRSUB(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1219 1220 void VFWADD(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1221 void VFWADD(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1222 1223 void VFWADDW(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1224 void VFWADDW(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1225 1226 void VFWMACC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1227 void VFWMACC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1228 1229 void VFWMUL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1230 void VFWMUL(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1231 1232 void VFWNMACC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1233 void VFWNMACC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1234 1235 void VFWNMSAC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1236 void VFWNMSAC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1237 1238 void VFWREDSUM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1239 void VFWREDOSUM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1240 1241 void VFWMSAC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1242 void VFWMSAC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1243 1244 void VFWSUB(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1245 void VFWSUB(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1246 1247 void VFWSUBW(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1248 void VFWSUBW(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1249 1250 void VMFEQ(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1251 void VMFEQ(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1252 1253 void VMFGE(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1254 void VMFGT(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1255 1256 void VMFLE(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1257 void VMFLE(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1258 1259 void VMFLT(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1260 void VMFLT(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1261 1262 void VMFNE(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1263 void VMFNE(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1264 1265 // Vector Load/Store Instructions 1266 1267 void VLE8(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1268 void VLE16(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1269 void VLE32(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1270 void VLE64(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1271 void VLM(Vec vd, GPR rs) noexcept; 1272 1273 void VLSE8(Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1274 void VLSE16(Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1275 void VLSE32(Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1276 void VLSE64(Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1277 1278 void VLOXEI8(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1279 void VLOXEI16(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1280 void VLOXEI32(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1281 void VLOXEI64(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1282 1283 void VLUXEI8(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1284 void VLUXEI16(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1285 void VLUXEI32(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1286 void VLUXEI64(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1287 1288 void VLE8FF(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1289 void VLE16FF(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1290 void VLE32FF(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1291 void VLE64FF(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1292 1293 void VLSEGE8(uint32_t num_segments, Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1294 void VLSEGE16(uint32_t num_segments, Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1295 void VLSEGE32(uint32_t num_segments, Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1296 void VLSEGE64(uint32_t num_segments, Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1297 1298 void VLSSEGE8(uint32_t num_segments, Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1299 void VLSSEGE16(uint32_t num_segments, Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1300 void VLSSEGE32(uint32_t num_segments, Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1301 void VLSSEGE64(uint32_t num_segments, Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1302 1303 void VLOXSEGEI8(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1304 void VLOXSEGEI16(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1305 void VLOXSEGEI32(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1306 void VLOXSEGEI64(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1307 1308 void VLUXSEGEI8(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1309 void VLUXSEGEI16(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1310 void VLUXSEGEI32(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1311 void VLUXSEGEI64(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1312 1313 void VLRE8(uint32_t num_registers, Vec vd, GPR rs) noexcept; 1314 void VL1RE8(Vec vd, GPR rs) noexcept; 1315 void VL2RE8(Vec vd, GPR rs) noexcept; 1316 void VL4RE8(Vec vd, GPR rs) noexcept; 1317 void VL8RE8(Vec vd, GPR rs) noexcept; 1318 1319 void VLRE16(uint32_t num_registers, Vec vd, GPR rs) noexcept; 1320 void VL1RE16(Vec vd, GPR rs) noexcept; 1321 void VL2RE16(Vec vd, GPR rs) noexcept; 1322 void VL4RE16(Vec vd, GPR rs) noexcept; 1323 void VL8RE16(Vec vd, GPR rs) noexcept; 1324 1325 void VLRE32(uint32_t num_registers, Vec vd, GPR rs) noexcept; 1326 void VL1RE32(Vec vd, GPR rs) noexcept; 1327 void VL2RE32(Vec vd, GPR rs) noexcept; 1328 void VL4RE32(Vec vd, GPR rs) noexcept; 1329 void VL8RE32(Vec vd, GPR rs) noexcept; 1330 1331 void VLRE64(uint32_t num_registers, Vec vd, GPR rs) noexcept; 1332 void VL1RE64(Vec vd, GPR rs) noexcept; 1333 void VL2RE64(Vec vd, GPR rs) noexcept; 1334 void VL4RE64(Vec vd, GPR rs) noexcept; 1335 void VL8RE64(Vec vd, GPR rs) noexcept; 1336 1337 void VSE8(Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1338 void VSE16(Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1339 void VSE32(Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1340 void VSE64(Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1341 void VSM(Vec vs, GPR rs) noexcept; 1342 1343 void VSSE8(Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1344 void VSSE16(Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1345 void VSSE32(Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1346 void VSSE64(Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1347 1348 void VSOXEI8(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1349 void VSOXEI16(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1350 void VSOXEI32(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1351 void VSOXEI64(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1352 1353 void VSUXEI8(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1354 void VSUXEI16(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1355 void VSUXEI32(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1356 void VSUXEI64(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1357 1358 void VSSEGE8(uint32_t num_segments, Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1359 void VSSEGE16(uint32_t num_segments, Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1360 void VSSEGE32(uint32_t num_segments, Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1361 void VSSEGE64(uint32_t num_segments, Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1362 1363 void VSSSEGE8(uint32_t num_segments, Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1364 void VSSSEGE16(uint32_t num_segments, Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1365 void VSSSEGE32(uint32_t num_segments, Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1366 void VSSSEGE64(uint32_t num_segments, Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1367 1368 void VSOXSEGEI8(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1369 void VSOXSEGEI16(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1370 void VSOXSEGEI32(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1371 void VSOXSEGEI64(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1372 1373 void VSUXSEGEI8(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1374 void VSUXSEGEI16(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1375 void VSUXSEGEI32(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1376 void VSUXSEGEI64(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1377 1378 void VSR(uint32_t num_registers, Vec vs, GPR rs) noexcept; 1379 void VS1R(Vec vs, GPR rs) noexcept; 1380 void VS2R(Vec vs, GPR rs) noexcept; 1381 void VS4R(Vec vs, GPR rs) noexcept; 1382 void VS8R(Vec vs, GPR rs) noexcept; 1383 1384 // Vector Configuration Setting Instructions 1385 1386 void VSETIVLI(GPR rd, uint32_t imm, SEW sew, LMUL lmul = LMUL::M1, VTA vta = VTA::No, VMA vma = VMA::No) noexcept; 1387 void VSETVL(GPR rd, GPR rs1, GPR rs2) noexcept; 1388 void VSETVLI(GPR rd, GPR rs, SEW sew, LMUL lmul = LMUL::M1, VTA vta = VTA::No, VMA vma = VMA::No) noexcept; 1389 1390 // Vector Cryptography Instructions 1391 1392 void VANDN(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1393 void VANDN(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1394 1395 void VBREV(Vec vd, Vec vs2, VecMask mask = VecMask::No) noexcept; 1396 void VBREV8(Vec vd, Vec vs2, VecMask mask = VecMask::No) noexcept; 1397 void VREV8(Vec vd, Vec vs2, VecMask mask = VecMask::No) noexcept; 1398 1399 void VCLZ(Vec vd, Vec vs2, VecMask mask = VecMask::No) noexcept; 1400 void VCTZ(Vec vd, Vec vs2, VecMask mask = VecMask::No) noexcept; 1401 void VCPOP(Vec vd, Vec vs2, VecMask mask = VecMask::No) noexcept; 1402 1403 void VROL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1404 void VROL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1405 1406 void VROR(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1407 void VROR(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1408 void VROR(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 1409 1410 void VWSLL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1411 void VWSLL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1412 void VWSLL(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 1413 1414 void VCLMUL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1415 void VCLMUL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1416 1417 void VCLMULH(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1418 void VCLMULH(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 1419 1420 void VGHSH(Vec vd, Vec vs2, Vec vs1) noexcept; 1421 void VGMUL(Vec vd, Vec vs2) noexcept; 1422 1423 void VAESDF_VV(Vec vd, Vec vs2) noexcept; 1424 void VAESDF_VS(Vec vd, Vec vs2) noexcept; 1425 1426 void VAESDM_VV(Vec vd, Vec vs2) noexcept; 1427 void VAESDM_VS(Vec vd, Vec vs2) noexcept; 1428 1429 void VAESEF_VV(Vec vd, Vec vs2) noexcept; 1430 void VAESEF_VS(Vec vd, Vec vs2) noexcept; 1431 1432 void VAESEM_VV(Vec vd, Vec vs2) noexcept; 1433 void VAESEM_VS(Vec vd, Vec vs2) noexcept; 1434 1435 void VAESKF1(Vec vd, Vec vs2, uint32_t uimm) noexcept; 1436 void VAESKF2(Vec vd, Vec vs2, uint32_t uimm) noexcept; 1437 1438 void VAESZ(Vec vd, Vec vs2) noexcept; 1439 1440 void VSHA2MS(Vec vd, Vec vs2, Vec vs1) noexcept; 1441 void VSHA2CH(Vec vd, Vec vs2, Vec vs1) noexcept; 1442 void VSHA2CL(Vec vd, Vec vs2, Vec vs1) noexcept; 1443 1444 void VSM4K(Vec vd, Vec vs2, uint32_t uimm) noexcept; 1445 void VSM4R_VV(Vec vd, Vec vs2) noexcept; 1446 void VSM4R_VS(Vec vd, Vec vs2) noexcept; 1447 1448 void VSM3C(Vec vd, Vec vs2, uint32_t uimm) noexcept; 1449 void VSM3ME(Vec vd, Vec vs2, Vec vs1) noexcept; 1450 1451 // Zvfbfmin, Zvfbfwma Extension Instructions 1452 1453 void VFNCVTBF16_F_F_W(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1454 void VFWCVTBF16_F_F_V(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1455 1456 void VFWMACCBF16(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1457 void VFWMACCBF16(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1458 1459 private: 1460 // Binds a label to a given offset. 1461 void BindToOffset(Label* label, Label::LocationOffset offset); 1462 1463 // Links the given label and returns the offset to it. 1464 ptrdiff_t LinkAndGetOffset(Label* label); 1465 1466 // Resolves all label offsets and patches any necessary 1467 // branch offsets into the branch instructions that 1468 // requires them. 1469 void ResolveLabelOffsets(Label* label); 1470 1471 CodeBuffer m_buffer; 1472 ArchFeature m_features = ArchFeature::RV64; 1473 }; 1474 1475 } // namespace biscuit