opl3.cpp
1 //------------------------------------------------------------------------- 2 /* 3 Copyright (C) 2013-2019 Nuke.YKT 4 5 This file is part of NBlood. 6 7 NBlood is free software; you can redistribute it and/or 8 modify it under the terms of the GNU General Public License version 2 9 as published by the Free Software Foundation. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 14 15 See the GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 20 */ 21 //------------------------------------------------------------------------- 22 // 23 // Nuked OPL3 emulator. 24 // Thanks: 25 // MAME Development Team(Jarek Burczynski, Tatsuyuki Satoh): 26 // Feedback and Rhythm part calculation information. 27 // forums.submarine.org.uk(carbon14, opl3): 28 // Tremolo and phase generator calculation information. 29 // OPLx decapsulated(Matthew Gambrell, Olli Niemitalo): 30 // OPL2 ROMs. 31 // siliconpr0n.org(John McMaster, digshadow): 32 // YMF262 and VRC VII decaps and die shots. 33 // 34 // version: 1.8, with stereo extension 35 // 36 37 #include <stdio.h> 38 #include <stdlib.h> 39 #include <string.h> 40 #include "opl3.h" 41 42 #if OPL_ENABLE_STEREOEXT && !defined OPL_SIN 43 #ifndef _USE_MATH_DEFINES 44 #define _USE_MATH_DEFINES 1 45 #endif 46 #include <math.h> 47 /* input: [0, 256), output: [0, 65536] */ 48 #define OPL_SIN(x) ((int32_t)(sin((x) * M_PI / 512.0) * 65536.0)) 49 #endif 50 51 /* Quirk: Some FM channels are output one sample later on the left side than the right. */ 52 #ifndef OPL_QUIRK_CHANNELSAMPLEDELAY 53 #define OPL_QUIRK_CHANNELSAMPLEDELAY (!OPL_ENABLE_STEREOEXT) 54 #endif 55 56 #define RSM_FRAC 10 57 58 /* Channel types */ 59 60 enum { 61 ch_2op = 0, 62 ch_4op = 1, 63 ch_4op2 = 2, 64 ch_drum = 3 65 }; 66 67 /* Envelope key types */ 68 69 enum { 70 egk_norm = 0x01, 71 egk_drum = 0x02 72 }; 73 74 75 /* 76 logsin table 77 */ 78 79 static const uint16_t logsinrom[256] = { 80 0x859, 0x6c3, 0x607, 0x58b, 0x52e, 0x4e4, 0x4a6, 0x471, 81 0x443, 0x41a, 0x3f5, 0x3d3, 0x3b5, 0x398, 0x37e, 0x365, 82 0x34e, 0x339, 0x324, 0x311, 0x2ff, 0x2ed, 0x2dc, 0x2cd, 83 0x2bd, 0x2af, 0x2a0, 0x293, 0x286, 0x279, 0x26d, 0x261, 84 0x256, 0x24b, 0x240, 0x236, 0x22c, 0x222, 0x218, 0x20f, 85 0x206, 0x1fd, 0x1f5, 0x1ec, 0x1e4, 0x1dc, 0x1d4, 0x1cd, 86 0x1c5, 0x1be, 0x1b7, 0x1b0, 0x1a9, 0x1a2, 0x19b, 0x195, 87 0x18f, 0x188, 0x182, 0x17c, 0x177, 0x171, 0x16b, 0x166, 88 0x160, 0x15b, 0x155, 0x150, 0x14b, 0x146, 0x141, 0x13c, 89 0x137, 0x133, 0x12e, 0x129, 0x125, 0x121, 0x11c, 0x118, 90 0x114, 0x10f, 0x10b, 0x107, 0x103, 0x0ff, 0x0fb, 0x0f8, 91 0x0f4, 0x0f0, 0x0ec, 0x0e9, 0x0e5, 0x0e2, 0x0de, 0x0db, 92 0x0d7, 0x0d4, 0x0d1, 0x0cd, 0x0ca, 0x0c7, 0x0c4, 0x0c1, 93 0x0be, 0x0bb, 0x0b8, 0x0b5, 0x0b2, 0x0af, 0x0ac, 0x0a9, 94 0x0a7, 0x0a4, 0x0a1, 0x09f, 0x09c, 0x099, 0x097, 0x094, 95 0x092, 0x08f, 0x08d, 0x08a, 0x088, 0x086, 0x083, 0x081, 96 0x07f, 0x07d, 0x07a, 0x078, 0x076, 0x074, 0x072, 0x070, 97 0x06e, 0x06c, 0x06a, 0x068, 0x066, 0x064, 0x062, 0x060, 98 0x05e, 0x05c, 0x05b, 0x059, 0x057, 0x055, 0x053, 0x052, 99 0x050, 0x04e, 0x04d, 0x04b, 0x04a, 0x048, 0x046, 0x045, 100 0x043, 0x042, 0x040, 0x03f, 0x03e, 0x03c, 0x03b, 0x039, 101 0x038, 0x037, 0x035, 0x034, 0x033, 0x031, 0x030, 0x02f, 102 0x02e, 0x02d, 0x02b, 0x02a, 0x029, 0x028, 0x027, 0x026, 103 0x025, 0x024, 0x023, 0x022, 0x021, 0x020, 0x01f, 0x01e, 104 0x01d, 0x01c, 0x01b, 0x01a, 0x019, 0x018, 0x017, 0x017, 105 0x016, 0x015, 0x014, 0x014, 0x013, 0x012, 0x011, 0x011, 106 0x010, 0x00f, 0x00f, 0x00e, 0x00d, 0x00d, 0x00c, 0x00c, 107 0x00b, 0x00a, 0x00a, 0x009, 0x009, 0x008, 0x008, 0x007, 108 0x007, 0x007, 0x006, 0x006, 0x005, 0x005, 0x005, 0x004, 109 0x004, 0x004, 0x003, 0x003, 0x003, 0x002, 0x002, 0x002, 110 0x002, 0x001, 0x001, 0x001, 0x001, 0x001, 0x001, 0x001, 111 0x000, 0x000, 0x000, 0x000, 0x000, 0x000, 0x000, 0x000 112 }; 113 114 /* 115 exp table 116 */ 117 118 static const uint16_t exprom[256] = { 119 0x7fa, 0x7f5, 0x7ef, 0x7ea, 0x7e4, 0x7df, 0x7da, 0x7d4, 120 0x7cf, 0x7c9, 0x7c4, 0x7bf, 0x7b9, 0x7b4, 0x7ae, 0x7a9, 121 0x7a4, 0x79f, 0x799, 0x794, 0x78f, 0x78a, 0x784, 0x77f, 122 0x77a, 0x775, 0x770, 0x76a, 0x765, 0x760, 0x75b, 0x756, 123 0x751, 0x74c, 0x747, 0x742, 0x73d, 0x738, 0x733, 0x72e, 124 0x729, 0x724, 0x71f, 0x71a, 0x715, 0x710, 0x70b, 0x706, 125 0x702, 0x6fd, 0x6f8, 0x6f3, 0x6ee, 0x6e9, 0x6e5, 0x6e0, 126 0x6db, 0x6d6, 0x6d2, 0x6cd, 0x6c8, 0x6c4, 0x6bf, 0x6ba, 127 0x6b5, 0x6b1, 0x6ac, 0x6a8, 0x6a3, 0x69e, 0x69a, 0x695, 128 0x691, 0x68c, 0x688, 0x683, 0x67f, 0x67a, 0x676, 0x671, 129 0x66d, 0x668, 0x664, 0x65f, 0x65b, 0x657, 0x652, 0x64e, 130 0x649, 0x645, 0x641, 0x63c, 0x638, 0x634, 0x630, 0x62b, 131 0x627, 0x623, 0x61e, 0x61a, 0x616, 0x612, 0x60e, 0x609, 132 0x605, 0x601, 0x5fd, 0x5f9, 0x5f5, 0x5f0, 0x5ec, 0x5e8, 133 0x5e4, 0x5e0, 0x5dc, 0x5d8, 0x5d4, 0x5d0, 0x5cc, 0x5c8, 134 0x5c4, 0x5c0, 0x5bc, 0x5b8, 0x5b4, 0x5b0, 0x5ac, 0x5a8, 135 0x5a4, 0x5a0, 0x59c, 0x599, 0x595, 0x591, 0x58d, 0x589, 136 0x585, 0x581, 0x57e, 0x57a, 0x576, 0x572, 0x56f, 0x56b, 137 0x567, 0x563, 0x560, 0x55c, 0x558, 0x554, 0x551, 0x54d, 138 0x549, 0x546, 0x542, 0x53e, 0x53b, 0x537, 0x534, 0x530, 139 0x52c, 0x529, 0x525, 0x522, 0x51e, 0x51b, 0x517, 0x514, 140 0x510, 0x50c, 0x509, 0x506, 0x502, 0x4ff, 0x4fb, 0x4f8, 141 0x4f4, 0x4f1, 0x4ed, 0x4ea, 0x4e7, 0x4e3, 0x4e0, 0x4dc, 142 0x4d9, 0x4d6, 0x4d2, 0x4cf, 0x4cc, 0x4c8, 0x4c5, 0x4c2, 143 0x4be, 0x4bb, 0x4b8, 0x4b5, 0x4b1, 0x4ae, 0x4ab, 0x4a8, 144 0x4a4, 0x4a1, 0x49e, 0x49b, 0x498, 0x494, 0x491, 0x48e, 145 0x48b, 0x488, 0x485, 0x482, 0x47e, 0x47b, 0x478, 0x475, 146 0x472, 0x46f, 0x46c, 0x469, 0x466, 0x463, 0x460, 0x45d, 147 0x45a, 0x457, 0x454, 0x451, 0x44e, 0x44b, 0x448, 0x445, 148 0x442, 0x43f, 0x43c, 0x439, 0x436, 0x433, 0x430, 0x42d, 149 0x42a, 0x428, 0x425, 0x422, 0x41f, 0x41c, 0x419, 0x416, 150 0x414, 0x411, 0x40e, 0x40b, 0x408, 0x406, 0x403, 0x400 151 }; 152 153 /* 154 freq mult table multiplied by 2 155 156 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 10, 12, 12, 15, 15 157 */ 158 159 static const uint8_t mt[16] = { 160 1, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 20, 24, 24, 30, 30 161 }; 162 163 /* 164 ksl table 165 */ 166 167 static const uint8_t kslrom[16] = { 168 0, 32, 40, 45, 48, 51, 53, 55, 56, 58, 59, 60, 61, 62, 63, 64 169 }; 170 171 static const uint8_t kslshift[4] = { 172 8, 1, 2, 0 173 }; 174 175 /* 176 envelope generator constants 177 */ 178 179 static const uint8_t eg_incstep[4][4] = { 180 { 0, 0, 0, 0 }, 181 { 1, 0, 0, 0 }, 182 { 1, 0, 1, 0 }, 183 { 1, 1, 1, 0 } 184 }; 185 186 /* 187 address decoding 188 */ 189 190 static const int8_t ad_slot[0x20] = { 191 0, 1, 2, 3, 4, 5, -1, -1, 6, 7, 8, 9, 10, 11, -1, -1, 192 12, 13, 14, 15, 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 193 }; 194 195 static const uint8_t ch_slot[18] = { 196 0, 1, 2, 6, 7, 8, 12, 13, 14, 18, 19, 20, 24, 25, 26, 30, 31, 32 197 }; 198 199 #if OPL_ENABLE_STEREOEXT 200 /* 201 stereo extension panning table 202 */ 203 204 static int32_t panpot_lut[256]; 205 static uint8_t panpot_lut_build = 0; 206 #endif 207 208 /* 209 Envelope generator 210 */ 211 212 typedef int16_t(*envelope_sinfunc)(uint16_t phase, uint16_t envelope); 213 typedef void(*envelope_genfunc)(opl3_slot *slott); 214 215 static int16_t OPL3_EnvelopeCalcExp(uint32_t level) 216 { 217 if (level > 0x1fff) 218 { 219 level = 0x1fff; 220 } 221 return (exprom[level & 0xffu] << 1) >> (level >> 8); 222 } 223 224 static int16_t OPL3_EnvelopeCalcSin0(uint16_t phase, uint16_t envelope) 225 { 226 uint16_t out = 0; 227 uint16_t neg = 0; 228 phase &= 0x3ff; 229 if (phase & 0x200) 230 { 231 neg = 0xffff; 232 } 233 if (phase & 0x100) 234 { 235 out = logsinrom[(phase & 0xffu) ^ 0xffu]; 236 } 237 else 238 { 239 out = logsinrom[phase & 0xffu]; 240 } 241 return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg; 242 } 243 244 static int16_t OPL3_EnvelopeCalcSin1(uint16_t phase, uint16_t envelope) 245 { 246 uint16_t out = 0; 247 phase &= 0x3ff; 248 if (phase & 0x200) 249 { 250 out = 0x1000; 251 } 252 else if (phase & 0x100) 253 { 254 out = logsinrom[(phase & 0xffu) ^ 0xffu]; 255 } 256 else 257 { 258 out = logsinrom[phase & 0xffu]; 259 } 260 return OPL3_EnvelopeCalcExp(out + (envelope << 3)); 261 } 262 263 static int16_t OPL3_EnvelopeCalcSin2(uint16_t phase, uint16_t envelope) 264 { 265 uint16_t out = 0; 266 phase &= 0x3ff; 267 if (phase & 0x100) 268 { 269 out = logsinrom[(phase & 0xffu) ^ 0xffu]; 270 } 271 else 272 { 273 out = logsinrom[phase & 0xffu]; 274 } 275 return OPL3_EnvelopeCalcExp(out + (envelope << 3)); 276 } 277 278 static int16_t OPL3_EnvelopeCalcSin3(uint16_t phase, uint16_t envelope) 279 { 280 uint16_t out = 0; 281 phase &= 0x3ff; 282 if (phase & 0x100) 283 { 284 out = 0x1000; 285 } 286 else 287 { 288 out = logsinrom[phase & 0xffu]; 289 } 290 return OPL3_EnvelopeCalcExp(out + (envelope << 3)); 291 } 292 293 static int16_t OPL3_EnvelopeCalcSin4(uint16_t phase, uint16_t envelope) 294 { 295 uint16_t out = 0; 296 uint16_t neg = 0; 297 phase &= 0x3ff; 298 if ((phase & 0x300) == 0x100) 299 { 300 neg = 0xffff; 301 } 302 if (phase & 0x200) 303 { 304 out = 0x1000; 305 } 306 else if (phase & 0x80) 307 { 308 out = logsinrom[((phase ^ 0xffu) << 1u) & 0xffu]; 309 } 310 else 311 { 312 out = logsinrom[(phase << 1u) & 0xffu]; 313 } 314 return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg; 315 } 316 317 static int16_t OPL3_EnvelopeCalcSin5(uint16_t phase, uint16_t envelope) 318 { 319 uint16_t out = 0; 320 phase &= 0x3ff; 321 if (phase & 0x200) 322 { 323 out = 0x1000; 324 } 325 else if (phase & 0x80) 326 { 327 out = logsinrom[((phase ^ 0xffu) << 1u) & 0xffu]; 328 } 329 else 330 { 331 out = logsinrom[(phase << 1u) & 0xffu]; 332 } 333 return OPL3_EnvelopeCalcExp(out + (envelope << 3)); 334 } 335 336 static int16_t OPL3_EnvelopeCalcSin6(uint16_t phase, uint16_t envelope) 337 { 338 uint16_t neg = 0; 339 phase &= 0x3ff; 340 if (phase & 0x200) 341 { 342 neg = 0xffff; 343 } 344 return OPL3_EnvelopeCalcExp(envelope << 3) ^ neg; 345 } 346 347 static int16_t OPL3_EnvelopeCalcSin7(uint16_t phase, uint16_t envelope) 348 { 349 uint16_t out = 0; 350 uint16_t neg = 0; 351 phase &= 0x3ff; 352 if (phase & 0x200) 353 { 354 neg = 0xffff; 355 phase = (phase & 0x1ff) ^ 0x1ff; 356 } 357 out = phase << 3; 358 return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg; 359 } 360 361 static const envelope_sinfunc envelope_sin[8] = { 362 OPL3_EnvelopeCalcSin0, 363 OPL3_EnvelopeCalcSin1, 364 OPL3_EnvelopeCalcSin2, 365 OPL3_EnvelopeCalcSin3, 366 OPL3_EnvelopeCalcSin4, 367 OPL3_EnvelopeCalcSin5, 368 OPL3_EnvelopeCalcSin6, 369 OPL3_EnvelopeCalcSin7 370 }; 371 372 enum envelope_gen_num 373 { 374 envelope_gen_num_attack = 0, 375 envelope_gen_num_decay = 1, 376 envelope_gen_num_sustain = 2, 377 envelope_gen_num_release = 3 378 }; 379 380 static void OPL3_EnvelopeUpdateKSL(opl3_slot *slot) 381 { 382 int16_t ksl = (kslrom[slot->channel->f_num >> 6u] << 2) 383 - ((0x08 - slot->channel->block) << 5); 384 if (ksl < 0) 385 { 386 ksl = 0; 387 } 388 slot->eg_ksl = (uint8_t)ksl; 389 } 390 391 static void OPL3_EnvelopeCalc(opl3_slot *slot) 392 { 393 uint8_t nonzero; 394 uint8_t rate; 395 uint8_t rate_hi; 396 uint8_t rate_lo; 397 uint8_t reg_rate = 0; 398 uint8_t ks; 399 uint8_t eg_shift, shift; 400 uint16_t eg_rout; 401 int16_t eg_inc; 402 uint8_t eg_off; 403 uint8_t reset = 0; 404 slot->eg_out = slot->eg_rout + (slot->reg_tl << 2) 405 + (slot->eg_ksl >> kslshift[slot->reg_ksl]) + *slot->trem; 406 if (slot->key && slot->eg_gen == envelope_gen_num_release) 407 { 408 reset = 1; 409 reg_rate = slot->reg_ar; 410 } 411 else 412 { 413 switch (slot->eg_gen) 414 { 415 case envelope_gen_num_attack: 416 reg_rate = slot->reg_ar; 417 break; 418 case envelope_gen_num_decay: 419 reg_rate = slot->reg_dr; 420 break; 421 case envelope_gen_num_sustain: 422 if (!slot->reg_type) 423 { 424 reg_rate = slot->reg_rr; 425 } 426 break; 427 case envelope_gen_num_release: 428 reg_rate = slot->reg_rr; 429 break; 430 } 431 } 432 slot->pg_reset = reset; 433 ks = slot->channel->ksv >> ((slot->reg_ksr ^ 1) << 1); 434 nonzero = (reg_rate != 0); 435 rate = ks + (reg_rate << 2); 436 rate_hi = rate >> 2; 437 rate_lo = rate & 0x03; 438 if (rate_hi & 0x10) 439 { 440 rate_hi = 0x0f; 441 } 442 eg_shift = rate_hi + slot->chip->eg_add; 443 shift = 0; 444 if (nonzero) 445 { 446 if (rate_hi < 12) 447 { 448 if (slot->chip->eg_state) 449 { 450 switch (eg_shift) 451 { 452 case 12: 453 shift = 1; 454 break; 455 case 13: 456 shift = (rate_lo >> 1) & 0x01; 457 break; 458 case 14: 459 shift = rate_lo & 0x01; 460 break; 461 default: 462 break; 463 } 464 } 465 } 466 else 467 { 468 shift = (rate_hi & 0x03) + eg_incstep[rate_lo][slot->chip->timer & 0x03u]; 469 if (shift & 0x04) 470 { 471 shift = 0x03; 472 } 473 if (!shift) 474 { 475 shift = slot->chip->eg_state; 476 } 477 } 478 } 479 eg_rout = slot->eg_rout; 480 eg_inc = 0; 481 eg_off = 0; 482 /* Instant attack */ 483 if (reset && rate_hi == 0x0f) 484 { 485 eg_rout = 0x00; 486 } 487 /* Envelope off */ 488 if ((slot->eg_rout & 0x1f8) == 0x1f8) 489 { 490 eg_off = 1; 491 } 492 if (slot->eg_gen != envelope_gen_num_attack && !reset && eg_off) 493 { 494 eg_rout = 0x1ff; 495 } 496 switch (slot->eg_gen) 497 { 498 case envelope_gen_num_attack: 499 if (!slot->eg_rout) 500 { 501 slot->eg_gen = envelope_gen_num_decay; 502 } 503 else if (slot->key && shift > 0 && rate_hi != 0x0f) 504 { 505 eg_inc = ~slot->eg_rout >> (4 - shift); 506 } 507 break; 508 case envelope_gen_num_decay: 509 if ((slot->eg_rout >> 4) == slot->reg_sl) 510 { 511 slot->eg_gen = envelope_gen_num_sustain; 512 } 513 else if (!eg_off && !reset && shift > 0) 514 { 515 eg_inc = 1 << (shift - 1); 516 } 517 break; 518 case envelope_gen_num_sustain: 519 case envelope_gen_num_release: 520 if (!eg_off && !reset && shift > 0) 521 { 522 eg_inc = 1 << (shift - 1); 523 } 524 break; 525 } 526 slot->eg_rout = (eg_rout + eg_inc) & 0x1ff; 527 /* Key off */ 528 if (reset) 529 { 530 slot->eg_gen = envelope_gen_num_attack; 531 } 532 if (!slot->key) 533 { 534 slot->eg_gen = envelope_gen_num_release; 535 } 536 } 537 538 static void OPL3_EnvelopeKeyOn(opl3_slot *slot, uint8_t type) 539 { 540 slot->key |= type; 541 } 542 543 static void OPL3_EnvelopeKeyOff(opl3_slot *slot, uint8_t type) 544 { 545 slot->key &= ~type; 546 } 547 548 /* 549 Phase Generator 550 */ 551 552 static void OPL3_PhaseGenerate(opl3_slot *slot) 553 { 554 opl3_chip *chip; 555 uint16_t f_num; 556 uint32_t basefreq; 557 uint8_t rm_xor, n_bit; 558 uint32_t noise; 559 uint16_t phase; 560 561 chip = slot->chip; 562 f_num = slot->channel->f_num; 563 if (slot->reg_vib) 564 { 565 int8_t range; 566 uint8_t vibpos; 567 568 range = (f_num >> 7) & 7; 569 vibpos = slot->chip->vibpos; 570 571 if (!(vibpos & 3)) 572 { 573 range = 0; 574 } 575 else if (vibpos & 1) 576 { 577 range >>= 1; 578 } 579 range >>= slot->chip->vibshift; 580 581 if (vibpos & 4) 582 { 583 range = -range; 584 } 585 f_num += range; 586 } 587 basefreq = (f_num << slot->channel->block) >> 1; 588 phase = (uint16_t)(slot->pg_phase >> 9); 589 if (slot->pg_reset) 590 { 591 slot->pg_phase = 0; 592 } 593 slot->pg_phase += (basefreq * mt[slot->reg_mult]) >> 1; 594 /* Rhythm mode */ 595 noise = chip->noise; 596 slot->pg_phase_out = phase; 597 if (slot->slot_num == 13) /* hh */ 598 { 599 chip->rm_hh_bit2 = (phase >> 2) & 1; 600 chip->rm_hh_bit3 = (phase >> 3) & 1; 601 chip->rm_hh_bit7 = (phase >> 7) & 1; 602 chip->rm_hh_bit8 = (phase >> 8) & 1; 603 } 604 if (slot->slot_num == 17 && (chip->rhy & 0x20)) /* tc */ 605 { 606 chip->rm_tc_bit3 = (phase >> 3) & 1; 607 chip->rm_tc_bit5 = (phase >> 5) & 1; 608 } 609 if (chip->rhy & 0x20) 610 { 611 rm_xor = (chip->rm_hh_bit2 ^ chip->rm_hh_bit7) 612 | (chip->rm_hh_bit3 ^ chip->rm_tc_bit5) 613 | (chip->rm_tc_bit3 ^ chip->rm_tc_bit5); 614 switch (slot->slot_num) 615 { 616 case 13: /* hh */ 617 slot->pg_phase_out = rm_xor << 9; 618 if (rm_xor ^ (noise & 1)) 619 { 620 slot->pg_phase_out |= 0xd0; 621 } 622 else 623 { 624 slot->pg_phase_out |= 0x34; 625 } 626 break; 627 case 16: /* sd */ 628 slot->pg_phase_out = (chip->rm_hh_bit8 << 9) 629 | ((chip->rm_hh_bit8 ^ (noise & 1)) << 8); 630 break; 631 case 17: /* tc */ 632 slot->pg_phase_out = (rm_xor << 9) | 0x80; 633 break; 634 default: 635 break; 636 } 637 } 638 n_bit = ((noise >> 14) ^ noise) & 0x01; 639 chip->noise = (noise >> 1) | (n_bit << 22); 640 } 641 642 /* 643 Slot 644 */ 645 646 static void OPL3_SlotWrite20(opl3_slot *slot, uint8_t data) 647 { 648 if ((data >> 7) & 0x01) 649 { 650 slot->trem = &slot->chip->tremolo; 651 } 652 else 653 { 654 slot->trem = (uint8_t*)&slot->chip->zeromod; 655 } 656 slot->reg_vib = (data >> 6) & 0x01; 657 slot->reg_type = (data >> 5) & 0x01; 658 slot->reg_ksr = (data >> 4) & 0x01; 659 slot->reg_mult = data & 0x0f; 660 } 661 662 static void OPL3_SlotWrite40(opl3_slot *slot, uint8_t data) 663 { 664 slot->reg_ksl = (data >> 6) & 0x03; 665 slot->reg_tl = data & 0x3f; 666 OPL3_EnvelopeUpdateKSL(slot); 667 } 668 669 static void OPL3_SlotWrite60(opl3_slot *slot, uint8_t data) 670 { 671 slot->reg_ar = (data >> 4) & 0x0f; 672 slot->reg_dr = data & 0x0f; 673 } 674 675 static void OPL3_SlotWrite80(opl3_slot *slot, uint8_t data) 676 { 677 slot->reg_sl = (data >> 4) & 0x0f; 678 if (slot->reg_sl == 0x0f) 679 { 680 slot->reg_sl = 0x1f; 681 } 682 slot->reg_rr = data & 0x0f; 683 } 684 685 static void OPL3_SlotWriteE0(opl3_slot *slot, uint8_t data) 686 { 687 slot->reg_wf = data & 0x07; 688 if (slot->chip->newm == 0x00) 689 { 690 slot->reg_wf &= 0x03; 691 } 692 } 693 694 static void OPL3_SlotGenerate(opl3_slot *slot) 695 { 696 slot->out = envelope_sin[slot->reg_wf](slot->pg_phase_out + *slot->mod, slot->eg_out); 697 } 698 699 static void OPL3_SlotCalcFB(opl3_slot *slot) 700 { 701 if (slot->channel->fb != 0x00) 702 { 703 slot->fbmod = (slot->prout + slot->out) >> (0x09 - slot->channel->fb); 704 } 705 else 706 { 707 slot->fbmod = 0; 708 } 709 slot->prout = slot->out; 710 } 711 712 /* 713 Channel 714 */ 715 716 static void OPL3_ChannelSetupAlg(opl3_channel *channel); 717 718 static void OPL3_ChannelUpdateRhythm(opl3_chip *chip, uint8_t data) 719 { 720 opl3_channel *channel6; 721 opl3_channel *channel7; 722 opl3_channel *channel8; 723 uint8_t chnum; 724 725 chip->rhy = data & 0x3f; 726 if (chip->rhy & 0x20) 727 { 728 channel6 = &chip->channel[6]; 729 channel7 = &chip->channel[7]; 730 channel8 = &chip->channel[8]; 731 channel6->out[0] = &channel6->slots[1]->out; 732 channel6->out[1] = &channel6->slots[1]->out; 733 channel6->out[2] = &chip->zeromod; 734 channel6->out[3] = &chip->zeromod; 735 channel7->out[0] = &channel7->slots[0]->out; 736 channel7->out[1] = &channel7->slots[0]->out; 737 channel7->out[2] = &channel7->slots[1]->out; 738 channel7->out[3] = &channel7->slots[1]->out; 739 channel8->out[0] = &channel8->slots[0]->out; 740 channel8->out[1] = &channel8->slots[0]->out; 741 channel8->out[2] = &channel8->slots[1]->out; 742 channel8->out[3] = &channel8->slots[1]->out; 743 for (chnum = 6; chnum < 9; chnum++) 744 { 745 chip->channel[chnum].chtype = ch_drum; 746 } 747 OPL3_ChannelSetupAlg(channel6); 748 OPL3_ChannelSetupAlg(channel7); 749 OPL3_ChannelSetupAlg(channel8); 750 /* hh */ 751 if (chip->rhy & 0x01) 752 { 753 OPL3_EnvelopeKeyOn(channel7->slots[0], egk_drum); 754 } 755 else 756 { 757 OPL3_EnvelopeKeyOff(channel7->slots[0], egk_drum); 758 } 759 /* tc */ 760 if (chip->rhy & 0x02) 761 { 762 OPL3_EnvelopeKeyOn(channel8->slots[1], egk_drum); 763 } 764 else 765 { 766 OPL3_EnvelopeKeyOff(channel8->slots[1], egk_drum); 767 } 768 /* tom */ 769 if (chip->rhy & 0x04) 770 { 771 OPL3_EnvelopeKeyOn(channel8->slots[0], egk_drum); 772 } 773 else 774 { 775 OPL3_EnvelopeKeyOff(channel8->slots[0], egk_drum); 776 } 777 /* sd */ 778 if (chip->rhy & 0x08) 779 { 780 OPL3_EnvelopeKeyOn(channel7->slots[1], egk_drum); 781 } 782 else 783 { 784 OPL3_EnvelopeKeyOff(channel7->slots[1], egk_drum); 785 } 786 /* bd */ 787 if (chip->rhy & 0x10) 788 { 789 OPL3_EnvelopeKeyOn(channel6->slots[0], egk_drum); 790 OPL3_EnvelopeKeyOn(channel6->slots[1], egk_drum); 791 } 792 else 793 { 794 OPL3_EnvelopeKeyOff(channel6->slots[0], egk_drum); 795 OPL3_EnvelopeKeyOff(channel6->slots[1], egk_drum); 796 } 797 } 798 else 799 { 800 for (chnum = 6; chnum < 9; chnum++) 801 { 802 chip->channel[chnum].chtype = ch_2op; 803 OPL3_ChannelSetupAlg(&chip->channel[chnum]); 804 OPL3_EnvelopeKeyOff(chip->channel[chnum].slots[0], egk_drum); 805 OPL3_EnvelopeKeyOff(chip->channel[chnum].slots[1], egk_drum); 806 } 807 } 808 } 809 810 static void OPL3_ChannelWriteA0(opl3_channel *channel, uint8_t data) 811 { 812 if (channel->chip->newm && channel->chtype == ch_4op2) 813 { 814 return; 815 } 816 channel->f_num = (channel->f_num & 0x300) | data; 817 channel->ksv = (channel->block << 1) 818 | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01); 819 OPL3_EnvelopeUpdateKSL(channel->slots[0]); 820 OPL3_EnvelopeUpdateKSL(channel->slots[1]); 821 if (channel->chip->newm && channel->chtype == ch_4op) 822 { 823 channel->pair->f_num = channel->f_num; 824 channel->pair->ksv = channel->ksv; 825 OPL3_EnvelopeUpdateKSL(channel->pair->slots[0]); 826 OPL3_EnvelopeUpdateKSL(channel->pair->slots[1]); 827 } 828 } 829 830 static void OPL3_ChannelWriteB0(opl3_channel *channel, uint8_t data) 831 { 832 if (channel->chip->newm && channel->chtype == ch_4op2) 833 { 834 return; 835 } 836 channel->f_num = (channel->f_num & 0xff) | ((data & 0x03) << 8); 837 channel->block = (data >> 2) & 0x07; 838 channel->ksv = (channel->block << 1) 839 | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01); 840 OPL3_EnvelopeUpdateKSL(channel->slots[0]); 841 OPL3_EnvelopeUpdateKSL(channel->slots[1]); 842 if (channel->chip->newm && channel->chtype == ch_4op) 843 { 844 channel->pair->f_num = channel->f_num; 845 channel->pair->block = channel->block; 846 channel->pair->ksv = channel->ksv; 847 OPL3_EnvelopeUpdateKSL(channel->pair->slots[0]); 848 OPL3_EnvelopeUpdateKSL(channel->pair->slots[1]); 849 } 850 } 851 852 static void OPL3_ChannelSetupAlg(opl3_channel *channel) 853 { 854 if (channel->chtype == ch_drum) 855 { 856 if (channel->ch_num == 7 || channel->ch_num == 8) 857 { 858 channel->slots[0]->mod = &channel->chip->zeromod; 859 channel->slots[1]->mod = &channel->chip->zeromod; 860 return; 861 } 862 switch (channel->alg & 0x01) 863 { 864 case 0x00: 865 channel->slots[0]->mod = &channel->slots[0]->fbmod; 866 channel->slots[1]->mod = &channel->slots[0]->out; 867 break; 868 case 0x01: 869 channel->slots[0]->mod = &channel->slots[0]->fbmod; 870 channel->slots[1]->mod = &channel->chip->zeromod; 871 break; 872 } 873 return; 874 } 875 if (channel->alg & 0x08) 876 { 877 return; 878 } 879 if (channel->alg & 0x04) 880 { 881 channel->pair->out[0] = &channel->chip->zeromod; 882 channel->pair->out[1] = &channel->chip->zeromod; 883 channel->pair->out[2] = &channel->chip->zeromod; 884 channel->pair->out[3] = &channel->chip->zeromod; 885 switch (channel->alg & 0x03) 886 { 887 case 0x00: 888 channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod; 889 channel->pair->slots[1]->mod = &channel->pair->slots[0]->out; 890 channel->slots[0]->mod = &channel->pair->slots[1]->out; 891 channel->slots[1]->mod = &channel->slots[0]->out; 892 channel->out[0] = &channel->slots[1]->out; 893 channel->out[1] = &channel->chip->zeromod; 894 channel->out[2] = &channel->chip->zeromod; 895 channel->out[3] = &channel->chip->zeromod; 896 break; 897 case 0x01: 898 channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod; 899 channel->pair->slots[1]->mod = &channel->pair->slots[0]->out; 900 channel->slots[0]->mod = &channel->chip->zeromod; 901 channel->slots[1]->mod = &channel->slots[0]->out; 902 channel->out[0] = &channel->pair->slots[1]->out; 903 channel->out[1] = &channel->slots[1]->out; 904 channel->out[2] = &channel->chip->zeromod; 905 channel->out[3] = &channel->chip->zeromod; 906 break; 907 case 0x02: 908 channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod; 909 channel->pair->slots[1]->mod = &channel->chip->zeromod; 910 channel->slots[0]->mod = &channel->pair->slots[1]->out; 911 channel->slots[1]->mod = &channel->slots[0]->out; 912 channel->out[0] = &channel->pair->slots[0]->out; 913 channel->out[1] = &channel->slots[1]->out; 914 channel->out[2] = &channel->chip->zeromod; 915 channel->out[3] = &channel->chip->zeromod; 916 break; 917 case 0x03: 918 channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod; 919 channel->pair->slots[1]->mod = &channel->chip->zeromod; 920 channel->slots[0]->mod = &channel->pair->slots[1]->out; 921 channel->slots[1]->mod = &channel->chip->zeromod; 922 channel->out[0] = &channel->pair->slots[0]->out; 923 channel->out[1] = &channel->slots[0]->out; 924 channel->out[2] = &channel->slots[1]->out; 925 channel->out[3] = &channel->chip->zeromod; 926 break; 927 } 928 } 929 else 930 { 931 switch (channel->alg & 0x01) 932 { 933 case 0x00: 934 channel->slots[0]->mod = &channel->slots[0]->fbmod; 935 channel->slots[1]->mod = &channel->slots[0]->out; 936 channel->out[0] = &channel->slots[1]->out; 937 channel->out[1] = &channel->chip->zeromod; 938 channel->out[2] = &channel->chip->zeromod; 939 channel->out[3] = &channel->chip->zeromod; 940 break; 941 case 0x01: 942 channel->slots[0]->mod = &channel->slots[0]->fbmod; 943 channel->slots[1]->mod = &channel->chip->zeromod; 944 channel->out[0] = &channel->slots[0]->out; 945 channel->out[1] = &channel->slots[1]->out; 946 channel->out[2] = &channel->chip->zeromod; 947 channel->out[3] = &channel->chip->zeromod; 948 break; 949 } 950 } 951 } 952 953 static void OPL3_ChannelWriteC0(opl3_channel *channel, uint8_t data) 954 { 955 channel->fb = (data & 0x0e) >> 1; 956 channel->con = data & 0x01; 957 channel->alg = channel->con; 958 if (channel->chip->newm) 959 { 960 if (channel->chtype == ch_4op) 961 { 962 channel->pair->alg = 0x04 | (channel->con << 1) | (channel->pair->con); 963 channel->alg = 0x08; 964 OPL3_ChannelSetupAlg(channel->pair); 965 } 966 else if (channel->chtype == ch_4op2) 967 { 968 channel->alg = 0x04 | (channel->pair->con << 1) | (channel->con); 969 channel->pair->alg = 0x08; 970 OPL3_ChannelSetupAlg(channel); 971 } 972 else 973 { 974 OPL3_ChannelSetupAlg(channel); 975 } 976 } 977 else 978 { 979 OPL3_ChannelSetupAlg(channel); 980 } 981 if (channel->chip->newm) 982 { 983 channel->cha = ((data >> 4) & 0x01) ? ~0 : 0; 984 channel->chb = ((data >> 5) & 0x01) ? ~0 : 0; 985 } 986 else 987 { 988 channel->cha = channel->chb = (uint16_t)~0; 989 } 990 #if OPL_ENABLE_STEREOEXT 991 if (!channel->chip->stereoext) 992 { 993 channel->leftpan = channel->cha << 16; 994 channel->rightpan = channel->chb << 16; 995 } 996 #endif 997 } 998 999 #if OPL_ENABLE_STEREOEXT 1000 static void OPL3_ChannelWriteD0(opl3_channel* channel, uint8_t data) 1001 { 1002 if (channel->chip->stereoext) 1003 { 1004 channel->leftpan = panpot_lut[data ^ 0xffu]; 1005 channel->rightpan = panpot_lut[data]; 1006 } 1007 } 1008 #endif 1009 1010 static void OPL3_ChannelKeyOn(opl3_channel *channel) 1011 { 1012 if (channel->chip->newm) 1013 { 1014 if (channel->chtype == ch_4op) 1015 { 1016 OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm); 1017 OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm); 1018 OPL3_EnvelopeKeyOn(channel->pair->slots[0], egk_norm); 1019 OPL3_EnvelopeKeyOn(channel->pair->slots[1], egk_norm); 1020 } 1021 else if (channel->chtype == ch_2op || channel->chtype == ch_drum) 1022 { 1023 OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm); 1024 OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm); 1025 } 1026 } 1027 else 1028 { 1029 OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm); 1030 OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm); 1031 } 1032 } 1033 1034 static void OPL3_ChannelKeyOff(opl3_channel *channel) 1035 { 1036 if (channel->chip->newm) 1037 { 1038 if (channel->chtype == ch_4op) 1039 { 1040 OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm); 1041 OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm); 1042 OPL3_EnvelopeKeyOff(channel->pair->slots[0], egk_norm); 1043 OPL3_EnvelopeKeyOff(channel->pair->slots[1], egk_norm); 1044 } 1045 else if (channel->chtype == ch_2op || channel->chtype == ch_drum) 1046 { 1047 OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm); 1048 OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm); 1049 } 1050 } 1051 else 1052 { 1053 OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm); 1054 OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm); 1055 } 1056 } 1057 1058 static void OPL3_ChannelSet4Op(opl3_chip *chip, uint8_t data) 1059 { 1060 uint8_t bit; 1061 uint8_t chnum; 1062 for (bit = 0; bit < 6; bit++) 1063 { 1064 chnum = bit; 1065 if (bit >= 3) 1066 { 1067 chnum += 9 - 3; 1068 } 1069 if ((data >> bit) & 0x01) 1070 { 1071 chip->channel[chnum].chtype = ch_4op; 1072 chip->channel[chnum + 3u].chtype = ch_4op2; 1073 } 1074 else 1075 { 1076 chip->channel[chnum].chtype = ch_2op; 1077 chip->channel[chnum + 3u].chtype = ch_2op; 1078 } 1079 } 1080 } 1081 1082 static int16_t OPL3_ClipSample(int32_t sample) 1083 { 1084 if (sample > 32767) 1085 { 1086 sample = 32767; 1087 } 1088 else if (sample < -32768) 1089 { 1090 sample = -32768; 1091 } 1092 return (int16_t)sample; 1093 } 1094 1095 static void OPL3_ProcessSlot(opl3_slot *slot) 1096 { 1097 OPL3_SlotCalcFB(slot); 1098 OPL3_EnvelopeCalc(slot); 1099 OPL3_PhaseGenerate(slot); 1100 OPL3_SlotGenerate(slot); 1101 } 1102 1103 void OPL3_Generate(opl3_chip *chip, int16_t *buf) 1104 { 1105 opl3_channel *channel; 1106 opl3_writebuf *writebuf; 1107 int16_t **out; 1108 int32_t mix; 1109 uint8_t ii; 1110 int16_t accm; 1111 uint8_t shift = 0; 1112 1113 buf[1] = OPL3_ClipSample(chip->mixbuff[1]); 1114 1115 #if OPL_QUIRK_CHANNELSAMPLEDELAY 1116 for (ii = 0; ii < 15; ii++) 1117 #else 1118 for (ii = 0; ii < 36; ii++) 1119 #endif 1120 { 1121 OPL3_ProcessSlot(&chip->slot[ii]); 1122 } 1123 1124 mix = 0; 1125 for (ii = 0; ii < 18; ii++) 1126 { 1127 channel = &chip->channel[ii]; 1128 out = channel->out; 1129 accm = *out[0] + *out[1] + *out[2] + *out[3]; 1130 #if OPL_ENABLE_STEREOEXT 1131 mix += (int16_t)((accm * channel->leftpan) >> 16); 1132 #else 1133 mix += (int16_t)(accm & channel->cha); 1134 #endif 1135 } 1136 chip->mixbuff[0] = mix; 1137 1138 #if OPL_QUIRK_CHANNELSAMPLEDELAY 1139 for (ii = 15; ii < 18; ii++) 1140 { 1141 OPL3_ProcessSlot(&chip->slot[ii]); 1142 } 1143 #endif 1144 1145 buf[0] = OPL3_ClipSample(chip->mixbuff[0]); 1146 1147 #if OPL_QUIRK_CHANNELSAMPLEDELAY 1148 for (ii = 18; ii < 33; ii++) 1149 { 1150 OPL3_ProcessSlot(&chip->slot[ii]); 1151 } 1152 #endif 1153 1154 mix = 0; 1155 for (ii = 0; ii < 18; ii++) 1156 { 1157 channel = &chip->channel[ii]; 1158 out = channel->out; 1159 accm = *out[0] + *out[1] + *out[2] + *out[3]; 1160 #if OPL_ENABLE_STEREOEXT 1161 mix += (int16_t)((accm * channel->rightpan) >> 16); 1162 #else 1163 mix += (int16_t)(accm & channel->chb); 1164 #endif 1165 } 1166 chip->mixbuff[1] = mix; 1167 1168 #if OPL_QUIRK_CHANNELSAMPLEDELAY 1169 for (ii = 33; ii < 36; ii++) 1170 { 1171 OPL3_ProcessSlot(&chip->slot[ii]); 1172 } 1173 #endif 1174 1175 if ((chip->timer & 0x3f) == 0x3f) 1176 { 1177 chip->tremolopos = (chip->tremolopos + 1) % 210; 1178 } 1179 if (chip->tremolopos < 105) 1180 { 1181 chip->tremolo = chip->tremolopos >> chip->tremoloshift; 1182 } 1183 else 1184 { 1185 chip->tremolo = (210 - chip->tremolopos) >> chip->tremoloshift; 1186 } 1187 1188 if ((chip->timer & 0x3ff) == 0x3ff) 1189 { 1190 chip->vibpos = (chip->vibpos + 1) & 7; 1191 } 1192 1193 chip->timer++; 1194 1195 chip->eg_add = 0; 1196 if (chip->eg_timer) 1197 { 1198 while (shift < 36 && ((chip->eg_timer >> shift) & 1) == 0) 1199 { 1200 shift++; 1201 } 1202 if (shift > 12) 1203 { 1204 chip->eg_add = 0; 1205 } 1206 else 1207 { 1208 chip->eg_add = shift + 1; 1209 } 1210 } 1211 1212 if (chip->eg_timerrem || chip->eg_state) 1213 { 1214 if (chip->eg_timer == 0xfffffffff) 1215 { 1216 chip->eg_timer = 0; 1217 chip->eg_timerrem = 1; 1218 } 1219 else 1220 { 1221 chip->eg_timer++; 1222 chip->eg_timerrem = 0; 1223 } 1224 } 1225 1226 chip->eg_state ^= 1; 1227 1228 while ((writebuf = &chip->writebuf[chip->writebuf_cur]), writebuf->time <= chip->writebuf_samplecnt) 1229 { 1230 if (!(writebuf->reg & 0x200)) 1231 { 1232 break; 1233 } 1234 writebuf->reg &= 0x1ff; 1235 OPL3_WriteReg(chip, writebuf->reg, writebuf->data); 1236 chip->writebuf_cur = (chip->writebuf_cur + 1) & (OPL_WRITEBUF_SIZE - 1); 1237 } 1238 chip->writebuf_samplecnt++; 1239 } 1240 1241 void OPL3_GenerateResampled(opl3_chip *chip, int16_t *buf) 1242 { 1243 while (chip->samplecnt >= chip->rateratio) 1244 { 1245 chip->oldsamples[0] = chip->samples[0]; 1246 chip->oldsamples[1] = chip->samples[1]; 1247 OPL3_Generate(chip, chip->samples); 1248 chip->samplecnt -= chip->rateratio; 1249 } 1250 buf[0] = (int16_t)((chip->oldsamples[0] * (chip->rateratio - chip->samplecnt) 1251 + chip->samples[0] * chip->samplecnt) / chip->rateratio); 1252 buf[1] = (int16_t)((chip->oldsamples[1] * (chip->rateratio - chip->samplecnt) 1253 + chip->samples[1] * chip->samplecnt) / chip->rateratio); 1254 chip->samplecnt += 1 << RSM_FRAC; 1255 } 1256 1257 void OPL3_Reset(opl3_chip *chip, uint32_t samplerate) 1258 { 1259 opl3_slot *slot; 1260 opl3_channel *channel; 1261 uint8_t slotnum; 1262 uint8_t channum; 1263 uint8_t local_ch_slot; 1264 1265 memset(chip, 0, sizeof(opl3_chip)); 1266 for (slotnum = 0; slotnum < 36; slotnum++) 1267 { 1268 slot = &chip->slot[slotnum]; 1269 slot->chip = chip; 1270 slot->mod = &chip->zeromod; 1271 slot->eg_rout = 0x1ff; 1272 slot->eg_out = 0x1ff; 1273 slot->eg_gen = envelope_gen_num_release; 1274 slot->trem = (uint8_t*)&chip->zeromod; 1275 slot->slot_num = slotnum; 1276 } 1277 for (channum = 0; channum < 18; channum++) 1278 { 1279 channel = &chip->channel[channum]; 1280 local_ch_slot = ch_slot[channum]; 1281 channel->slots[0] = &chip->slot[local_ch_slot]; 1282 channel->slots[1] = &chip->slot[local_ch_slot + 3u]; 1283 chip->slot[local_ch_slot].channel = channel; 1284 chip->slot[local_ch_slot + 3u].channel = channel; 1285 if ((channum % 9) < 3) 1286 { 1287 channel->pair = &chip->channel[channum + 3u]; 1288 } 1289 else if ((channum % 9) < 6) 1290 { 1291 channel->pair = &chip->channel[channum - 3u]; 1292 } 1293 channel->chip = chip; 1294 channel->out[0] = &chip->zeromod; 1295 channel->out[1] = &chip->zeromod; 1296 channel->out[2] = &chip->zeromod; 1297 channel->out[3] = &chip->zeromod; 1298 channel->chtype = ch_2op; 1299 channel->cha = 0xffff; 1300 channel->chb = 0xffff; 1301 #if OPL_ENABLE_STEREOEXT 1302 channel->leftpan = 0x10000; 1303 channel->rightpan = 0x10000; 1304 #endif 1305 channel->ch_num = channum; 1306 OPL3_ChannelSetupAlg(channel); 1307 } 1308 chip->noise = 1; 1309 chip->rateratio = (samplerate << RSM_FRAC) / 49716; 1310 chip->tremoloshift = 4; 1311 chip->vibshift = 1; 1312 1313 #if OPL_ENABLE_STEREOEXT 1314 if (!panpot_lut_build) 1315 { 1316 int32_t i; 1317 for (i = 0; i < 256; i++) 1318 { 1319 panpot_lut[i] = OPL_SIN(i); 1320 } 1321 panpot_lut_build = 1; 1322 } 1323 #endif 1324 } 1325 1326 void OPL3_WriteReg(opl3_chip *chip, uint16_t reg, uint8_t v) 1327 { 1328 uint8_t high = (reg >> 8) & 0x01; 1329 uint8_t regm = reg & 0xff; 1330 switch (regm & 0xf0) 1331 { 1332 case 0x00: 1333 if (high) 1334 { 1335 switch (regm & 0x0f) 1336 { 1337 case 0x04: 1338 OPL3_ChannelSet4Op(chip, v); 1339 break; 1340 case 0x05: 1341 chip->newm = v & 0x01; 1342 #if OPL_ENABLE_STEREOEXT 1343 chip->stereoext = (v >> 1) & 0x01; 1344 #endif 1345 break; 1346 } 1347 } 1348 else 1349 { 1350 switch (regm & 0x0f) 1351 { 1352 case 0x08: 1353 chip->nts = (v >> 6) & 0x01; 1354 break; 1355 } 1356 } 1357 break; 1358 case 0x20: 1359 case 0x30: 1360 if (ad_slot[regm & 0x1fu] >= 0) 1361 { 1362 OPL3_SlotWrite20(&chip->slot[18u * high + ad_slot[regm & 0x1fu]], v); 1363 } 1364 break; 1365 case 0x40: 1366 case 0x50: 1367 if (ad_slot[regm & 0x1fu] >= 0) 1368 { 1369 OPL3_SlotWrite40(&chip->slot[18u * high + ad_slot[regm & 0x1fu]], v); 1370 } 1371 break; 1372 case 0x60: 1373 case 0x70: 1374 if (ad_slot[regm & 0x1fu] >= 0) 1375 { 1376 OPL3_SlotWrite60(&chip->slot[18u * high + ad_slot[regm & 0x1fu]], v); 1377 } 1378 break; 1379 case 0x80: 1380 case 0x90: 1381 if (ad_slot[regm & 0x1fu] >= 0) 1382 { 1383 OPL3_SlotWrite80(&chip->slot[18u * high + ad_slot[regm & 0x1fu]], v); 1384 } 1385 break; 1386 case 0xe0: 1387 case 0xf0: 1388 if (ad_slot[regm & 0x1fu] >= 0) 1389 { 1390 OPL3_SlotWriteE0(&chip->slot[18u * high + ad_slot[regm & 0x1fu]], v); 1391 } 1392 break; 1393 case 0xa0: 1394 if ((regm & 0x0f) < 9) 1395 { 1396 OPL3_ChannelWriteA0(&chip->channel[9u * high + (regm & 0x0fu)], v); 1397 } 1398 break; 1399 case 0xb0: 1400 if (regm == 0xbd && !high) 1401 { 1402 chip->tremoloshift = (((v >> 7) ^ 1) << 1) + 2; 1403 chip->vibshift = ((v >> 6) & 0x01) ^ 1; 1404 OPL3_ChannelUpdateRhythm(chip, v); 1405 } 1406 else if ((regm & 0x0f) < 9) 1407 { 1408 OPL3_ChannelWriteB0(&chip->channel[9u * high + (regm & 0x0fu)], v); 1409 if (v & 0x20) 1410 { 1411 OPL3_ChannelKeyOn(&chip->channel[9u * high + (regm & 0x0fu)]); 1412 } 1413 else 1414 { 1415 OPL3_ChannelKeyOff(&chip->channel[9u * high + (regm & 0x0fu)]); 1416 } 1417 } 1418 break; 1419 case 0xc0: 1420 if ((regm & 0x0f) < 9) 1421 { 1422 OPL3_ChannelWriteC0(&chip->channel[9u * high + (regm & 0x0fu)], v); 1423 } 1424 break; 1425 #if OPL_ENABLE_STEREOEXT 1426 case 0xd0: 1427 if ((regm & 0x0f) < 9) 1428 { 1429 OPL3_ChannelWriteD0(&chip->channel[9u * high + (regm & 0x0fu)], v); 1430 } 1431 break; 1432 #endif 1433 } 1434 } 1435 1436 void OPL3_WriteRegBuffered(opl3_chip *chip, uint16_t reg, uint8_t v) 1437 { 1438 uint64_t time1, time2; 1439 opl3_writebuf *writebuf; 1440 uint32_t writebuf_last; 1441 1442 writebuf_last = chip->writebuf_last; 1443 writebuf = &chip->writebuf[writebuf_last]; 1444 1445 if (writebuf->reg & 0x200) 1446 { 1447 OPL3_WriteReg(chip, writebuf->reg & 0x1ff, writebuf->data); 1448 1449 chip->writebuf_cur = (writebuf_last + 1) & (OPL_WRITEBUF_SIZE - 1); 1450 chip->writebuf_samplecnt = writebuf->time; 1451 } 1452 1453 writebuf->reg = reg | 0x200; 1454 writebuf->data = v; 1455 time1 = chip->writebuf_lasttime + OPL_WRITEBUF_DELAY; 1456 time2 = chip->writebuf_samplecnt; 1457 1458 if (time1 < time2) 1459 { 1460 time1 = time2; 1461 } 1462 1463 writebuf->time = time1; 1464 chip->writebuf_lasttime = time1; 1465 chip->writebuf_last = (writebuf_last + 1) & (OPL_WRITEBUF_SIZE - 1); 1466 } 1467 1468 void OPL3_GenerateStream(opl3_chip *chip, int16_t *sndptr, uint32_t numsamples) 1469 { 1470 uint32_t i; 1471 1472 for(i = 0; i < numsamples; i++) 1473 { 1474 OPL3_GenerateResampled(chip, sndptr); 1475 sndptr += 2; 1476 } 1477 }