mmc.c
1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * MultiMediaCard (MMC) and eMMC specific support code 4 * This code is controller independent 5 */ 6 7 #include <cbmem.h> 8 #include <commonlib/storage.h> 9 #include <delay.h> 10 #include "mmc.h" 11 #include "sd_mmc.h" 12 #include "storage.h" 13 #include <string.h> 14 #include <timer.h> 15 16 /* We pass in the cmd since otherwise the init seems to fail */ 17 static int mmc_send_op_cond_iter(struct storage_media *media, 18 struct mmc_command *cmd, int use_arg) 19 { 20 struct sd_mmc_ctrlr *ctrlr = media->ctrlr; 21 22 cmd->cmdidx = MMC_CMD_SEND_OP_COND; 23 cmd->resp_type = CARD_RSP_R3; 24 25 /* Set the controller's operating conditions */ 26 if (use_arg) { 27 uint32_t mask = media->op_cond_response & 28 (OCR_VOLTAGE_MASK | OCR_ACCESS_MODE); 29 cmd->cmdarg = ctrlr->voltages & mask; 30 31 /* Always request high capacity if supported by the 32 * controller 33 */ 34 if (ctrlr->caps & DRVR_CAP_HC) 35 cmd->cmdarg |= OCR_HCS; 36 } 37 cmd->flags = 0; 38 int err = ctrlr->send_cmd(ctrlr, cmd, NULL); 39 if (err) 40 return err; 41 42 media->op_cond_response = cmd->response[0]; 43 return 0; 44 } 45 46 int mmc_send_op_cond(struct storage_media *media) 47 { 48 struct mmc_command cmd; 49 int max_iters = 2; 50 51 /* Ask the card for its operating conditions */ 52 cmd.cmdarg = 0; 53 for (int i = 0; i < max_iters; i++) { 54 int err = mmc_send_op_cond_iter(media, &cmd, i != 0); 55 if (err) 56 return err; 57 58 // OCR_BUSY is active low, this bit set means 59 // "initialization complete". 60 if (media->op_cond_response & OCR_BUSY) 61 return 0; 62 } 63 return CARD_IN_PROGRESS; 64 } 65 66 int mmc_complete_op_cond(struct storage_media *media) 67 { 68 struct mmc_command cmd; 69 struct stopwatch sw; 70 71 stopwatch_init_msecs_expire(&sw, MMC_INIT_TIMEOUT_US_MS); 72 while (1) { 73 // CMD1 queries whether initialization is done. 74 int err = mmc_send_op_cond_iter(media, &cmd, 1); 75 if (err) 76 return err; 77 78 // OCR_BUSY means "initialization complete". 79 if (media->op_cond_response & OCR_BUSY) 80 break; 81 82 // Check if init timeout has expired. 83 if (stopwatch_expired(&sw)) 84 return CARD_UNUSABLE_ERR; 85 86 udelay(100); 87 } 88 89 media->version = MMC_VERSION_UNKNOWN; 90 media->ocr = cmd.response[0]; 91 92 media->high_capacity = ((media->ocr & OCR_HCS) == OCR_HCS); 93 media->rca = 0; 94 return 0; 95 } 96 97 int mmc_send_ext_csd(struct sd_mmc_ctrlr *ctrlr, unsigned char *ext_csd) 98 { 99 struct mmc_command cmd; 100 struct mmc_data data; 101 int rv; 102 103 /* Get the Card Status Register */ 104 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; 105 cmd.resp_type = CARD_RSP_R1; 106 cmd.cmdarg = 0; 107 cmd.flags = 0; 108 109 data.dest = (char *)ext_csd; 110 data.blocks = 1; 111 data.blocksize = 512; 112 data.flags = DATA_FLAG_READ; 113 114 rv = ctrlr->send_cmd(ctrlr, &cmd, &data); 115 116 if (!rv && CONFIG(SD_MMC_TRACE)) { 117 int i, size; 118 119 size = data.blocks * data.blocksize; 120 sd_mmc_trace("\t%p ext_csd:", ctrlr); 121 for (i = 0; i < size; i++) { 122 if (!(i % 32)) 123 sd_mmc_trace("\n"); 124 sd_mmc_trace(" %2.2x", ext_csd[i]); 125 } 126 sd_mmc_trace("\n"); 127 } 128 return rv; 129 } 130 131 static int mmc_switch(struct storage_media *media, uint8_t index, uint8_t value) 132 { 133 struct mmc_command cmd; 134 struct sd_mmc_ctrlr *ctrlr = media->ctrlr; 135 136 cmd.cmdidx = MMC_CMD_SWITCH; 137 cmd.resp_type = CARD_RSP_R1b; 138 cmd.cmdarg = ((MMC_SWITCH_MODE_WRITE_BYTE << 24) | 139 (index << 16) | (value << 8)); 140 cmd.flags = 0; 141 142 int ret = ctrlr->send_cmd(ctrlr, &cmd, NULL); 143 144 /* Waiting for the ready status */ 145 sd_mmc_send_status(media, SD_MMC_IO_RETRIES); 146 return ret; 147 } 148 149 static void mmc_recalculate_clock(struct storage_media *media) 150 { 151 uint32_t clock; 152 153 clock = CLOCK_26MHZ; 154 if (media->caps & DRVR_CAP_HS) { 155 if ((media->caps & DRVR_CAP_HS200) || 156 (media->caps & DRVR_CAP_HS400)) 157 clock = CLOCK_200MHZ; 158 else if (media->caps & DRVR_CAP_HS52) 159 clock = CLOCK_52MHZ; 160 } 161 SET_CLOCK(media->ctrlr, clock); 162 } 163 164 static int mmc_select_hs(struct storage_media *media) 165 { 166 int ret; 167 168 /* Switch the MMC device into high speed mode */ 169 ret = mmc_switch(media, EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS); 170 if (ret) { 171 sd_mmc_error("Timing switch to high speed failed\n"); 172 return ret; 173 } 174 sdhc_debug("SDHCI switched MMC to high speed\n"); 175 176 /* Increase the controller clock speed */ 177 SET_TIMING(media->ctrlr, BUS_TIMING_MMC_HS); 178 media->caps &= ~(DRVR_CAP_HS200 | DRVR_CAP_HS400); 179 media->caps |= DRVR_CAP_HS52 | DRVR_CAP_HS; 180 mmc_recalculate_clock(media); 181 ret = sd_mmc_send_status(media, SD_MMC_IO_RETRIES); 182 return ret; 183 } 184 185 static int mmc_send_tuning_seq(struct sd_mmc_ctrlr *ctrlr, char *buffer) 186 { 187 struct mmc_command cmd; 188 struct mmc_data data; 189 190 /* Request the device send the tuning sequence to the host */ 191 cmd.cmdidx = MMC_CMD_AUTO_TUNING_SEQUENCE; 192 cmd.resp_type = CARD_RSP_R1; 193 cmd.cmdarg = 0; 194 cmd.flags = CMD_FLAG_IGNORE_INHIBIT; 195 196 data.dest = buffer; 197 data.blocks = 1; 198 data.blocksize = (ctrlr->bus_width == 8) ? 128 : 64; 199 data.flags = DATA_FLAG_READ; 200 return ctrlr->send_cmd(ctrlr, &cmd, &data); 201 } 202 203 static int mmc_bus_tuning(struct storage_media *media) 204 { 205 ALLOC_CACHE_ALIGN_BUFFER(char, buffer, 128); 206 struct sd_mmc_ctrlr *ctrlr = media->ctrlr; 207 int index; 208 int successful; 209 210 /* Request the device send the tuning sequence up to 40 times */ 211 ctrlr->tuning_start(ctrlr, 0); 212 for (index = 0; index < 40; index++) { 213 mmc_send_tuning_seq(ctrlr, buffer); 214 if (ctrlr->is_tuning_complete(ctrlr, &successful)) { 215 if (successful) 216 return 0; 217 break; 218 } 219 } 220 sd_mmc_error("Bus tuning failed!\n"); 221 return -1; 222 } 223 224 static int mmc_select_hs400(struct storage_media *media) 225 { 226 uint8_t bus_width; 227 uint32_t caps; 228 struct sd_mmc_ctrlr *ctrlr = media->ctrlr; 229 int ret; 230 uint32_t timing; 231 232 /* Switch the MMC device into high speed mode */ 233 ret = mmc_select_hs(media); 234 if (ret) 235 return ret; 236 237 /* Switch MMC device to 8-bit DDR with strobe */ 238 bus_width = EXT_CSD_DDR_BUS_WIDTH_8; 239 caps = DRVR_CAP_HS400 | DRVR_CAP_HS52 | DRVR_CAP_HS; 240 timing = BUS_TIMING_MMC_HS400; 241 if ((ctrlr->caps & DRVR_CAP_ENHANCED_STROBE) 242 && (media->caps & DRVR_CAP_ENHANCED_STROBE)) { 243 bus_width |= EXT_CSD_BUS_WIDTH_STROBE; 244 caps |= DRVR_CAP_ENHANCED_STROBE; 245 timing = BUS_TIMING_MMC_HS400ES; 246 } 247 ret = mmc_switch(media, EXT_CSD_BUS_WIDTH, bus_width); 248 if (ret) { 249 sd_mmc_error("Switching bus width for HS400 failed\n"); 250 return ret; 251 } 252 sdhc_debug("SDHCI switched MMC to 8-bit DDR\n"); 253 254 /* Set controller to 8-bit mode */ 255 SET_BUS_WIDTH(ctrlr, 8); 256 media->caps |= EXT_CSD_BUS_WIDTH_8; 257 258 /* Switch MMC device to HS400 */ 259 ret = mmc_switch(media, EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS400); 260 if (ret) { 261 sd_mmc_error("Switch to HS400 timing failed\n"); 262 return ret; 263 } 264 265 /* Set controller to 200 MHz and use receive strobe */ 266 SET_TIMING(ctrlr, timing); 267 media->caps |= caps; 268 mmc_recalculate_clock(media); 269 ret = sd_mmc_send_status(media, SD_MMC_IO_RETRIES); 270 return ret; 271 } 272 273 static int mmc_select_hs200(struct storage_media *media) 274 { 275 struct sd_mmc_ctrlr *ctrlr = media->ctrlr; 276 int ret; 277 278 /* Switch the MMC device to 8-bit SDR */ 279 ret = mmc_switch(media, EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_8); 280 if (ret) { 281 sd_mmc_error("Switching bus width for HS200 failed\n"); 282 return ret; 283 } 284 285 /* Set controller to 8-bit mode */ 286 SET_BUS_WIDTH(ctrlr, 8); 287 media->caps |= EXT_CSD_BUS_WIDTH_8; 288 289 /* Switch to HS200 */ 290 ret = mmc_switch(media, EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS200); 291 292 if (ret) { 293 sd_mmc_error("Switch to HS200 failed\n"); 294 return ret; 295 } 296 sdhc_debug("SDHCI switched MMC to 8-bit SDR\n"); 297 298 /* Set controller to 200 MHz */ 299 SET_TIMING(ctrlr, BUS_TIMING_MMC_HS200); 300 media->caps |= DRVR_CAP_HS200 | DRVR_CAP_HS52 | DRVR_CAP_HS; 301 mmc_recalculate_clock(media); 302 303 /* Tune the receive sampling point for the bus */ 304 if ((!ret) && (ctrlr->caps & DRVR_CAP_HS200_TUNING)) 305 ret = mmc_bus_tuning(media); 306 return ret; 307 } 308 309 int mmc_change_freq(struct storage_media *media) 310 { 311 struct sd_mmc_ctrlr *ctrlr = media->ctrlr; 312 int err; 313 ALLOC_CACHE_ALIGN_BUFFER(unsigned char, ext_csd, 512); 314 315 media->caps = 0; 316 317 /* Only version 4 supports high-speed */ 318 if (media->version < MMC_VERSION_4) 319 return 0; 320 321 err = mmc_send_ext_csd(ctrlr, ext_csd); 322 if (err) 323 return err; 324 325 /* Determine if the device supports enhanced strobe */ 326 media->caps |= ext_csd[EXT_CSD_STROBE_SUPPORT] 327 ? DRVR_CAP_ENHANCED_STROBE : 0; 328 329 if ((ctrlr->caps & DRVR_CAP_HS400) && 330 (ext_csd[EXT_CSD_CARD_TYPE] & MMC_HS400)) 331 err = mmc_select_hs400(media); 332 else if ((ctrlr->caps & DRVR_CAP_HS200) && 333 (ext_csd[EXT_CSD_CARD_TYPE] & MMC_HS_200MHZ)) 334 err = mmc_select_hs200(media); 335 else 336 err = mmc_select_hs(media); 337 338 return err; 339 } 340 341 int mmc_set_bus_width(struct storage_media *media) 342 { 343 struct sd_mmc_ctrlr *ctrlr = media->ctrlr; 344 int err; 345 int width; 346 347 ALLOC_CACHE_ALIGN_BUFFER(unsigned char, ext_csd, EXT_CSD_SIZE); 348 ALLOC_CACHE_ALIGN_BUFFER(unsigned char, test_csd, EXT_CSD_SIZE); 349 350 /* Set the bus width */ 351 err = 0; 352 for (width = EXT_CSD_BUS_WIDTH_8; width >= 0; width--) { 353 /* If HS200 is switched, Bus Width has been 8-bit */ 354 if ((media->caps & DRVR_CAP_HS200) || 355 (media->caps & DRVR_CAP_HS400)) 356 break; 357 358 /* Set the card to use 4 bit*/ 359 err = mmc_switch(media, EXT_CSD_BUS_WIDTH, width); 360 if (err) 361 continue; 362 363 if (!width) { 364 SET_BUS_WIDTH(ctrlr, 1); 365 break; 366 } 367 SET_BUS_WIDTH(ctrlr, 4 * width); 368 369 err = mmc_send_ext_csd(ctrlr, test_csd); 370 if (!err && 371 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] == 372 test_csd[EXT_CSD_PARTITIONING_SUPPORT]) && 373 (ext_csd[EXT_CSD_ERASE_GROUP_DEF] == 374 test_csd[EXT_CSD_ERASE_GROUP_DEF]) && 375 (ext_csd[EXT_CSD_REV] == 376 test_csd[EXT_CSD_REV]) && 377 (ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] == 378 test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]) && 379 memcmp(&ext_csd[EXT_CSD_SEC_CNT], 380 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) { 381 media->caps |= width; 382 break; 383 } 384 } 385 return err; 386 } 387 388 int mmc_update_capacity(struct storage_media *media) 389 { 390 uint64_t capacity; 391 struct sd_mmc_ctrlr *ctrlr = media->ctrlr; 392 int err; 393 ALLOC_CACHE_ALIGN_BUFFER(unsigned char, ext_csd, EXT_CSD_SIZE); 394 uint32_t erase_size; 395 uint32_t hc_erase_size; 396 uint64_t hc_wp_size; 397 int index; 398 399 if (media->version < MMC_VERSION_4) 400 return 0; 401 402 /* check ext_csd version and capacity */ 403 err = mmc_send_ext_csd(ctrlr, ext_csd); 404 if (err) 405 return err; 406 407 if (ext_csd[EXT_CSD_REV] < 2) 408 return 0; 409 410 /* Determine the eMMC device information */ 411 media->partition_config = ext_csd[EXT_CSD_PART_CONF] 412 & EXT_CSD_PART_ACCESS_MASK; 413 414 /* Determine the user partition size 415 * 416 * According to the JEDEC Standard, the value of 417 * ext_csd's capacity is valid if the value is 418 * more than 2GB 419 */ 420 capacity = (uint32_t)(ext_csd[EXT_CSD_SEC_CNT + 0] << 0 | 421 ext_csd[EXT_CSD_SEC_CNT + 1] << 8 | 422 ext_csd[EXT_CSD_SEC_CNT + 2] << 16 | 423 ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 424 capacity *= 512; 425 if ((capacity >> 20) > 2 * 1024) 426 media->capacity[MMC_PARTITION_USER] = capacity; 427 428 /* Determine the boot partition sizes */ 429 hc_erase_size = ext_csd[224] * 512 * KiB; 430 capacity = ext_csd[EXT_CSD_BOOT_SIZE_MULT] * 128 * KiB; 431 media->capacity[MMC_PARTITION_BOOT_1] = capacity; 432 media->capacity[MMC_PARTITION_BOOT_2] = capacity; 433 434 /* Determine the RPMB size */ 435 hc_wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE] * hc_erase_size; 436 capacity = 128 * KiB * ext_csd[EXT_CSD_RPMB_SIZE_MULT]; 437 media->capacity[MMC_PARTITION_RPMB] = capacity; 438 439 /* Determine the general partition sizes */ 440 capacity = (ext_csd[EXT_CSD_GP_SIZE_MULT_GP0 + 2] << 16) 441 | (ext_csd[EXT_CSD_GP_SIZE_MULT_GP0 + 1] << 8) 442 | ext_csd[EXT_CSD_GP_SIZE_MULT_GP0]; 443 capacity *= hc_wp_size; 444 media->capacity[MMC_PARTITION_GP1] = capacity; 445 446 capacity = (ext_csd[EXT_CSD_GP_SIZE_MULT_GP1 + 2] << 16) 447 | (ext_csd[EXT_CSD_GP_SIZE_MULT_GP1 + 1] << 8) 448 | ext_csd[EXT_CSD_GP_SIZE_MULT_GP1]; 449 capacity *= hc_wp_size; 450 media->capacity[MMC_PARTITION_GP2] = capacity; 451 452 capacity = (ext_csd[EXT_CSD_GP_SIZE_MULT_GP2 + 2] << 16) 453 | (ext_csd[EXT_CSD_GP_SIZE_MULT_GP2 + 1] << 8) 454 | ext_csd[EXT_CSD_GP_SIZE_MULT_GP2]; 455 capacity *= hc_wp_size; 456 media->capacity[MMC_PARTITION_GP3] = capacity; 457 458 capacity = (ext_csd[EXT_CSD_GP_SIZE_MULT_GP3 + 2] << 16) 459 | (ext_csd[EXT_CSD_GP_SIZE_MULT_GP3 + 1] << 8) 460 | ext_csd[EXT_CSD_GP_SIZE_MULT_GP3]; 461 capacity *= hc_wp_size; 462 media->capacity[MMC_PARTITION_GP4] = capacity; 463 464 /* Determine the erase size */ 465 erase_size = (sd_mmc_extract_uint32_bits(media->csd, 466 81, 5) + 1) * 467 (sd_mmc_extract_uint32_bits(media->csd, 86, 5) 468 + 1); 469 for (index = MMC_PARTITION_BOOT_1; index <= MMC_PARTITION_GP4; 470 index++) { 471 if (media->capacity[index] != 0) { 472 /* Enable the partitions */ 473 err = mmc_switch(media, EXT_CSD_ERASE_GROUP_DEF, 474 EXT_CSD_PARTITION_ENABLE); 475 if (err) { 476 sdhc_error("Failed to enable partition access\n"); 477 return err; 478 } 479 480 /* Use HC erase group size */ 481 erase_size = hc_erase_size / media->write_bl_len; 482 break; 483 } 484 } 485 media->erase_blocks = erase_size; 486 media->trim_mult = ext_csd[EXT_CSD_TRIM_MULT]; 487 488 return 0; 489 } 490 491 int mmc_set_partition(struct storage_media *media, 492 unsigned int partition_number) 493 { 494 uint8_t partition_config; 495 496 /* Validate the partition number */ 497 if ((partition_number > MMC_PARTITION_GP4) 498 || (!media->capacity[partition_number])) 499 return -1; 500 501 /* Update the partition register */ 502 partition_config = media->partition_config; 503 partition_config &= ~EXT_CSD_PART_ACCESS_MASK; 504 partition_config |= partition_number; 505 506 /* Select the new partition */ 507 int ret = mmc_switch(media, EXT_CSD_PART_CONF, partition_config); 508 if (!ret) 509 media->partition_config = partition_config; 510 511 return ret; 512 } 513 514 const char *mmc_partition_name(struct storage_media *media, 515 unsigned int partition_number) 516 { 517 static const char *const partition_name[8] = { 518 "User", /* 0 */ 519 "Boot 1", /* 1 */ 520 "Boot 2", /* 2 */ 521 "RPMB", /* 3 */ 522 "GP 1", /* 4 */ 523 "GP 2", /* 5 */ 524 "GP 3", /* 6 */ 525 "GP 4" /* 7 */ 526 }; 527 528 if (partition_number >= ARRAY_SIZE(partition_name)) 529 return ""; 530 return partition_name[partition_number]; 531 } 532 533 void mmc_set_early_wake_status(int32_t status) 534 { 535 int32_t *ms_cbmem; 536 537 ms_cbmem = cbmem_add(CBMEM_ID_MMC_STATUS, sizeof(status)); 538 539 if (!ms_cbmem) { 540 printk(BIOS_ERR, 541 "%s: Failed to add early mmc wake status to cbmem!\n", 542 __func__); 543 return; 544 } 545 546 *ms_cbmem = status; 547 } 548 549 int mmc_send_cmd1(struct storage_media *media) 550 { 551 int err; 552 553 /* Reset emmc, send CMD0 */ 554 if (sd_mmc_go_idle(media)) 555 goto out_err; 556 557 /* Send CMD1 */ 558 err = mmc_send_op_cond(media); 559 if (err == 0) { 560 if (media->op_cond_response & OCR_HCS) 561 mmc_set_early_wake_status(MMC_STATUS_CMD1_READY_HCS); 562 else 563 mmc_set_early_wake_status(MMC_STATUS_CMD1_READY); 564 } else if (err == CARD_IN_PROGRESS) { 565 mmc_set_early_wake_status(MMC_STATUS_CMD1_IN_PROGRESS); 566 } else { 567 goto out_err; 568 } 569 570 return 0; 571 572 out_err: 573 mmc_set_early_wake_status(MMC_STATUS_NEED_RESET); 574 return -1; 575 }