Kconfig
1 ## SPDX-License-Identifier: GPL-2.0-only 2 3 menu "Devices" 4 5 config HAVE_VGA_TEXT_FRAMEBUFFER 6 bool 7 depends on !(NO_GFX_INIT && NO_EARLY_GFX_INIT) 8 help 9 Selected by graphics drivers that support legacy VGA text mode. 10 11 config HAVE_VBE_LINEAR_FRAMEBUFFER 12 bool 13 depends on !NO_GFX_INIT 14 help 15 Selected by graphics drivers that can set up a VBE linear-framebuffer 16 mode. 17 18 config HAVE_LINEAR_FRAMEBUFFER 19 bool 20 depends on !NO_GFX_INIT 21 help 22 Selected by graphics drivers that can set up a generic linear 23 framebuffer. 24 25 config HAVE_FSP_GOP 26 bool 27 help 28 Selected by drivers that support to run a blob that implements 29 the Graphics Output Protocol (GOP). 30 31 config MAINBOARD_NO_FSP_GOP 32 bool 33 help 34 Selected by mainboards that do not have any graphics ports connected to the SoC. 35 36 config MAINBOARD_HAS_NATIVE_VGA_INIT 37 def_bool n 38 help 39 Selected by mainboards / drivers that provide native graphics 40 init within coreboot. 41 42 config MAINBOARD_FORCE_NATIVE_VGA_INIT 43 def_bool n 44 depends on MAINBOARD_HAS_NATIVE_VGA_INIT || MAINBOARD_HAS_LIBGFXINIT 45 help 46 Selected by mainboards / chipsets whose graphics driver can't or 47 shouldn't be disabled. 48 49 config VGA_ROM_RUN_DEFAULT 50 def_bool n 51 help 52 Selected by mainboards whose graphics initialization depends on VGA OpROM. 53 coreboot needs to load/execute legacy VGA OpROM in order to initialize GFX. 54 55 config MAINBOARD_HAS_LIBGFXINIT 56 def_bool n 57 help 58 Selected by mainboards that implement support for `libgfxinit`. 59 Usually this requires a list of ports to be probed for displays. 60 61 config MAINBOARD_HAS_EARLY_LIBGFXINIT 62 def_bool n 63 help 64 Selected by mainboards that implement early (cache-as-ram 65 stage) support of `libgfxinit`. Usually this requires a list 66 of ports to be probed for displays. 67 68 choice 69 prompt "Graphics initialization" 70 default NO_GFX_INIT if VGA_ROM_RUN_DEFAULT && PAYLOAD_SEABIOS 71 default VGA_ROM_RUN if VGA_ROM_RUN_DEFAULT 72 default MAINBOARD_DO_NATIVE_VGA_INIT 73 default MAINBOARD_USE_LIBGFXINIT 74 default RUN_FSP_GOP if INTEL_GMA_HAVE_VBT 75 76 config MAINBOARD_DO_NATIVE_VGA_INIT 77 bool "Use native graphics init" 78 depends on MAINBOARD_HAS_NATIVE_VGA_INIT 79 help 80 Some mainboards, such as the Google Link, allow initializing the 81 display without the need of a binary only VGA OPROM. Enabling this 82 option may be faster, but also lacks flexibility in setting modes. 83 84 config MAINBOARD_USE_LIBGFXINIT 85 bool "Use libgfxinit" 86 depends on MAINBOARD_HAS_LIBGFXINIT 87 select HAVE_VGA_TEXT_FRAMEBUFFER 88 select HAVE_LINEAR_FRAMEBUFFER 89 select VGA if VGA_TEXT_FRAMEBUFFER 90 help 91 Use the SPARK library `libgfxinit` for the native graphics 92 initialization. This requires an Ada toolchain. 93 94 # TODO: Explain differences (if any) for onboard cards. 95 config VGA_ROM_RUN 96 bool "Run VGA Option ROMs" 97 depends on PCI && (ARCH_X86 || ARCH_PPC64) && !MAINBOARD_FORCE_NATIVE_VGA_INIT 98 select HAVE_VGA_TEXT_FRAMEBUFFER 99 help 100 Execute VGA Option ROMs in coreboot if found. This can be used 101 to enable PCI/AGP/PCI-E video cards when not using a SeaBIOS 102 payload. 103 104 When using a SeaBIOS payload it runs all option ROMs with much 105 more complete BIOS interrupt services available than coreboot, 106 which some option ROMs require in order to function correctly. 107 108 config RUN_FSP_GOP 109 bool "Run a GOP driver" 110 depends on HAVE_FSP_GOP && !MAINBOARD_NO_FSP_GOP 111 select HAVE_LINEAR_FRAMEBUFFER 112 help 113 Some platforms (e.g. Intel Braswell and Skylake/Kaby Lake) support 114 to run a GOP blob. This option enables graphics initialization with 115 such a blob. 116 117 config NO_GFX_INIT 118 bool "None" 119 depends on !MAINBOARD_FORCE_NATIVE_VGA_INIT 120 help 121 Select this to not perform any graphics initialization in 122 coreboot. This is useful if the payload (e.g. SeaBIOS) can 123 initialize graphics or if pre-boot graphics are not required. 124 125 endchoice 126 127 choice 128 prompt "Early (romstage) graphics initialization" 129 default MAINBOARD_USE_EARLY_LIBGFXINIT if MAINBOARD_HAS_EARLY_LIBGFXINIT 130 default NO_EARLY_GFX_INIT 131 132 config NO_EARLY_GFX_INIT 133 bool "None" 134 help 135 Select this to not perform any graphics initialization at 136 romstage. 137 138 config MAINBOARD_USE_EARLY_LIBGFXINIT 139 bool "Use libgfxinit" 140 depends on MAINBOARD_HAS_EARLY_LIBGFXINIT 141 select ROMSTAGE_VGA 142 help 143 Use the SPARK library `libgfxinit` for the romstage native 144 graphics initialization. This requires an Ada 145 toolchain. Graphics at romstage is limited to VGA text mode. 146 147 endchoice 148 149 config PRE_GRAPHICS_DELAY_MS 150 int "Graphics initialization delay in ms" 151 default 0 152 depends on VGA_ROM_RUN 153 help 154 On some systems, coreboot boots so fast that connected monitors 155 (mostly TVs) won't be able to wake up fast enough to talk to the 156 VBIOS. On those systems we need to wait for a bit before executing 157 the VBIOS. 158 159 config ONBOARD_VGA_IS_PRIMARY 160 bool "Use onboard VGA as primary video device" 161 default n 162 depends on PCI 163 help 164 This option lets you select which VGA device will be used 165 to decode legacy VGA cycles. Not all chipsets implement this 166 however. If not selected, the last adapter found will be used, 167 else the onboard adapter is used. 168 169 config S3_VGA_ROM_RUN 170 bool "Re-run VGA Option ROMs on S3 resume" 171 default y 172 depends on VGA_ROM_RUN && HAVE_ACPI_RESUME 173 help 174 Execute VGA Option ROMs in coreboot when resuming from S3 suspend. 175 176 When using a SeaBIOS payload it runs all option ROMs with much 177 more complete BIOS interrupt services available than coreboot, 178 which some option ROMs require in order to function correctly. 179 180 If unsure, say N when using SeaBIOS as payload, Y otherwise. 181 182 config ALWAYS_LOAD_OPROM 183 def_bool n 184 depends on VGA_ROM_RUN 185 help 186 Always load option ROMs if any are found. The decision to run 187 the ROM is still determined at runtime, but the distinction 188 between loading and not running comes into play for CHROMEOS. 189 190 An example where this is required is that VBT (Video BIOS Tables) 191 are needed for the kernel's display driver to know how a piece of 192 hardware is configured to be used. 193 194 config ALWAYS_RUN_OPROM 195 def_bool n 196 depends on VGA_ROM_RUN && ALWAYS_LOAD_OPROM 197 help 198 Always unconditionally run the option regardless of other 199 policies. 200 201 config ON_DEVICE_ROM_LOAD 202 bool "Load Option ROMs on PCI devices" 203 default n if PAYLOAD_SEABIOS 204 default y if !PAYLOAD_SEABIOS 205 depends on VGA_ROM_RUN 206 help 207 Load Option ROMs stored on PCI/PCIe/AGP VGA devices in coreboot. 208 209 If disabled, only Option ROMs stored in CBFS will be executed by 210 coreboot. If you are concerned about security, you might want to 211 disable this option, but it might leave your system in a state of 212 degraded functionality. 213 214 When using a SeaBIOS payload it runs all option ROMs with much 215 more complete BIOS interrupt services available than coreboot, 216 which some option ROMs require in order to function correctly. 217 218 If unsure, say N when using SeaBIOS as payload, Y otherwise. 219 220 choice 221 prompt "Option ROM execution type" 222 default PCI_OPTION_ROM_RUN_YABEL if !ARCH_X86 223 default PCI_OPTION_ROM_RUN_REALMODE if ARCH_X86 224 depends on VGA_ROM_RUN 225 226 config PCI_OPTION_ROM_RUN_REALMODE 227 prompt "Native mode" 228 bool 229 depends on ARCH_X86 && !ARCH_RAMSTAGE_X86_64 230 help 231 If you select this option, PCI Option ROMs will be executed 232 natively on the CPU in real mode. No CPU emulation is involved, 233 so this is the fastest, but also the least secure option. 234 (only works on x86/x64 systems) 235 236 config PCI_OPTION_ROM_RUN_YABEL 237 prompt "Secure mode" 238 bool 239 help 240 If you select this option, the x86emu CPU emulator will be used to 241 execute PCI Option ROMs. 242 243 This option prevents Option ROMs from doing dirty tricks with the 244 system (such as installing SMM modules or hypervisors), but it is 245 also significantly slower than the native Option ROM initialization 246 method. 247 248 This is the default choice for non-x86 systems. 249 250 endchoice 251 252 config YABEL_PCI_ACCESS_OTHER_DEVICES 253 prompt "Allow Option ROMs to access other devices" 254 bool 255 depends on PCI_OPTION_ROM_RUN_YABEL 256 help 257 Per default, YABEL only allows Option ROMs to access the PCI device 258 that they are associated with. However, this causes trouble for some 259 onboard graphics chips whose Option ROM needs to reconfigure the 260 north bridge. 261 262 config YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG 263 prompt "Fake success on writing other device's config space" 264 bool 265 depends on YABEL_PCI_ACCESS_OTHER_DEVICES 266 help 267 By default, YABEL aborts when the Option ROM tries to write to other 268 devices' config spaces. With this option enabled, the write doesn't 269 follow through, but the Option ROM is allowed to go on. 270 This can create issues such as hanging Option ROMs (if it depends on 271 that other register changing to the written value), so test for 272 impact before using this option. 273 274 config YABEL_VIRTMEM_LOCATION 275 prompt "Location of YABEL's virtual memory" 276 hex 277 depends on PCI_OPTION_ROM_RUN_YABEL 278 default 0x1000000 279 help 280 YABEL requires 1MB memory for its CPU emulation. This memory is 281 normally located at 16MB. 282 283 config YABEL_DIRECTHW 284 prompt "Direct hardware access" 285 bool 286 depends on PCI_OPTION_ROM_RUN_YABEL && ARCH_X86 287 help 288 YABEL consists of two parts: It uses x86emu for the CPU emulation and 289 additionally provides a PC system emulation that filters bad device 290 and memory access (such as PCI config space access to other devices 291 than the initialized one). 292 293 When choosing this option, x86emu will pass through all hardware 294 accesses to memory and I/O devices to the underlying memory and I/O 295 addresses. While this option prevents Option ROMs from doing dirty 296 tricks with the CPU (such as installing SMM modules or hypervisors), 297 they can still access all devices in the system. 298 Enable this option for a good compromise between security and speed. 299 300 menu "Display" 301 depends on HAVE_VGA_TEXT_FRAMEBUFFER || HAVE_LINEAR_FRAMEBUFFER 302 303 config FRAMEBUFFER_SET_VESA_MODE 304 prompt "Set framebuffer graphics resolution" 305 bool 306 default y if CHROMEOS 307 depends on PCI_OPTION_ROM_RUN_YABEL || PCI_OPTION_ROM_RUN_REALMODE 308 select HAVE_VBE_LINEAR_FRAMEBUFFER 309 help 310 Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console) 311 312 if FRAMEBUFFER_SET_VESA_MODE 313 314 choice 315 prompt "framebuffer graphics resolution" 316 default FRAMEBUFFER_VESA_MODE_118 317 help 318 This option sets the resolution used for the coreboot framebuffer (and 319 bootsplash screen). 320 321 config FRAMEBUFFER_VESA_MODE_100 322 bool "640x400 256-color" 323 324 config FRAMEBUFFER_VESA_MODE_101 325 bool "640x480 256-color" 326 327 config FRAMEBUFFER_VESA_MODE_102 328 bool "800x600 16-color" 329 330 config FRAMEBUFFER_VESA_MODE_103 331 bool "800x600 256-color" 332 333 config FRAMEBUFFER_VESA_MODE_104 334 bool "1024x768 16-color" 335 336 config FRAMEBUFFER_VESA_MODE_105 337 bool "1024x768 256-color" 338 339 config FRAMEBUFFER_VESA_MODE_106 340 bool "1280x1024 16-color" 341 342 config FRAMEBUFFER_VESA_MODE_107 343 bool "1280x1024 256-color" 344 345 config FRAMEBUFFER_VESA_MODE_108 346 bool "80x60 text" 347 348 config FRAMEBUFFER_VESA_MODE_109 349 bool "132x25 text" 350 351 config FRAMEBUFFER_VESA_MODE_10A 352 bool "132x43 text" 353 354 config FRAMEBUFFER_VESA_MODE_10B 355 bool "132x50 text" 356 357 config FRAMEBUFFER_VESA_MODE_10C 358 bool "132x60 text" 359 360 config FRAMEBUFFER_VESA_MODE_10D 361 bool "320x200 32k-color (1:5:5:5)" 362 363 config FRAMEBUFFER_VESA_MODE_10E 364 bool "320x200 64k-color (5:6:5)" 365 366 config FRAMEBUFFER_VESA_MODE_10F 367 bool "320x200 16.8M-color (8:8:8)" 368 369 config FRAMEBUFFER_VESA_MODE_110 370 bool "640x480 32k-color (1:5:5:5)" 371 372 config FRAMEBUFFER_VESA_MODE_111 373 bool "640x480 64k-color (5:6:5)" 374 375 config FRAMEBUFFER_VESA_MODE_112 376 bool "640x480 16.8M-color (8:8:8)" 377 378 config FRAMEBUFFER_VESA_MODE_113 379 bool "800x600 32k-color (1:5:5:5)" 380 381 config FRAMEBUFFER_VESA_MODE_114 382 bool "800x600 64k-color (5:6:5)" 383 384 config FRAMEBUFFER_VESA_MODE_115 385 bool "800x600 16.8M-color (8:8:8)" 386 387 config FRAMEBUFFER_VESA_MODE_116 388 bool "1024x768 32k-color (1:5:5:5)" 389 390 config FRAMEBUFFER_VESA_MODE_117 391 bool "1024x768 64k-color (5:6:5)" 392 393 config FRAMEBUFFER_VESA_MODE_118 394 bool "1024x768 16.8M-color (8:8:8)" 395 396 config FRAMEBUFFER_VESA_MODE_119 397 bool "1280x1024 32k-color (1:5:5:5)" 398 399 config FRAMEBUFFER_VESA_MODE_11A 400 bool "1280x1024 64k-color (5:6:5)" 401 402 config FRAMEBUFFER_VESA_MODE_11B 403 bool "1280x1024 16.8M-color (8:8:8)" 404 405 config FRAMEBUFFER_VESA_MODE_USER 406 bool "Manually select VESA mode" 407 408 endchoice 409 410 # Map the config names to an integer (KB). 411 config FRAMEBUFFER_VESA_MODE 412 prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER 413 hex 414 default 0x100 if FRAMEBUFFER_VESA_MODE_100 415 default 0x101 if FRAMEBUFFER_VESA_MODE_101 416 default 0x102 if FRAMEBUFFER_VESA_MODE_102 417 default 0x103 if FRAMEBUFFER_VESA_MODE_103 418 default 0x104 if FRAMEBUFFER_VESA_MODE_104 419 default 0x105 if FRAMEBUFFER_VESA_MODE_105 420 default 0x106 if FRAMEBUFFER_VESA_MODE_106 421 default 0x107 if FRAMEBUFFER_VESA_MODE_107 422 default 0x108 if FRAMEBUFFER_VESA_MODE_108 423 default 0x109 if FRAMEBUFFER_VESA_MODE_109 424 default 0x10A if FRAMEBUFFER_VESA_MODE_10A 425 default 0x10B if FRAMEBUFFER_VESA_MODE_10B 426 default 0x10C if FRAMEBUFFER_VESA_MODE_10C 427 default 0x10D if FRAMEBUFFER_VESA_MODE_10D 428 default 0x10E if FRAMEBUFFER_VESA_MODE_10E 429 default 0x10F if FRAMEBUFFER_VESA_MODE_10F 430 default 0x110 if FRAMEBUFFER_VESA_MODE_110 431 default 0x111 if FRAMEBUFFER_VESA_MODE_111 432 default 0x112 if FRAMEBUFFER_VESA_MODE_112 433 default 0x113 if FRAMEBUFFER_VESA_MODE_113 434 default 0x114 if FRAMEBUFFER_VESA_MODE_114 435 default 0x115 if FRAMEBUFFER_VESA_MODE_115 436 default 0x116 if FRAMEBUFFER_VESA_MODE_116 437 default 0x117 if FRAMEBUFFER_VESA_MODE_117 438 default 0x118 if FRAMEBUFFER_VESA_MODE_118 439 default 0x119 if FRAMEBUFFER_VESA_MODE_119 440 default 0x11A if FRAMEBUFFER_VESA_MODE_11A 441 default 0x11B if FRAMEBUFFER_VESA_MODE_11B 442 default 0x118 if FRAMEBUFFER_VESA_MODE_USER 443 endif # FRAMEBUFFER_SET_VESA_MODE 444 445 config WANT_LINEAR_FRAMEBUFFER 446 bool 447 default y if CHROMEOS 448 default y if PAYLOAD_EDK2 449 default y if COREDOOM_SECONDARY_PAYLOAD 450 451 choice 452 prompt "Framebuffer mode" 453 default VBE_LINEAR_FRAMEBUFFER if HAVE_VBE_LINEAR_FRAMEBUFFER && WANT_LINEAR_FRAMEBUFFER 454 default GENERIC_LINEAR_FRAMEBUFFER if HAVE_LINEAR_FRAMEBUFFER && WANT_LINEAR_FRAMEBUFFER 455 default VGA_TEXT_FRAMEBUFFER 456 457 config VGA_TEXT_FRAMEBUFFER 458 bool "Legacy VGA text mode" 459 depends on HAVE_VGA_TEXT_FRAMEBUFFER 460 help 461 If this option is enabled, coreboot will initialize graphics in 462 legacy VGA text mode or, if a VGA BIOS is used and a VESA mode set, 463 switch to text mode before handing control to a payload. 464 465 config VBE_LINEAR_FRAMEBUFFER 466 bool "VESA framebuffer" 467 depends on HAVE_VBE_LINEAR_FRAMEBUFFER 468 help 469 This option keeps the framebuffer mode set after coreboot finishes 470 execution. If this option is enabled, coreboot will pass a 471 framebuffer entry in its coreboot table and the payload will need a 472 compatible driver. 473 474 config GENERIC_LINEAR_FRAMEBUFFER 475 bool "Linear \"high-resolution\" framebuffer" 476 depends on HAVE_LINEAR_FRAMEBUFFER 477 help 478 This option enables a high-resolution, linear framebuffer. If this 479 option is enabled, coreboot will pass a framebuffer entry in its 480 coreboot table and the payload will need a compatible driver. 481 482 endchoice 483 484 # Workaround to have LINEAR_FRAMEBUFFER set in both cases 485 # VBE_LINEAR_FRAMEBUFFER and GENERIC_LINEAR_FRAMEBUFFER. 486 # `kconfig_lint` doesn't let us use the same name with 487 # different texts in the choice above. 488 config LINEAR_FRAMEBUFFER 489 def_bool y 490 depends on VBE_LINEAR_FRAMEBUFFER || GENERIC_LINEAR_FRAMEBUFFER 491 492 config BOOTSPLASH 493 prompt "Show graphical bootsplash" 494 bool 495 depends on LINEAR_FRAMEBUFFER 496 help 497 This option shows a graphical bootsplash screen. The graphics are 498 loaded from the CBFS file bootsplash.jpg. 499 500 You can either specify the location and file name of the 501 image in the 'General' section or add it manually to CBFS, using, 502 for example, cbfstool. 503 504 config LINEAR_FRAMEBUFFER_MAX_WIDTH 505 int "Maximum width in pixels" 506 depends on LINEAR_FRAMEBUFFER && MAINBOARD_USE_LIBGFXINIT 507 default 2560 if SYSTEM_TYPE_LAPTOP 508 default 3840 509 help 510 Set the maximum width of the framebuffer. This may help with 511 default fonts too tiny for high-resolution displays. 512 513 config LINEAR_FRAMEBUFFER_MAX_HEIGHT 514 int "Maximum height in pixels" 515 depends on LINEAR_FRAMEBUFFER && MAINBOARD_USE_LIBGFXINIT 516 default 1600 if SYSTEM_TYPE_LAPTOP 517 default 2160 518 help 519 Set the maximum height of the framebuffer. This may help with 520 default fonts too tiny for high-resolution displays. 521 522 choice DEFAULT_SCREEN_ROTATION 523 prompt "Default screen orientation" 524 depends on LINEAR_FRAMEBUFFER && MAINBOARD_USE_LIBGFXINIT 525 depends on GFX_GMA_GENERATION = "Broxton" || GFX_GMA_GENERATION = "Skylake" 526 default DEFAULT_SCREEN_ROTATION_NONE 527 help 528 This allows to configure how the physical screen is mounted in 529 90 degree steps (counter-clockwise). The framebuffer contents 530 will then be displayed rotated by the same amount in the other 531 direction; i.e. if you turn the screen to the left, the picture 532 has to be rotated to the right to accommodate. 533 534 config DEFAULT_SCREEN_ROTATION_NONE 535 bool "Non-rotated" 536 537 config DEFAULT_SCREEN_ROTATION_90 538 bool "Rotated 90 degrees (rotate framebuffer to the right)" 539 540 config DEFAULT_SCREEN_ROTATION_180 541 bool "Rotated 180 degrees" 542 543 config DEFAULT_SCREEN_ROTATION_270 544 bool "Rotated 270 degrees (rotate framebuffer to the left)" 545 546 endchoice 547 548 config DEFAULT_SCREEN_ROTATION_INT 549 int 550 default 90 if DEFAULT_SCREEN_ROTATION_90 551 default 180 if DEFAULT_SCREEN_ROTATION_180 552 default 270 if DEFAULT_SCREEN_ROTATION_270 553 default 0 554 555 endmenu # "Display" 556 557 config PCI 558 bool 559 default n 560 561 config PCI_IOBASE 562 hex 563 help 564 The memory address of a memory-mapped translator that lets the 565 CPU communicate with peripheral devices over PCI I/O space. 566 567 if PCI 568 569 config DOMAIN_RESOURCE_32BIT_LIMIT 570 hex 571 default 0xfe000000 572 help 573 When the default pci_domain_read_resources() is used, 574 keep 32-bit memory resources below this limit. This is 575 used as a workaround for missing/wrong reservations of 576 chipset resources that usually reside above this limit. 577 578 config NO_ECAM_MMCONF_SUPPORT 579 bool 580 default n 581 help 582 Disable the use of the Enhanced Configuration 583 Access mechanism (ECAM) method for accessing PCI config 584 address space. 585 586 config ECAM_MMCONF_SUPPORT 587 bool 588 default !NO_ECAM_MMCONF_SUPPORT 589 help 590 Enable the use of the Enhanced Configuration 591 Access mechanism (ECAM) method for accessing PCI config 592 address space. 593 594 config PCIX_PLUGIN_SUPPORT 595 bool 596 default y 597 598 config CARDBUS_PLUGIN_SUPPORT 599 bool 600 default y 601 602 config AZALIA_HDA_CODEC_SUPPORT 603 bool 604 default n 605 help 606 Select this option to include the code to initialize Azalia HD audio 607 codec chips. This will also add the hda_verb.c file from the 608 mainboard directory to the build which contain the board-specific HD 609 audio codec configuration. 610 611 config PCIEXP_PLUGIN_SUPPORT 612 bool 613 default y 614 615 config ECAM_MMCONF_BASE_ADDRESS 616 hex 617 depends on ECAM_MMCONF_SUPPORT 618 619 config ECAM_MMCONF_BUS_NUMBER 620 int 621 depends on ECAM_MMCONF_SUPPORT 622 help 623 Total number of PCI buses in the system across all segment groups. 624 The number needs to be a power of 2. For values <= 256, 625 PCI_BUSES_PER_SEGMENT_GROUP is CONFIG_ECAM_MMCONF_BUS_NUMBER and 626 PCI_SEGMENT_GROUP_COUNT is 1. For values > 256, 627 PCI_BUSES_PER_SEGMENT_GROUP is 256 and PCI_SEGMENT_GROUP_COUNT is 628 CONFIG_ECAM_MMCONF_BUS_NUMBER / 256. 629 630 config ECAM_MMCONF_LENGTH 631 hex 632 depends on ECAM_MMCONF_SUPPORT 633 default 0x02000000 if ECAM_MMCONF_BUS_NUMBER = 32 634 default 0x04000000 if ECAM_MMCONF_BUS_NUMBER = 64 635 default 0x08000000 if ECAM_MMCONF_BUS_NUMBER = 128 636 default 0x10000000 if ECAM_MMCONF_BUS_NUMBER = 256 637 default 0x20000000 if ECAM_MMCONF_BUS_NUMBER = 512 638 default 0x80000000 if ECAM_MMCONF_BUS_NUMBER = 1024 639 default 0x0 640 641 config PCI_ALLOW_BUS_MASTER 642 bool "Allow coreboot to set optional PCI bus master bits" 643 default y 644 help 645 For security reasons, bus mastering should be enabled as late as 646 possible. In coreboot, it's usually not necessary and payloads 647 should only enable it for devices they use. Since not all payloads 648 enable bus mastering properly yet, this option gives some sort of 649 "backwards compatibility" and is enabled by default to keep the 650 traditional behaviour for now. This is currently necessary, for 651 instance, for libpayload based payloads as the drivers don't enable 652 bus mastering for PCI bridges. 653 654 if PCI_ALLOW_BUS_MASTER 655 656 config PCI_SET_BUS_MASTER_PCI_BRIDGES 657 bool "PCI bridges" 658 default y 659 help 660 Let coreboot configure bus mastering for PCI bridges. Enabling bus 661 mastering for a PCI bridge also allows it to forward requests from 662 downstream devices. Currently, payloads ignore this and only enable 663 bus mastering for the downstream device. Hence, this option is needed 664 for compatibility until payloads are fixed. 665 666 config PCI_ALLOW_BUS_MASTER_ANY_DEVICE 667 bool "Any devices" 668 default y 669 select PCI_SET_BUS_MASTER_PCI_BRIDGES 670 help 671 Allow coreboot to enable PCI bus mastering for any device. The actual 672 selection of devices depends on the various PCI drivers in coreboot. 673 674 endif # PCI_ALLOW_BUS_MASTER 675 676 endif # PCI 677 678 if PCIEXP_PLUGIN_SUPPORT 679 680 config PCIEXP_COMMON_CLOCK 681 prompt "Enable PCIe Common Clock" 682 bool 683 default n 684 help 685 Detect and enable Common Clock on PCIe links. 686 687 config PCIEXP_ASPM 688 prompt "Enable PCIe ASPM" 689 bool 690 default n 691 help 692 Detect and enable ASPM (Active State Power Management) on PCIe links. 693 694 config PCIEXP_CLK_PM 695 prompt "Enable PCIe Clock Power Management" 696 bool 697 default n 698 help 699 Detect and enable Clock Power Management on PCIe. 700 701 config PCIEXP_L1_SUB_STATE 702 prompt "Enable PCIe ASPM L1 SubState" 703 bool 704 depends on (ECAM_MMCONF_SUPPORT || PCI_IO_CFG_EXT) 705 default n 706 help 707 Detect and enable ASPM on PCIe links. 708 709 config PCIEXP_SUPPORT_RESIZABLE_BARS 710 prompt "Support PCIe Resizable BARs" 711 bool 712 depends on (ECAM_MMCONF_SUPPORT || PCI_IO_CFG_EXT) 713 default n 714 help 715 When enabled, this will check PCIe devices for Resizable BAR support, 716 and if found, will use this to discover the preferred BAR sizes of 717 the device in preference over the traditional moving bits method. The 718 amount of address space given out to devices in this manner (since 719 it can range up to 8 EB) can be limited with the 720 PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS Kconfig setting below. 721 722 if PCIEXP_SUPPORT_RESIZABLE_BARS 723 724 config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS 725 int "Bits of address space to give to Resizable BARs" 726 range 20 63 # 1 MiB - 8 EiB 727 default 29 # 512 MiB 728 help 729 This is the maximum number of bits of address space to allocate for 730 PCIe devices with resizable BARs. For instance, if a device requests 731 30 bits of address space (1 GiB), but this field is set to 29, then 732 the device will only be allocated 29 bits worth of address space (512 733 MiB). Valid values range from 20 (1 MiB) to 63 (8 EiB); these come 734 from the Resizable BAR portion of the PCIe spec (7.8.6). 735 736 endif # PCIEXP_SUPPORT_RESIZABLE_BARS 737 738 config PCIEXP_LANE_ERR_STAT_CLEAR 739 prompt "Enable Clear PCIe Lane Error Status" 740 bool 741 default n 742 help 743 Clear the PCIe Lane Error Status at the end of link training. 744 745 config PCIEXP_HOTPLUG 746 prompt "Enable PCIe Hotplug Support" 747 bool 748 default n 749 help 750 Allocate resources for PCIe hotplug bridges 751 752 if PCIEXP_HOTPLUG 753 754 config PCIEXP_HOTPLUG_BUSES 755 int "PCI Express Hotplug Buses" 756 default 8 757 help 758 This is the number of buses allocated for hotplug PCI express 759 bridges, for use by hotplugged child devices. The default is 8 760 buses. 761 762 config PCIEXP_HOTPLUG_MEM 763 hex "PCI Express Hotplug Memory" 764 default 0x800000 765 help 766 This is the amount of memory space, in bytes, to allocate to 767 hotplug PCI express bridges, for use by hotplugged child devices. 768 This size should be page-aligned. The default is 8 MiB. 769 770 config PCIEXP_HOTPLUG_PREFETCH_MEM 771 hex "PCI Express Hotplug Prefetch Memory" 772 default 0x10000000 773 help 774 This is the amount of pre-fetchable memory space, in bytes, to 775 allocate to hot-plug PCI express bridges, for use by hotplugged 776 child devices. This size should be page-aligned. The default is 777 256 MiB. 778 779 config PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G 780 bool 781 default y if !PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G 782 default n 783 help 784 This enables prefetch memory allocation above 4G boundary for the 785 hotplug resources. 786 787 config PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G 788 bool "PCI Express Hotplug Prefetch Memory Allocation below 4G boundary" 789 default n 790 help 791 This enables prefetch memory allocation below 4G boundary for the 792 hotplug resources. 793 794 config PCIEXP_HOTPLUG_IO 795 hex "PCI Express Hotplug I/O Space" 796 default 0x800 797 help 798 This is the amount of I/O space to allocate to hot-plug PCI 799 express bridges, for use by hotplugged child devices. The default 800 is 2 KiB. 801 802 endif # PCIEXP_HOTPLUG 803 804 endif # PCIEXP_PLUGIN_SUPPORT 805 806 config EARLY_PCI_BRIDGE 807 bool "Early PCI bridge" 808 depends on PCI 809 default n 810 help 811 While coreboot is executing code from ROM, the coreboot resource 812 allocator has not been running yet. Hence PCI devices living behind 813 a bridge are not yet visible to the system. 814 815 This option enables static configuration for a single pre-defined 816 PCI bridge function on bus 0. 817 818 if EARLY_PCI_BRIDGE 819 820 config EARLY_PCI_BRIDGE_DEVICE 821 hex "bridge device" 822 default 0x0 823 824 config EARLY_PCI_BRIDGE_FUNCTION 825 hex "bridge function" 826 default 0x0 827 828 config EARLY_PCI_MMIO_BASE 829 hex "MMIO window base" 830 default 0x0 831 832 endif # EARLY_PCI_BRIDGE 833 834 config SUBSYSTEM_VENDOR_ID 835 hex "Override PCI Subsystem Vendor ID" 836 depends on PCI 837 default 0x0000 838 help 839 This config option will override the devicetree settings for 840 PCI Subsystem Vendor ID. 841 842 Note: This option is not meant for a board's Kconfig; use the 843 devicetree setting `subsystemid` instead. 844 845 config SUBSYSTEM_DEVICE_ID 846 hex "Override PCI Subsystem Device ID" 847 depends on PCI 848 default 0x0000 849 help 850 This config option will override the devicetree settings for 851 PCI Subsystem Device ID. 852 853 Note: This option is not meant for a board's Kconfig; use the 854 devicetree setting `subsystemid` instead. 855 856 config VGA_BIOS 857 bool "Add a VGA BIOS image" 858 depends on ARCH_X86 859 select VGA_ROM_RUN_DEFAULT 860 help 861 Select this option if you have a VGA BIOS image that you would 862 like to add to your ROM. 863 864 You will be able to specify the location and file name of the 865 image later. 866 867 config VGA_BIOS_FILE 868 string "VGA BIOS path and filename" 869 depends on VGA_BIOS 870 default "vgabios.bin" 871 help 872 The path and filename of the file to use as VGA BIOS. 873 874 config VGA_BIOS_ID 875 string "VGA device PCI IDs" 876 depends on VGA_BIOS 877 default "1106,3230" 878 help 879 The comma-separated PCI vendor and device ID that would associate 880 your vBIOS to your video card. 881 882 Example: 1106,3230 883 884 In the above example 1106 is the PCI vendor ID (in hex, but without 885 the "0x" prefix) and 3230 specifies the PCI device ID of the 886 video card (also in hex, without "0x" prefix). 887 888 This ID needs to match the PCI VID and DID in the VGA BIOS file's 889 header and also needs to match the value returned by map_oprom_vendev 890 if the remapping feature is used. 891 892 Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices. 893 894 config VGA_BIOS_SECOND 895 bool "Add a 2nd video BIOS image" 896 depends on ARCH_X86 && VGA_BIOS 897 help 898 Select this option if you have a 2nd video BIOS image that you would 899 like to add to your ROM. 900 901 config VGA_BIOS_SECOND_FILE 902 string "2nd video BIOS path and filename" 903 depends on VGA_BIOS_SECOND 904 default "vbios2.bin" 905 help 906 The path and filename of the file to use as video BIOS. 907 908 config VGA_BIOS_SECOND_ID 909 string "Graphics device PCI IDs" 910 depends on VGA_BIOS_SECOND 911 help 912 The comma-separated PCI vendor and device ID that would associate 913 your vBIOS to your video card. 914 915 Example: 1106,3230 916 917 In the above example 1106 is the PCI vendor ID (in hex, but without 918 the "0x" prefix) and 3230 specifies the PCI device ID of the 919 video card (also in hex, without "0x" prefix). 920 921 Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices. 922 923 config VGA_BIOS_DGPU 924 bool "Add a discrete VGA BIOS image" 925 depends on VGA_BIOS 926 help 927 Select this option if you have a VGA BIOS image for discrete GPU 928 that you would like to add to your ROM. 929 930 You will be able to specify the location and file name of the 931 image later. 932 933 config VGA_BIOS_DGPU_FILE 934 string "Discrete VGA BIOS path and filename" 935 depends on VGA_BIOS_DGPU 936 default "vgabios_dgpu.bin" 937 help 938 The path and filename of the file to use as VGA BIOS for discrete GPU. 939 940 config VGA_BIOS_DGPU_ID 941 string "Discrete VGA device PCI IDs" 942 depends on VGA_BIOS_DGPU 943 default "1002,6663" 944 help 945 The comma-separated PCI vendor and device ID that would associate 946 your VGA BIOS to your discrete video card. 947 948 Examples: 949 1002,6663 for HD 8570M 950 1002,6665 for R5 M230 951 952 In the above examples 1002 is the PCI vendor ID (in hex, but without 953 the "0x" prefix) and 6663 / 6665 specifies the PCI device ID of the 954 discrete video card (also in hex, without "0x" prefix). 955 956 Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices. 957 958 config INTEL_GMA_HAVE_VBT 959 bool 960 help 961 Select this in the mainboard Kconfig to indicate the board has 962 a data.vbt file. 963 964 config INTEL_GMA_ADD_VBT 965 depends on SOC_INTEL_COMMON || CPU_INTEL_COMMON 966 bool "Add a Video BIOS Table (VBT) binary to CBFS" 967 default y if INTEL_GMA_HAVE_VBT 968 help 969 Add a VBT data file to CBFS. The VBT describes the integrated 970 GPU and connections, and is needed by the GOP driver integrated into 971 FSP and the OS driver in order to initialize the display. 972 973 config INTEL_GMA_VBT_FILE 974 string "VBT binary path and filename" 975 depends on INTEL_GMA_ADD_VBT 976 default "src/mainboard/\$(MAINBOARDDIR)/variants/\$(VARIANT_DIR)/data.vbt" \ 977 if INTEL_GMA_HAVE_VBT && VARIANT_DIR != "" 978 default "src/mainboard/\$(MAINBOARDDIR)/data.vbt" if INTEL_GMA_HAVE_VBT 979 default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/vbt.bin" 980 help 981 The path and filename of the VBT binary. 982 983 config SOFTWARE_I2C 984 bool "Enable I2C controller emulation in software" 985 default n 986 help 987 This config option will enable code to override the i2c_transfer 988 routine with a (simple) software emulation of the protocol. This may 989 be useful for debugging or on platforms where a driver for the real 990 I2C controller is not (yet) available. The platform code needs to 991 provide bindings to manually toggle I2C lines. 992 993 config I2C_TRANSFER_TIMEOUT_US 994 int "I2C transfer timeout in microseconds" 995 default 500000 996 help 997 Timeout for a read/write transfers on the I2C bus, that is, the 998 maximum time a device could stretch clock bits before the transfer 999 is aborted and an error returned. 1000 1001 config RESOURCE_ALLOCATION_TOP_DOWN 1002 bool "Allocate resources from top down" 1003 default n if PAYLOAD_EDK2 1004 default y 1005 help 1006 Top-down allocation is required to place resources above 4G by 1007 default (i.e. even when there is still space below). On some 1008 platforms, it might make a difference because of conflicts with 1009 undeclared resources. EDK2 is currently reported to also have 1010 problems on some platforms, at least with Intel's IGD. 1011 1012 config ALWAYS_ALLOW_ABOVE_4G_ALLOCATION 1013 bool 1014 default n if ARCH_X86 1015 default y 1016 help 1017 Don't limit mem resources to 4G, but to their actual limit. 1018 1019 config XHCI_UTILS 1020 def_bool n 1021 help 1022 Provides xHCI utility functions. 1023 1024 config D3COLD_SUPPORT 1025 bool 1026 default y 1027 help 1028 Enable this option if all devices on your system support the 1029 D3Cold power management state. The D3Cold state is a low-power 1030 state where the device has been powered down and is no longer 1031 able to maintain its context. This state can help reduce 1032 overall system power consumption, which can be beneficial for 1033 energy savings and thermal management. 1034 1035 Please note that enabling D3Cold support may break system 1036 suspend-to-RAM (S3) functionality. 1037 1038 source "src/device/dram/Kconfig" 1039 1040 endmenu