1  /* Memory information */
  2  /* SPDX-License-Identifier: GPL-2.0-only */
  3  
  4  #ifndef _MEMORY_INFO_H_
  5  #define _MEMORY_INFO_H_
  6  
  7  #include <stdint.h>
  8  
  9  #define DIMM_INFO_SERIAL_SIZE		4
 10  #define DIMM_INFO_PART_NUMBER_SIZE	33
 11  #define DIMM_INFO_TOTAL			64
 12  
 13  /**
 14   * If this table is filled and put in CBMEM,
 15   * then these info in CBMEM will be used to generate smbios type 17 table
 16   *
 17   * Values are specified according to the JEDEC SPD Standard.
 18   */
 19  struct dimm_info {
 20  	/*
 21  	 * Size of the module in MiB.
 22  	 */
 23  	uint32_t dimm_size;
 24  	/*
 25  	 * SMBIOS (not SPD) device type.
 26  	 *
 27  	 * See the smbios.h smbios_memory_type enum.
 28  	 */
 29  	uint16_t ddr_type;
 30  	/*
 31  	 * ddr_frequency is deprecated.
 32  	 * Use max_speed_mts and configured_speed_mts instead.
 33  	 */
 34  	uint16_t ddr_frequency;
 35  	uint8_t rank_per_dimm;
 36  	/*
 37  	 * Socket-ID
 38  	 */
 39  	uint8_t soc_num;
 40  	/*
 41  	 * Memory-Controller-ID
 42  	 */
 43  	uint8_t ctrlr_num;
 44  	/*
 45  	 * Channel-ID
 46  	 */
 47  	uint8_t channel_num;
 48  	/*
 49  	 * DIMM-ID
 50  	 */
 51  	uint8_t dimm_num;
 52  	uint8_t bank_locator;
 53  	/*
 54  	 * SPD serial number.
 55  	 */
 56  	uint8_t serial[DIMM_INFO_SERIAL_SIZE];
 57  	/*
 58  	 * The last byte is '\0' for the end of string
 59  	 *
 60  	 * Must contain only printable ASCII.
 61  	 */
 62  	uint8_t module_part_number[DIMM_INFO_PART_NUMBER_SIZE];
 63  	/*
 64  	 * SPD Manufacturer ID
 65  	 */
 66  	uint16_t mod_id;
 67  	/*
 68  	 * SPD Module Type.
 69  	 *
 70  	 * See spd.h for valid values.
 71  	 *
 72  	 * e.g., SPD_RDIMM, SPD_SODIMM, SPD_MICRO_DIMM
 73  	 */
 74  	uint8_t mod_type;
 75  	/*
 76  	 * SPD bus width.
 77  	 *
 78  	 * Bits 0 - 2 encode the primary bus width:
 79  	 *   0b000 = 8 bit width
 80  	 *   0b001 = 16 bit width
 81  	 *   0b010 = 32 bit width
 82  	 *   0b011 = 64 bit width
 83  	 *
 84  	 * Bits 3 - 4 encode the extension bits (ECC):
 85  	 *   0b00 = 0 extension bits
 86  	 *   0b01 = 8 bit of ECC
 87  	 *
 88  	 * e.g.,
 89  	 *   64 bit bus with 8 bits of ECC (72 bits total): 0b1011
 90  	 *   64 bit bus with 0 bits of ECC (64 bits total): 0b0011
 91  	 *
 92  	 * See the smbios.h smbios_memory_bus_width enum.
 93  	 */
 94  	uint8_t bus_width;
 95  	/*
 96  	 * Voltage Level
 97  	 */
 98  	uint16_t vdd_voltage;
 99  	/*
100  	 * Max speed in MT/s
101  	 * If the value is 0, ddr_frequency should be used instead.
102  	 */
103  	uint16_t max_speed_mts;
104  	/*
105  	 * Configured speed in MT/s
106  	 * If the value is 0, ddr_frequency should be used instead.
107  	 */
108  	uint16_t configured_speed_mts;
109  } __packed;
110  
111  struct memory_info {
112  	/*
113  	 * SMBIOS error correction type.
114  	 * See the smbios.h smbios_memory_array_ecc enum.
115  	 */
116  	uint8_t ecc_type;
117  	/* Maximum capacity the DRAM controller/mainboard supports */
118  	uint32_t max_capacity_mib;
119  	/* Maximum number of DIMMs the DRAM controller/mainboard supports */
120  	uint16_t number_of_devices;
121  
122  	/* active DIMM configuration */
123  	uint8_t dimm_cnt;
124  	struct dimm_info dimm[DIMM_INFO_TOTAL];
125  } __packed;
126  
127  /*
128   * mainboard_get_dram_part_num returns a DRAM part number override string
129   *  return NULL = no part number override provided by mainboard
130   *  return non-NULL = pointer to a string terminating in '\0'
131   */
132  const char *mainboard_get_dram_part_num(void);
133  #endif