/ src / include / mipi / dsi.h
dsi.h
  1  /* SPDX-License-Identifier: GPL-2.0-only */
  2  
  3  #ifndef __MIPI_DSI_H__
  4  #define __MIPI_DSI_H__
  5  
  6  /* MIPI DSI Processor-to-Peripheral transaction types */
  7  enum mipi_dsi_transaction {
  8  	MIPI_DSI_V_SYNC_START				= 0x01,
  9  	MIPI_DSI_V_SYNC_END				= 0x11,
 10  	MIPI_DSI_H_SYNC_START				= 0x21,
 11  	MIPI_DSI_H_SYNC_END				= 0x31,
 12  
 13  	MIPI_DSI_COLOR_MODE_OFF				= 0x02,
 14  	MIPI_DSI_COLOR_MODE_ON				= 0x12,
 15  	MIPI_DSI_SHUTDOWN_PERIPHERAL			= 0x22,
 16  	MIPI_DSI_TURN_ON_PERIPHERAL			= 0x32,
 17  
 18  	MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM		= 0x03,
 19  	MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM		= 0x13,
 20  	MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM		= 0x23,
 21  
 22  	MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM		= 0x04,
 23  	MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM		= 0x14,
 24  	MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM		= 0x24,
 25  
 26  	MIPI_DSI_DCS_SHORT_WRITE			= 0x05,
 27  	MIPI_DSI_DCS_SHORT_WRITE_PARAM			= 0x15,
 28  
 29  	MIPI_DSI_DCS_READ				= 0x06,
 30  
 31  	MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE		= 0x37,
 32  
 33  	MIPI_DSI_END_OF_TRANSMISSION			= 0x08,
 34  
 35  	MIPI_DSI_NULL_PACKET				= 0x09,
 36  	MIPI_DSI_BLANKING_PACKET			= 0x19,
 37  	MIPI_DSI_GENERIC_LONG_WRITE			= 0x29,
 38  	MIPI_DSI_DCS_LONG_WRITE				= 0x39,
 39  
 40  	MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20	= 0x0c,
 41  	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24		= 0x1c,
 42  	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16		= 0x2c,
 43  
 44  	MIPI_DSI_PACKED_PIXEL_STREAM_30			= 0x0d,
 45  	MIPI_DSI_PACKED_PIXEL_STREAM_36			= 0x1d,
 46  	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12		= 0x3d,
 47  
 48  	MIPI_DSI_PACKED_PIXEL_STREAM_16			= 0x0e,
 49  	MIPI_DSI_PACKED_PIXEL_STREAM_18			= 0x1e,
 50  	MIPI_DSI_PIXEL_STREAM_3BYTE_18			= 0x2e,
 51  	MIPI_DSI_PACKED_PIXEL_STREAM_24			= 0x3e,
 52  };
 53  
 54  /* MIPI DSI Peripheral-to-Processor transaction types */
 55  enum {
 56  	MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT	= 0x02,
 57  	MIPI_DSI_RX_END_OF_TRANSMISSION			= 0x08,
 58  	MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE	= 0x11,
 59  	MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE	= 0x12,
 60  	MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE		= 0x1a,
 61  	MIPI_DSI_RX_DCS_LONG_READ_RESPONSE		= 0x1c,
 62  	MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE	= 0x21,
 63  	MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE	= 0x22,
 64  };
 65  
 66  /* MIPI DCS commands */
 67  enum {
 68  	MIPI_DCS_NOP			= 0x00,
 69  	MIPI_DCS_SOFT_RESET		= 0x01,
 70  	MIPI_DCS_GET_DISPLAY_ID		= 0x04,
 71  	MIPI_DCS_GET_RED_CHANNEL	= 0x06,
 72  	MIPI_DCS_GET_GREEN_CHANNEL	= 0x07,
 73  	MIPI_DCS_GET_BLUE_CHANNEL	= 0x08,
 74  	MIPI_DCS_GET_DISPLAY_STATUS	= 0x09,
 75  	MIPI_DCS_GET_POWER_MODE		= 0x0A,
 76  	MIPI_DCS_GET_ADDRESS_MODE	= 0x0B,
 77  	MIPI_DCS_GET_PIXEL_FORMAT	= 0x0C,
 78  	MIPI_DCS_GET_DISPLAY_MODE	= 0x0D,
 79  	MIPI_DCS_GET_SIGNAL_MODE	= 0x0E,
 80  	MIPI_DCS_GET_DIAGNOSTIC_RESULT	= 0x0F,
 81  	MIPI_DCS_ENTER_SLEEP_MODE	= 0x10,
 82  	MIPI_DCS_EXIT_SLEEP_MODE	= 0x11,
 83  	MIPI_DCS_ENTER_PARTIAL_MODE	= 0x12,
 84  	MIPI_DCS_ENTER_NORMAL_MODE	= 0x13,
 85  	MIPI_DCS_EXIT_INVERT_MODE	= 0x20,
 86  	MIPI_DCS_ENTER_INVERT_MODE	= 0x21,
 87  	MIPI_DCS_SET_GAMMA_CURVE	= 0x26,
 88  	MIPI_DCS_SET_DISPLAY_OFF	= 0x28,
 89  	MIPI_DCS_SET_DISPLAY_ON		= 0x29,
 90  	MIPI_DCS_SET_COLUMN_ADDRESS	= 0x2A,
 91  	MIPI_DCS_SET_PAGE_ADDRESS	= 0x2B,
 92  	MIPI_DCS_WRITE_MEMORY_START	= 0x2C,
 93  	MIPI_DCS_WRITE_LUT		= 0x2D,
 94  	MIPI_DCS_READ_MEMORY_START	= 0x2E,
 95  	MIPI_DCS_SET_PARTIAL_AREA	= 0x30,
 96  	MIPI_DCS_SET_SCROLL_AREA	= 0x33,
 97  	MIPI_DCS_SET_TEAR_OFF		= 0x34,
 98  	MIPI_DCS_SET_TEAR_ON		= 0x35,
 99  	MIPI_DCS_SET_ADDRESS_MODE	= 0x36,
100  	MIPI_DCS_SET_SCROLL_START	= 0x37,
101  	MIPI_DCS_EXIT_IDLE_MODE		= 0x38,
102  	MIPI_DCS_ENTER_IDLE_MODE	= 0x39,
103  	MIPI_DCS_SET_PIXEL_FORMAT	= 0x3A,
104  	MIPI_DCS_WRITE_MEMORY_CONTINUE	= 0x3C,
105  	MIPI_DCS_READ_MEMORY_CONTINUE	= 0x3E,
106  	MIPI_DCS_SET_TEAR_SCANLINE	= 0x44,
107  	MIPI_DCS_GET_SCANLINE		= 0x45,
108  	MIPI_DCS_READ_DDB_START		= 0xA1,
109  	MIPI_DCS_READ_DDB_CONTINUE	= 0xA8,
110  };
111  
112  #endif /* __MIPI_DSI_H__ */