1      li x2, 1
 2      li x4, 987 # target fibonnaci number
 3      li x15, 0
 4  
 5      la x6, exception_handler
 6      csrw mtvec, x6 # set-up handler
 7  loop:
 8      add x3, x2, x1
 9  .4byte 0  # raise exception without stalling the fetcher
10      mv x1, x2
11      mv x2, x3
12      bne x2, x4, loop
13  
14      # report another exception after full rob_idx overflow
15      # so it has the same rob index as previous report
16      li x10, 0
17      li x11, 13
18  rob_loop:
19      addi x10, x10, 1
20      nop
21      nop
22      nop
23      nop
24      nop
25      nop
26      bne x10, x11, rob_loop
27  
28      nop
29      nop
30      nop
31      nop
32      nop
33      nop
34      nop
35  
36  .4byte 0 # exception
37  
38      li x11, 0xaaaa # verify exception return
39  
40  infloop:
41      j infloop
42  
43  exception_handler:
44     mv x6, x2
45     li x2, 42 # do some register activity
46     mv x2, x6
47  
48     addi x15, x15, 1 # count exceptions
49  
50     csrr x6, mepc    # resume program execution,
51     addi x6, x6, 4   # but skip unimplemented instruction
52     jr x6