link.ld
1 OUTPUT_ARCH( "riscv" ) 2 3 start = 0; 4 5 SECTIONS 6 { 7 .text : { *(.text) } 8 . = 0x100000000; /* start from 2**32 - trick to emulate Harvard architecture (memory addresses will start from 0) */ 9 .data : { 10 *(.data) 11 *(.bss) 12 13 . = _end_init_regs > . ? 0x1000 : .; /* skip .init_regs origin allocation if not used */ 14 *(.init_regs) 15 _end_init_regs = .; 16 } 17 }