1  /* This file is part of the dynarmic project.
  2   * Copyright (c) 2018 MerryMage
  3   * SPDX-License-Identifier: 0BSD
  4   */
  5  
  6  #include <catch2/catch_test_macros.hpp>
  7  
  8  #include "./testenv.h"
  9  #include "dynarmic/interface/A64/a64.h"
 10  
 11  using namespace Dynarmic;
 12  
 13  TEST_CASE("ensure fast dispatch entry is cleared even when a block does not have any patching requirements", "[a64]") {
 14      A64TestEnv env;
 15  
 16      A64::UserConfig conf{&env};
 17      A64::Jit jit{conf};
 18  
 19      REQUIRE(conf.HasOptimization(OptimizationFlag::FastDispatch));
 20  
 21      env.code_mem_start_address = 100;
 22      env.code_mem.clear();
 23      env.code_mem.emplace_back(0xd2800d80);  // MOV X0, 108
 24      env.code_mem.emplace_back(0xd61f0000);  // BR X0
 25      env.code_mem.emplace_back(0xd2800540);  // MOV X0, 42
 26      env.code_mem.emplace_back(0x14000000);  // B .
 27  
 28      jit.SetPC(100);
 29      env.ticks_left = 4;
 30      jit.Run();
 31      REQUIRE(jit.GetRegister(0) == 42);
 32  
 33      jit.SetPC(100);
 34      env.ticks_left = 4;
 35      jit.Run();
 36      REQUIRE(jit.GetRegister(0) == 42);
 37  
 38      jit.InvalidateCacheRange(108, 4);
 39  
 40      jit.SetPC(100);
 41      env.ticks_left = 4;
 42      jit.Run();
 43      REQUIRE(jit.GetRegister(0) == 42);
 44  
 45      env.code_mem[2] = 0xd28008a0;  // MOV X0, 69
 46  
 47      jit.SetPC(100);
 48      env.ticks_left = 4;
 49      jit.Run();
 50      REQUIRE(jit.GetRegister(0) == 42);
 51  
 52      jit.InvalidateCacheRange(108, 4);
 53  
 54      jit.SetPC(100);
 55      env.ticks_left = 4;
 56      jit.Run();
 57      REQUIRE(jit.GetRegister(0) == 69);
 58  
 59      jit.SetPC(100);
 60      env.ticks_left = 4;
 61      jit.Run();
 62      REQUIRE(jit.GetRegister(0) == 69);
 63  }
 64  
 65  TEST_CASE("ensure fast dispatch entry is cleared even when a block does not have any patching requirements 2", "[a64]") {
 66      A64TestEnv env;
 67  
 68      A64::UserConfig conf{&env};
 69      A64::Jit jit{conf};
 70  
 71      REQUIRE(conf.HasOptimization(OptimizationFlag::FastDispatch));
 72  
 73      env.code_mem.emplace_back(0xd2800100);  // MOV X0, 8
 74      env.code_mem.emplace_back(0xd61f0000);  // BR X0
 75      env.code_mem.emplace_back(0xd2800540);  // MOV X0, 42
 76      env.code_mem.emplace_back(0x14000000);  // B .
 77  
 78      jit.SetPC(0);
 79      env.ticks_left = 4;
 80      jit.Run();
 81      REQUIRE(jit.GetRegister(0) == 42);
 82  
 83      jit.SetPC(0);
 84      env.ticks_left = 4;
 85      jit.Run();
 86      REQUIRE(jit.GetRegister(0) == 42);
 87  
 88      jit.InvalidateCacheRange(8, 4);
 89  
 90      jit.SetPC(0);
 91      env.ticks_left = 4;
 92      jit.Run();
 93      REQUIRE(jit.GetRegister(0) == 42);
 94  
 95      env.code_mem[2] = 0xd28008a0;  // MOV X0, 69
 96  
 97      jit.SetPC(0);
 98      env.ticks_left = 4;
 99      jit.Run();
100      REQUIRE(jit.GetRegister(0) == 42);
101  
102      jit.InvalidateCacheRange(8, 4);
103  
104      jit.SetPC(0);
105      env.ticks_left = 4;
106      jit.Run();
107      REQUIRE(jit.GetRegister(0) == 69);
108  
109      jit.SetPC(0);
110      env.ticks_left = 4;
111      jit.Run();
112      REQUIRE(jit.GetRegister(0) == 69);
113  }