1  /*****************************************************************************\
  2   * coreboot_tables.h
  3  \*****************************************************************************/
  4  
  5  #ifndef COREBOOT_TABLES_H
  6  #define COREBOOT_TABLES_H
  7  
  8  #include <stdint.h>
  9  
 10  /* Note: The contents of this file were borrowed from the coreboot source
 11   * code which may be obtained from https://www.coreboot.org/.
 12   * Specifically, this code was obtained from LinuxBIOS version 1.1.8.
 13   */
 14  
 15  /* The coreboot table information is for conveying information
 16   * from the firmware to the loaded OS image. Primarily this
 17   * is expected to be information that cannot be discovered by
 18   * other means, such as querying the hardware directly.
 19   *
 20   * All of the information should be Position Independent Data.
 21   * That is, it should be safe to relocate any of the information
 22   * without changing its meaning/correctness. For tables that
 23   * can reasonably be used on multiple architectures the data
 24   * size should be fixed. This should ease the transition between
 25   * 32 bit and 64 bit architectures etc.
 26   *
 27   * The completeness test for the information in this table is:
 28   * - Can all of the hardware be detected?
 29   * - Are the per-motherboard constants available?
 30   * - Is there enough to allow a kernel to run that was written before
 31   *   a particular motherboard is constructed? (Assuming the kernel
 32   *   has drivers for all of the hardware but it does not have
 33   *   assumptions on how the hardware is connected together).
 34   *
 35   * With this test it should be straightforward to determine if a
 36   * table entry is required or not. This should remove much of the
 37   * long-term compatibility burden as table entries which are
 38   * irrelevant or have been replaced by better alternatives may be
 39   * dropped. Of course it is polite and expedite to include extra
 40   * table entries and be backwards compatible, but it is not required.
 41   */
 42  
 43  /* Since coreboot is usually compiled 32bit, gcc will align 64bit
 44   * types to 32bit boundaries. If the coreboot table is dumped on a
 45   * 64bit system, a uint64_t would be aligned to 64bit boundaries,
 46   * breaking the table format.
 47   *
 48   * lb_uint64_t will keep 64bit coreboot table values aligned to 32bit
 49   * to ensure compatibility.
 50   */
 51  
 52  typedef __attribute__((aligned(4))) uint64_t lb_uint64_t;
 53  
 54  struct lb_header {
 55  	union {
 56  		uint8_t signature[4];	/* LBIO */
 57  		uint32_t signature32;
 58  	};
 59  	uint32_t header_bytes;
 60  	uint32_t header_checksum;
 61  	uint32_t table_bytes;
 62  	uint32_t table_checksum;
 63  	uint32_t table_entries;
 64  };
 65  
 66  /* Every entry in the boot environment list will correspond to a boot
 67   * info record, encoding both type and size. The type is obviously
 68   * so you can tell what it is. The size allows you to skip that
 69   * boot environment record if you don't know what it is. This allows
 70   * forward compatibility with records not yet defined.
 71   */
 72  struct lb_record {
 73  	uint32_t tag;		/* tag ID */
 74  	uint32_t size;		/* size of record (in bytes) */
 75  };
 76  
 77  #define LB_TAG_UNUSED		0x0000
 78  
 79  #define LB_TAG_MEMORY		0x0001
 80  
 81  struct lb_memory_range {
 82  	lb_uint64_t start;
 83  	lb_uint64_t size;
 84  	uint32_t type;
 85  #define LB_MEM_RAM	1	/* Memory anyone can use */
 86  #define LB_MEM_RESERVED	2	/* Don't use this memory region */
 87  #define LB_MEM_TABLE	16	/* RAM configuration tables are kept in */
 88  };
 89  
 90  struct lb_memory {
 91  	uint32_t tag;
 92  	uint32_t size;
 93  	struct lb_memory_range map[];
 94  };
 95  
 96  #define LB_TAG_HWRPB		0x0002
 97  struct lb_hwrpb {
 98  	uint32_t tag;
 99  	uint32_t size;
100  	uint64_t hwrpb;
101  };
102  
103  #define LB_TAG_MAINBOARD	0x0003
104  struct lb_mainboard {
105  	uint32_t tag;
106  	uint32_t size;
107  	uint8_t vendor_idx;
108  	uint8_t part_number_idx;
109  	uint8_t strings[];
110  };
111  
112  #define LB_TAG_VERSION		0x0004
113  #define LB_TAG_EXTRA_VERSION	0x0005
114  #define LB_TAG_BUILD		0x0006
115  #define LB_TAG_COMPILE_TIME	0x0007
116  #define LB_TAG_COMPILE_BY	0x0008
117  #define LB_TAG_COMPILE_HOST	0x0009
118  #define LB_TAG_COMPILE_DOMAIN	0x000a
119  #define LB_TAG_COMPILER		0x000b
120  #define LB_TAG_LINKER		0x000c
121  #define LB_TAG_ASSEMBLER	0x000d
122  struct lb_string {
123  	uint32_t tag;
124  	uint32_t size;
125  	uint8_t string[];
126  };
127  #define LB_TAG_SERIAL		0x000f
128  #define LB_TAG_CONSOLE		0x0010
129  #define LB_TAG_FORWARD		0x0011
130  struct lb_forward {
131  	uint32_t tag;
132  	uint32_t size;
133  	uint64_t forward;
134  };
135  
136  /* The following structures are for the CMOS definitions table */
137  #define LB_TAG_CMOS_OPTION_TABLE 200
138  /* CMOS header record */
139  struct cmos_option_table {
140  	uint32_t tag;		/* CMOS definitions table type */
141  	uint32_t size;		/* size of the entire table */
142  	uint32_t header_length;	/* length of header */
143  };
144  
145  /* CMOS entry record
146   * This record has a variable length. The name field may be
147   * shorter than CMOS_MAX_NAME_LENGTH. The entry may start
148   * anywhere in the byte, but can not span bytes unless it
149   * starts at the beginning of the byte and the length
150   * fills complete bytes.
151   */
152  #define LB_TAG_OPTION 201
153  struct cmos_entries {
154  	uint32_t tag;		/* entry type */
155  	uint32_t size;		/* length of this record */
156  	uint32_t bit;		/* starting bit from start of image */
157  	uint32_t length;	/* length of field in bits */
158  	uint32_t config;	/* e=enumeration, h=hex, r=reserved */
159  	uint32_t config_id;	/* a number linking to an enumeration record */
160  #define CMOS_MAX_NAME_LENGTH 32
161  	uint8_t name[CMOS_MAX_NAME_LENGTH];	/* name of entry in ascii,
162  						   variable length int aligned */
163  };
164  
165  /* CMOS enumerations record
166   * This record has a variable length. The text field may be
167   * shorter than CMOS_MAX_TEXT_LENGTH.
168   */
169  #define LB_TAG_OPTION_ENUM 202
170  struct cmos_enums {
171  	uint32_t tag;		/* enumeration type */
172  	uint32_t size;		/* length of this record */
173  	uint32_t config_id;	/* a number identifying the config id */
174  	uint32_t value;		/* the value associated with the text */
175  #define CMOS_MAX_TEXT_LENGTH 32
176  	uint8_t text[CMOS_MAX_TEXT_LENGTH];	/* enum description in ascii,
177  						   variable length int aligned */
178  };
179  
180  /* CMOS default record
181   * This record contains default settings for the CMOS RAM.
182   */
183  #define LB_TAG_OPTION_DEFAULTS 203
184  struct cmos_defaults {
185  	uint32_t tag;		/* default type */
186  	uint32_t size;		/* length of this record */
187  	uint32_t name_length;	/* length of the following name field */
188  	uint8_t name[CMOS_MAX_NAME_LENGTH];	/* name identifying the default */
189  #define CMOS_IMAGE_BUFFER_SIZE 128
190  	uint8_t default_set[CMOS_IMAGE_BUFFER_SIZE];	/* default settings */
191  };
192  
193  #define LB_TAG_OPTION_CHECKSUM 204
194  struct cmos_checksum {
195  	uint32_t tag;
196  	uint32_t size;
197  	/* In practice everything is byte aligned, but things are measured
198  	 * in bits to be consistent.
199  	 */
200  	uint32_t range_start;	/* First bit that is checksummed (byte aligned) */
201  	uint32_t range_end;	/* Last bit that is checksummed (byte aligned) */
202  	uint32_t location;	/* First bit of the checksum (byte aligned) */
203  	uint32_t type;		/* Checksum algorithm that is used */
204  #define CHECKSUM_NONE	0
205  #define CHECKSUM_PCBIOS	1
206  };
207  
208  #endif				/* COREBOOT_TABLES_H */