1  /* ----------------------------------------------------------------------
  2   * Project:      CMSIS DSP Library
  3   * Title:        arm_not_u8.c
  4   * Description:  uint8_t bitwise NOT
  5   *
  6   * $Date:        23 April 2021
  7   * $Revision:    V1.9.0
  8   *
  9   * Target Processor: Cortex-M and Cortex-A cores
 10   * -------------------------------------------------------------------- */
 11  /*
 12   * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
 13   *
 14   * SPDX-License-Identifier: Apache-2.0
 15   *
 16   * Licensed under the Apache License, Version 2.0 (the License); you may
 17   * not use this file except in compliance with the License.
 18   * You may obtain a copy of the License at
 19   *
 20   * www.apache.org/licenses/LICENSE-2.0
 21   *
 22   * Unless required by applicable law or agreed to in writing, software
 23   * distributed under the License is distributed on an AS IS BASIS, WITHOUT
 24   * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 25   * See the License for the specific language governing permissions and
 26   * limitations under the License.
 27   */
 28  
 29  #include "dsp/basic_math_functions.h"
 30  
 31  /**
 32    @ingroup groupMath
 33   */
 34  
 35  /**
 36    @addtogroup Not
 37    @{
 38   */
 39  
 40  /**
 41    @brief         Compute the logical bitwise NOT of a fixed-point vector.
 42    @param[in]     pSrc       points to input vector 
 43    @param[out]    pDst       points to output vector
 44    @param[in]     blockSize  number of samples in each vector
 45    @return        none
 46   */
 47  
 48  void arm_not_u8(
 49      const uint8_t * pSrc,
 50            uint8_t * pDst,
 51            uint32_t blockSize)
 52  {
 53      uint32_t blkCnt;      /* Loop counter */
 54  
 55  #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
 56      uint8x16_t vecSrc;
 57  
 58      /* Compute 16 outputs at a time */
 59      blkCnt = blockSize >> 4;
 60  
 61      while (blkCnt > 0U)
 62      {
 63          vecSrc = vld1q(pSrc);
 64  
 65          vst1q(pDst, vmvnq_u8(vecSrc) );
 66  
 67          pSrc += 16;
 68          pDst += 16;
 69  
 70          /* Decrement the loop counter */
 71          blkCnt--;
 72      }
 73  
 74      /* Tail */
 75      blkCnt = blockSize & 0xF;
 76  
 77      if (blkCnt > 0U)
 78      {
 79          mve_pred16_t p0 = vctp8q(blkCnt);
 80          vecSrc = vld1q(pSrc);
 81          vstrbq_p(pDst, vmvnq_u8(vecSrc), p0);
 82      }
 83  #else
 84  #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
 85      uint8x16_t inV;
 86  
 87      /* Compute 16 outputs at a time */
 88      blkCnt = blockSize >> 4U;
 89  
 90      while (blkCnt > 0U)
 91      {
 92          inV = vld1q_u8(pSrc);
 93  
 94          vst1q_u8(pDst, vmvnq_u8(inV) );
 95  
 96          pSrc += 16;
 97          pDst += 16;
 98  
 99          /* Decrement the loop counter */
100          blkCnt--;
101      }
102  
103      /* Tail */
104      blkCnt = blockSize & 0xF;
105  #else
106      /* Initialize blkCnt with number of samples */
107      blkCnt = blockSize;
108  #endif
109  
110      while (blkCnt > 0U)
111      {
112          *pDst++ = ~(*pSrc++);
113  
114          /* Decrement the loop counter */
115          blkCnt--;
116      }
117  #endif /* if defined(ARM_MATH_MVEI) */
118  }
119  
120  /**
121    @} end of Not group
122   */