arm_rfft_init_q31.c
1 /* ---------------------------------------------------------------------- 2 * Project: CMSIS DSP Library 3 * Title: arm_rfft_init_q31.c 4 * Description: RFFT & RIFFT Q31 initialisation function 5 * 6 * $Date: 23 April 2021 7 * $Revision: V1.9.0 8 * 9 * Target Processor: Cortex-M and Cortex-A cores 10 * -------------------------------------------------------------------- */ 11 /* 12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 * 14 * SPDX-License-Identifier: Apache-2.0 15 * 16 * Licensed under the Apache License, Version 2.0 (the License); you may 17 * not use this file except in compliance with the License. 18 * You may obtain a copy of the License at 19 * 20 * www.apache.org/licenses/LICENSE-2.0 21 * 22 * Unless required by applicable law or agreed to in writing, software 23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 * See the License for the specific language governing permissions and 26 * limitations under the License. 27 */ 28 29 #include "dsp/transform_functions.h" 30 #include "arm_common_tables.h" 31 #include "arm_const_structs.h" 32 33 34 35 /** 36 @addtogroup RealFFT 37 @{ 38 */ 39 40 /** 41 @brief Initialization function for the Q31 RFFT/RIFFT. 42 @param[in,out] S points to an instance of the Q31 RFFT/RIFFT structure 43 @param[in] fftLenReal length of the FFT 44 @param[in] ifftFlagR flag that selects transform direction 45 - value = 0: forward transform 46 - value = 1: inverse transform 47 @param[in] bitReverseFlag flag that enables / disables bit reversal of output 48 - value = 0: disables bit reversal of output 49 - value = 1: enables bit reversal of output 50 @return execution status 51 - \ref ARM_MATH_SUCCESS : Operation successful 52 - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLenReal</code> is not a supported length 53 54 @par Details 55 The parameter <code>fftLenReal</code> specifies length of RFFT/RIFFT Process. 56 Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192. 57 @par 58 The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed. 59 Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated. 60 @par 61 The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order. 62 Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. 63 @par 64 This function also initializes Twiddle factor table. 65 */ 66 67 arm_status arm_rfft_init_q31( 68 arm_rfft_instance_q31 * S, 69 uint32_t fftLenReal, 70 uint32_t ifftFlagR, 71 uint32_t bitReverseFlag) 72 { 73 /* Initialise the default arm status */ 74 arm_status status = ARM_MATH_ARGUMENT_ERROR; 75 76 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) 77 78 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31) 79 80 /* Initialise the default arm status */ 81 status = ARM_MATH_SUCCESS; 82 83 /* Initialize the Real FFT length */ 84 S->fftLenReal = (uint16_t) fftLenReal; 85 86 /* Initialize the Twiddle coefficientA pointer */ 87 S->pTwiddleAReal = (q31_t *) realCoefAQ31; 88 89 /* Initialize the Twiddle coefficientB pointer */ 90 S->pTwiddleBReal = (q31_t *) realCoefBQ31; 91 92 /* Initialize the Flag for selection of RFFT or RIFFT */ 93 S->ifftFlagR = (uint8_t) ifftFlagR; 94 95 /* Initialize the Flag for calculation Bit reversal or not */ 96 S->bitReverseFlagR = (uint8_t) bitReverseFlag; 97 98 /* Initialization of coef modifier depending on the FFT length */ 99 switch (S->fftLenReal) 100 { 101 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096)) 102 case 8192U: 103 104 105 S->twidCoefRModifier = 1U; 106 107 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) 108 status=arm_cfft_init_q31(&(S->cfftInst),4096); 109 if (status != ARM_MATH_SUCCESS) 110 { 111 return(status); 112 } 113 #else 114 S->pCfft = &arm_cfft_sR_q31_len4096; 115 #endif 116 break; 117 #endif 118 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048)) 119 case 4096U: 120 S->twidCoefRModifier = 2U; 121 122 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) 123 status=arm_cfft_init_q31(&(S->cfftInst),2048); 124 if (status != ARM_MATH_SUCCESS) 125 { 126 return(status); 127 } 128 #else 129 S->pCfft = &arm_cfft_sR_q31_len2048; 130 #endif 131 break; 132 #endif 133 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024)) 134 case 2048U: 135 S->twidCoefRModifier = 4U; 136 137 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) 138 status=arm_cfft_init_q31(&(S->cfftInst),1024); 139 if (status != ARM_MATH_SUCCESS) 140 { 141 return(status); 142 } 143 #else 144 S->pCfft = &arm_cfft_sR_q31_len1024; 145 #endif 146 break; 147 #endif 148 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512)) 149 case 1024U: 150 S->twidCoefRModifier = 8U; 151 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) 152 status=arm_cfft_init_q31(&(S->cfftInst),512); 153 if (status != ARM_MATH_SUCCESS) 154 { 155 return(status); 156 } 157 #else 158 S->pCfft = &arm_cfft_sR_q31_len512; 159 #endif 160 break; 161 #endif 162 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256)) 163 case 512U: 164 S->twidCoefRModifier = 16U; 165 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) 166 status=arm_cfft_init_q31(&(S->cfftInst),256); 167 if (status != ARM_MATH_SUCCESS) 168 { 169 return(status); 170 } 171 #else 172 S->pCfft = &arm_cfft_sR_q31_len256; 173 #endif 174 break; 175 #endif 176 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128)) 177 case 256U: 178 S->twidCoefRModifier = 32U; 179 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) 180 status=arm_cfft_init_q31(&(S->cfftInst),128); 181 if (status != ARM_MATH_SUCCESS) 182 { 183 return(status); 184 } 185 #else 186 S->pCfft = &arm_cfft_sR_q31_len128; 187 #endif 188 break; 189 #endif 190 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64)) 191 case 128U: 192 S->twidCoefRModifier = 64U; 193 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) 194 status=arm_cfft_init_q31(&(S->cfftInst),64); 195 if (status != ARM_MATH_SUCCESS) 196 { 197 return(status); 198 } 199 #else 200 S->pCfft = &arm_cfft_sR_q31_len64; 201 #endif 202 break; 203 #endif 204 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32)) 205 case 64U: 206 S->twidCoefRModifier = 128U; 207 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) 208 status=arm_cfft_init_q31(&(S->cfftInst),32); 209 if (status != ARM_MATH_SUCCESS) 210 { 211 return(status); 212 } 213 #else 214 S->pCfft = &arm_cfft_sR_q31_len32; 215 #endif 216 break; 217 #endif 218 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16)) 219 case 32U: 220 S->twidCoefRModifier = 256U; 221 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) 222 status=arm_cfft_init_q31(&(S->cfftInst),16); 223 if (status != ARM_MATH_SUCCESS) 224 { 225 return(status); 226 } 227 #else 228 S->pCfft = &arm_cfft_sR_q31_len16; 229 #endif 230 break; 231 #endif 232 default: 233 /* Reporting argument error if rfftSize is not valid value */ 234 status = ARM_MATH_ARGUMENT_ERROR; 235 break; 236 } 237 238 #endif 239 #endif 240 /* return the status of RFFT Init function */ 241 return (status); 242 } 243 244 /** 245 @} end of RealFFT group 246 */